summaryrefslogtreecommitdiffstats
path: root/src/common
Commit message (Collapse)AuthorAgeFilesLines
* P9a GPE support for up to 16 OCMBsDouglas Gilbert2019-07-231-13/+18
| | | | | | | | Change-Id: I627143674e883b5baec3a44e4884ac26f1b9aab5 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/80212 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Explorer MSBUF monitoringDouglas Gilbert2019-05-017-267/+423
| | | | | | | | | Change-Id: Ia8e48ba5c3ad7836dbd249f3965768e79083c181 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/73263 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* New NVDIMM save procedureChris Cain2019-03-291-2/+0
| | | | | | | | | | Change-Id: I6eb7ab75951b1e29b13bbdeb06ff4a5c79bc04cd CQ: SW458983 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75111 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Disable 24x7 when EPOW detected to prevent GPE haltChris Cain2019-03-251-5/+5
| | | | | | | | | | | | | | | | | | | | | OCC Updates: Master OCC will begin processing EPOW (vs waiting to process as a slave) 1. Stop 24x7 when EPOW detected 2. Run NVDIMM procedure Delay system checkstop processing 4 ticks to ensure NVDIMM procedure completes NVDIMM procedure updates: - Disable rcd recovery - Poll to wait for DRAM to reach STR Change-Id: I6834308d13866b49b6b2ad1a661f1f56fb05e939 CQ: SW460185 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/74690 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* NVDIMM procedure updateChris Cain2018-10-291-0/+4
| | | | | | | | | | | | | | | - stop mcbist - reduce delay times to 0 - disable min power domain reduction Misc cleanup: skip i2c lock release on non-Nimbus systems Change-Id: If1789a562df1dca245b1eb63f5355924a042d73d RTC: 173789 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67311 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Assert ddr_resetn during EPOW on NVDIMMsChris Cain2018-10-041-16/+20
| | | | | | | | | | Change-Id: I34d3c1a6f0c2f0a1fb95a1fb77af00c176b4e000 RTC: 173789 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66827 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Tested-by: Christopher J. Cain <cjcain@us.ibm.com>
* Support for NVDIMMsChris Cain2018-09-263-2/+8
| | | | | | | | | | Change-Id: I8ccf44287bc72a73b16662ba29b71e731c70b30e RTC:173789 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65917 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Memory:MPV:STC920:Zeppelin: OCC held in reset after a channel checkstopDouglas Gilbert2018-08-072-1/+3
| | | | | | | | | Change-Id: I0311ea1a8ba3051ad8e2103deba2cef84f12109b CQ:sw439732 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63705 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
* Enable GPE IPC TimersWilliam Bryan2018-05-171-1/+4
| | | | | | | | | | | | RTC:192880 Change-Id: Ie71c144d08fa142adc6ef918e2d8cfd1964956e8 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58941 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Centaur SYNC required after changing throttleDouglas Gilbert2018-05-071-9/+8
| | | | | | | | | Change-Id: I8bccc2a0971728d8d2582ba678de166c2591557a CQ: SW426949 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58053 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* OCC Centaur disable deadman timer and clean up codeDoug Gilbert2018-04-041-47/+1
| | | | | | | | | Change-Id: I7d79dd2112de2e28f9b748add6626b231ff236bb Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56660 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* P9 Centaur sensor supportDoug Gilbert2018-03-284-0/+314
| | | | | | | | | Change-Id: Ia84bc7532482ca314c26bd0bb5bf48ad6ee9c410 RTC: 163359 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54989 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* Memory Throttle SensorsWilliam Bryan2018-03-272-24/+64
| | | | | | | | | | | RTC:131184 Change-Id: I2582a1eb9d599f700182f17047cc95accad03725 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51407 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Try to PCAP GPU again after busy failureWilliam Bryan2018-03-072-7/+7
| | | | | | | | | | | CQ:SW414846 Change-Id: I7a4c42de414529da963c4f23f27b99a855a4b727 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55109 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* OCC: Call Home Data LogAndres Lugo-Reyes2017-12-181-2/+2
| | | | | | | | | | | | | | | | | | -CPU temp PER proc -DIMM Temp changes -Memory Bandwidth changes -VRM VDD -Error History counts Change-Id: Ie30f373982a5f3327975d433d508ad2fb27f4fc3 RTC:133944 CMVC-Prereq: 1040415 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49395 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
* APSS Reset SupportDoug Gilbert2017-12-182-0/+5
| | | | | | | | | | Change-Id: I23dd10a7bc78841ecd4382e8ac8667afbb7c2ddd RTC: 163601 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49871 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* 405 GPU Power CappingWilliam Bryan2017-10-121-21/+63
| | | | | | | | | Change-Id: Ieb37ad600463e678ef9b8cf61f3ebbbfaa89e67b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48127 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Enable hardware GPU power brakeDoug Gilbert2017-10-103-0/+17
| | | | | | | | | | Change-Id: I39ae6205cef6ae06cacc0eb2c8a0a4288b8081c8 RTC: 179617 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46800 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Correct gpe timebaseDoug Gilbert2017-10-031-1/+1
| | | | | | | | | | Change-Id: I47524f8400d1b5f2ed5423c2bea105a22a099205 CQ: SW402715 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46917 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* GPU 405 Enable Memory TemperaturesWilliam Bryan2017-10-032-10/+27
| | | | | | | | | Change-Id: Id50d12a50a05b8b3a6a6f1ce3ce4512d3299caa7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46882 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Enable safe mode memory throttlingmbroyles2017-08-291-4/+41
| | | | | | | | | | Change-Id: I62cf1be6a24e02a2cd59b75416d26596a4f2f81d RTC: 169887 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45169 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* 405 Side GPU Core Temp CollectionWilliam Bryan2017-08-251-13/+14
| | | | | | | | | Change-Id: Ia1b10f5208c49ba168dcf338f0cbeb2c4ab46971 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44982 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Move I2C info to commonWilliam Bryan2017-08-241-0/+83
| | | | | | | | | Change-Id: I64c0213d7320b484d165fe0094e2e0286f730957 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44690 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
* Amended 24x7 code- 7/11/2017 config,500us ticSooraj Nair2017-08-161-1/+1
| | | | | | | | | | | | | Change-Id: I6a016fc0158f4210f0e944dfcf770f3b87837c2e changes to accomodate occ tic duration change from 250us to 500us assumes runtime of 50us per tic also added ALINK3 mask in header to reflect UAV change Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43130 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Initial 405 GPU supportmbroyles2017-08-143-2/+91
| | | | | | | Change-Id: I6e957ca1aa643d257274e99957df5b15ac8c889b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44254 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Timestamp data when collectedShawn McCarney2017-08-023-3/+55
| | | | | | | | | | | | | | This commit contains the following enhancements: * New IPC function that runs on GPE0 to read the TOD (Time Of Day) registers * New task on the OCC 405 that gets current TOD every tick via IPC function * Sensor update function now sets timestamp to current TOD value Change-Id: I0ea42b01e4df7a93633a68a0f3ed0f839d5e7b3f RTC: 176504 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43891 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Add pointers to GPE trace buffersWilliam Bryan2017-07-282-2/+13
| | | | | | | | | Change-Id: Ia313e9d7bddde3b61b8f7fc2319e4583843b9549 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43284 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Reduce number of checks when waiting for SPI completionmbroyles2017-07-261-1/+1
| | | | | | | | | | | | Fix GPE1 timing fw sensor Change-Id: I4e0d4256b0f55a5593b16237ace5bce73029f6da CQ: SW396887 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43706 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* rt_xstop_analysis: single proc fir collection is working, without pnor writesPrachi Gupta2017-07-211-0/+1
| | | | | | | | | | Change-Id: Ib49d3b9d52c8f4e1054e9b0c0d609a6e13908ddb Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43245 Reviewed-by: ILYA SMIRNOV <ismirno@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* rt_xstop_analysis: compile all of firdata on gpe0Prachi Gupta2017-07-211-1/+14
| | | | | | | | | | | Change-Id: I804cdf63879a2b80c9e14149e45ee665240c4a88 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43244 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-by: ILYA SMIRNOV <ismirno@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Doorbell reorganizationWilliam Bryan2017-05-101-0/+5
| | | | | | | | | Change-Id: I9c8aa4e4cd2272c213d063a27c019396928ebd94 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40290 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Memory Power Control when entering and exiting IPS (Idle Power Save)Wael El-Essawy2017-05-105-38/+173
| | | | | | | | | | | | | | | memory power control settings for IPS/default modes - as defined by memory config data packet version 0x21 - are applied to memory power control registers of all configured ports whenever the OCC enters/exits IPS, respectively. Change-Id: I56514bb8cbab80c6d4877edc74db96f3b011e523 RTC: 165546 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38294 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Enable PGPE support on hardwareChris Cain2017-04-251-1/+1
| | | | | | | | | | Change-Id: Id709ec36d82a2b6c03b1a4b901cf64f45f241d36 RTC: 163934 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39562 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* APSS P8/P9 Spec CompatibilityWilliam Bryan2017-02-231-2/+3
| | | | | | | | | Change-Id: Ib6cc0f872c22131b4268b3016d264460b7ef9098 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36450 Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* Turn off periodic GPE time stamp tracesWilliam Bryan2017-02-151-1/+4
| | | | | | | | | Change-Id: I81293497750bc3dc3ec77c74163d97f04b0eda8c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36370 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* GPE Nest Frequency & Amester Name ChangesWilliam Bryan2017-02-141-2/+8
| | | | | | | | | | Change-Id: I46ee2502dcfd532b6ff30a32b0a645aecc285f21 RTC:168527 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36293 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Infrastructure for 24x7 data collectionmbroyles2017-02-142-2/+49
| | | | | | | | | | Change-Id: I16277d8290f65ba489da1421783f3705be7281f4 RTC: 168729 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36043 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Pstates Support in OCCWael El-Essawy2017-01-271-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Initialize Pstates global parameters (G_proc_fmax, G_proc_fmin, G_khz_per_pstate and G_proc_pmin from the OCC Pstate Parameter Block) 2. When frequency config data packet is received and OCC is NOT already in Active state: Send IPC command to PGPE to set pState clips to be wide open from min frequency to turbo First verify min/max frequency from TMGT is within what PGPE allows saved in G_proc_fmax and G_proc_fmin if not within bounds trace and clip to G_proc_fmax/fmin) 3. Transition to active state: Send IPC command to PGPE to start pState protocol (give correct data for OCC vs OPAL in control of Pstates) and if OPAL system update OPAL shared memory with Pstate information. 4. amec_slv_freq_smh(): Send IPC command to PGPE to set requested pState (PowerVM) or set clips (OPAL). 5. Address all the TODO/TEMP/#if 0 in amec_freq.c either remove or add RTC# for when it will be addressed Change-Id: Ic323321b8c66945732a6b7345ad85d6f41a62edd RTC: 130201 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33704 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* dcom/ thread/ rtls/ TODO clean upAndres Lugo-Reyes2016-12-159-0/+622
Also moved files common to occ_405/, occ_gpe0/, occ_gpe1/, etc, to a new common directory to keep src/ clean Change-Id: Ib45d70d048a135832592953c955a325d20fa19ae RTC: 163363 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33640 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
OpenPOWER on IntegriCloud