diff options
Diffstat (limited to 'src')
-rw-r--r-- | src/occ_405/amec/amec_init.c | 4 | ||||
-rwxr-xr-x | src/occ_405/amec/amec_pcap.c | 10 | ||||
-rwxr-xr-x | src/occ_405/common.c | 4 | ||||
-rwxr-xr-x | src/occ_405/dcom/dcom.c | 10 | ||||
-rwxr-xr-x | src/occ_405/dimm/dimm.c | 2 | ||||
-rwxr-xr-x | src/occ_405/lock/lock.c | 52 | ||||
-rw-r--r-- | src/occ_405/lock/lock.h | 5 | ||||
-rw-r--r-- | src/occ_405/pgpe/pgpe_interface.c | 43 | ||||
-rwxr-xr-x | src/occ_405/proc/proc_pstate.c | 15 |
9 files changed, 72 insertions, 73 deletions
diff --git a/src/occ_405/amec/amec_init.c b/src/occ_405/amec/amec_init.c index 7343c2f..ab7862e 100644 --- a/src/occ_405/amec/amec_init.c +++ b/src/occ_405/amec/amec_init.c @@ -300,10 +300,10 @@ void amec_init_gamec_struct(void) } //Initialize processor fields - g_amec->proc[0].core_max_freq = G_sysConfigData.sys_mode_freq.table[OCC_MODE_TURBO]; + g_amec->proc[0].core_max_freq = 0xFFFF; //Initialize processor power votes - g_amec->proc[0].pwr_votes.pmax_clip_freq = G_sysConfigData.sys_mode_freq.table[OCC_MODE_TURBO]; + g_amec->proc[0].pwr_votes.pmax_clip_freq = 0xFFFF; g_amec->proc[0].pwr_votes.apss_pmax_clip_freq = 0xFFFF; //Initialize stream buffer recording parameters diff --git a/src/occ_405/amec/amec_pcap.c b/src/occ_405/amec/amec_pcap.c index 81b75ac..24557d4 100755 --- a/src/occ_405/amec/amec_pcap.c +++ b/src/occ_405/amec/amec_pcap.c @@ -73,6 +73,8 @@ uint32_t G_mhz_per_pstate=0; uint8_t G_over_pcap_count=0; +extern uint16_t G_proc_fmax_mhz; // max(turbo,uturbo) frequencies + //*************************************************************************/ // Function Prototypes //*************************************************************************/ @@ -250,9 +252,9 @@ void amec_pcap_controller(void) l_proc_pcap_vote += (PROC_MHZ_PER_WATT * l_power_avail); } - if(l_proc_pcap_vote > G_sysConfigData.sys_mode_freq.table[OCC_MODE_TURBO]) + if(l_proc_pcap_vote > G_proc_fmax_mhz) { - l_proc_pcap_vote = G_sysConfigData.sys_mode_freq.table[OCC_MODE_TURBO]; + l_proc_pcap_vote = G_proc_fmax_mhz; } if(l_proc_pcap_vote < G_sysConfigData.sys_mode_freq.table[OCC_MODE_MIN_FREQUENCY]) @@ -338,9 +340,9 @@ void amec_ppb_fmax_calc(void) G_sysConfigData.master_ppb_fmax += NODE_MHZ_PER_WATT() * l_power_avail; } - if(G_sysConfigData.master_ppb_fmax > G_sysConfigData.sys_mode_freq.table[OCC_MODE_TURBO]) + if(G_sysConfigData.master_ppb_fmax > G_proc_fmax_mhz) { - G_sysConfigData.master_ppb_fmax = G_sysConfigData.sys_mode_freq.table[OCC_MODE_TURBO]; + G_sysConfigData.master_ppb_fmax = G_proc_fmax_mhz; } if(G_sysConfigData.master_ppb_fmax < G_sysConfigData.sys_mode_freq.table[OCC_MODE_MIN_FREQUENCY]) diff --git a/src/occ_405/common.c b/src/occ_405/common.c index 605c62e..02da123 100755 --- a/src/occ_405/common.c +++ b/src/occ_405/common.c @@ -193,9 +193,6 @@ bool notify_host(const ext_intr_reason_t i_reason) current_occmisc.value = in32(OCB_OCCMISC); if (current_occmisc.fields.core_ext_intr == 0) { -#ifdef SIMICS_FLAG_ISSUE - out32(OCB_OCCMISC, new_occmisc.value); // _CLR and _OR not working -#else if (current_occmisc.fields.ext_intr_service_required || current_occmisc.fields.ext_intr_i2c_change || current_occmisc.fields.ext_intr_shmem_change) @@ -209,7 +206,6 @@ bool notify_host(const ext_intr_reason_t i_reason) } out32(OCB_OCCMISC_OR, new_occmisc.value); -#endif notify_success = true; TRAC_INFO("notify_host: notification of reason 0x%02X has been sent", notifyReason); G_host_notifications_pending &= ~notifyReason; diff --git a/src/occ_405/dcom/dcom.c b/src/occ_405/dcom/dcom.c index f6d2ac8..0400871 100755 --- a/src/occ_405/dcom/dcom.c +++ b/src/occ_405/dcom/dcom.c @@ -43,6 +43,7 @@ #include "pss_constants.h" extern uint8_t G_occ_interrupt_type; +extern uint16_t G_proc_fmax_mhz; // max(turbo,uturbo) frequencies dcom_timing_t G_dcomTime; @@ -534,6 +535,15 @@ void task_dcom_parse_occfwmsg(task_t *i_self) if(l_change) { + if(G_sysConfigData.sys_mode_freq.table[OCC_MODE_UTURBO] > G_sysConfigData.sys_mode_freq.table[OCC_MODE_TURBO]) + { + G_proc_fmax_mhz = G_sysConfigData.sys_mode_freq.table[OCC_MODE_UTURBO]; + } + else + { + G_proc_fmax_mhz = G_sysConfigData.sys_mode_freq.table[OCC_MODE_TURBO]; + } + // Update "update count" for debug purposes G_sysConfigData.sys_mode_freq.update_count = G_dcom_slv_inbox_rx.sys_mode_freq.update_count; diff --git a/src/occ_405/dimm/dimm.c b/src/occ_405/dimm/dimm.c index 6305664..450ba8b 100755 --- a/src/occ_405/dimm/dimm.c +++ b/src/occ_405/dimm/dimm.c @@ -543,7 +543,6 @@ uint8_t dimm_reset_sm() #ifdef DEBUG_LOCK_TESTING -// TODO: remove testing code once SIMICS_FLAG_ISSUE removed // Simulate I2C locking behavior from the host void host_i2c_lock_request(); void host_i2c_lock_release(); @@ -740,7 +739,6 @@ void task_dimm_sm(struct task *i_self) if (G_mem_monitoring_allowed) { #ifdef DEBUG_LOCK_TESTING - // TODO: remove testing code once SIMICS_FLAG_ISSUE removed SIMULATE_HOST(); #endif diff --git a/src/occ_405/lock/lock.c b/src/occ_405/lock/lock.c index 51bed42..b864673 100755 --- a/src/occ_405/lock/lock.c +++ b/src/occ_405/lock/lock.c @@ -23,9 +23,6 @@ /* */ /* IBM_PROLOG_END_TAG */ -// TODO: Simics currently does not support the atomic _OR/_CLR OCI registers -#define SIMICS_FLAG_ISSUE - // Debug trace //#define LOCK_DEBUG #ifdef LOCK_DEBUG @@ -65,17 +62,9 @@ void host_i2c_lock_request() { ocb_occflg_t occ_flags = {0}; TRAC_INFO("host_i2c_lock_request called (tick %d / %d)", CURRENT_TICK, DIMM_TICK); -#ifdef SIMICS_FLAG_ISSUE - // NON-ATOMIC OPERATION - occ_flags.value = in32(OCB_OCCFLG); - occ_flags.fields.i2c_engine3_lock_host = 1; - out32(OCB_OCCFLG, occ_flags.value); -#else - // TODO - OCB_OCCFLG_OR is currently not working in SIMICS 1/27/2016 occ_flags.fields.i2c_engine3_lock_host = 1; TRAC_INFO("host_i2c_lock_request - writing %04X to _OR(0x%08X)", occ_flags.value, OCB_OCCFLG_OR); out32(OCB_OCCFLG_OR, occ_flags.value); -#endif occ_flags.value = in32(OCB_OCCFLG); //TRAC_INFO("host_i2c_lock_request - 0x%08X returned value=0x%04X", OCB_OCCFLG, occ_flags.value); @@ -97,18 +86,6 @@ void host_i2c_lock_release() ocb_occmisc_t occmiscreg = {0}; ocb_occflg_t occ_flags = {0}; -#ifdef SIMICS_FLAG_ISSUE // NON-ATOMIC OPERATION - // clear external interrupt (so OCC can notify host when lock released) - occmiscreg.value = in32(OCB_OCCMISC); - occmiscreg.fields.core_ext_intr = 0; - out32(OCB_OCCMISC, occmiscreg.value); - - // Clear the host request - occ_flags.value = in32(OCB_OCCFLG); - occ_flags.fields.i2c_engine3_lock_host = 0; - out32(OCB_OCCFLG, occ_flags.value); -#else - // TODO - OCB_OCCFLG_CLR is currently not working in SIMICS 1/27/2016 // clear external interrupt (so OCC can notify host when lock released) occmiscreg.fields.core_ext_intr = 1; out32(OCB_OCCMISC_CLR, occmiscreg.value); @@ -117,7 +94,6 @@ void host_i2c_lock_release() occ_flags.fields.i2c_engine3_lock_host = 1; TRAC_INFO("host_i2c_lock_release - writing %04X to _CLR(0x%08X)", occ_flags.value, OCB_OCCFLG_CLR); out32(OCB_OCCFLG_CLR, occ_flags.value); -#endif occ_flags.value = in32(OCB_OCCFLG); //TRAC_INFO("host_i2c_lock_release - 0x%08X returned value=0x%04X", OCB_OCCFLG, occ_flags.value); @@ -157,23 +133,6 @@ void update_i2c_lock(const lockOperation_e i_op, const uint8_t i_engine) } #endif -#ifdef SIMICS_FLAG_ISSUE - // TODO - OCB_OCCFLG_OR is currently not working in SIMICS 1/27/2016 - // NON-ATOMIC OPERATION - occ_flags.value = in32(OCB_OCCFLG); - if (PIB_I2C_ENGINE_E == i_engine) - { - occ_flags.fields.i2c_engine3_lock_occ = i_op; - } - else if (PIB_I2C_ENGINE_D == i_engine) - { - occ_flags.fields.i2c_engine2_lock_occ = i_op; - } - else if (PIB_I2C_ENGINE_C == i_engine) - { - occ_flags.fields.i2c_engine1_lock_occ = i_op; - } -#else if (PIB_I2C_ENGINE_E == i_engine) { occ_flags.fields.i2c_engine3_lock_occ = 1; @@ -186,15 +145,10 @@ void update_i2c_lock(const lockOperation_e i_op, const uint8_t i_engine) { occ_flags.fields.i2c_engine1_lock_occ = 1; } -#endif if (LOCK_RELEASE == i_op) { -#ifdef SIMICS_FLAG_ISSUE - out32(OCB_OCCFLG, occ_flags.value); -#else out32(OCB_OCCFLG_CLR, occ_flags.value); -#endif // OCC had the lock and host wants it, so send interrupt to host notify_host(INTR_REASON_I2C_OWNERSHIP_CHANGE); @@ -203,11 +157,7 @@ void update_i2c_lock(const lockOperation_e i_op, const uint8_t i_engine) } else // LOCK_ACQUIRE { -#ifdef SIMICS_FLAG_ISSUE - out32(OCB_OCCFLG, occ_flags.value); -#else out32(OCB_OCCFLG_OR, occ_flags.value); -#endif TRAC_IMP("update_i2c_lock: OCC has aquired lock for I2C engine %d", i_engine); } @@ -221,7 +171,7 @@ void update_i2c_lock(const lockOperation_e i_op, const uint8_t i_engine) // If no engine is specified, locks for all I2C engines will be released void occ_i2c_lock_release(const uint8_t i_engine) { - TRAC_INFO("occ_i2c_lock_release(engine %d) called", i_engine); // TODO DEBUG + TRAC_INFO("occ_i2c_lock_release(engine %d) called", i_engine); if ((PIB_I2C_ENGINE_ALL == i_engine) || (PIB_I2C_ENGINE_E == i_engine) || (PIB_I2C_ENGINE_D == i_engine) || (PIB_I2C_ENGINE_C == i_engine)) diff --git a/src/occ_405/lock/lock.h b/src/occ_405/lock/lock.h index dc570f2..d7087b2 100644 --- a/src/occ_405/lock/lock.h +++ b/src/occ_405/lock/lock.h @@ -30,11 +30,6 @@ #include <dimm.h> -// TODO: remove testing code once SIMICS_FLAG_ISSUE removed -//#define DEBUG_LOCK_TESTING - - - // Release the OCC lock indefinitely // This should be called when OCC goes into safe mode or will be reset // to allow the host to use the specified I2C engines. diff --git a/src/occ_405/pgpe/pgpe_interface.c b/src/occ_405/pgpe/pgpe_interface.c index 5dfb830..f01dbfe 100644 --- a/src/occ_405/pgpe/pgpe_interface.c +++ b/src/occ_405/pgpe/pgpe_interface.c @@ -564,6 +564,9 @@ int pgpe_clip_update(void) int rc = 0; // return code errlHndl_t err = NULL; // Error handler uint32_t l_wait_time = 0; + static uint64_t L_last_list = 0xFFFFFFFFFFFFFFFF; + static bool L_first_trace = TRUE; + do { // Caller must check the completion of previous invocation of clip updates. @@ -614,9 +617,35 @@ int pgpe_clip_update(void) if (!G_simics_environment) { - // Set clip bounds - memset(G_clip_update_parms.ps_val_clip_min, proc_freq2pstate(g_amec->sys.fmin), MAXIMUM_QUADS); - memcpy(G_clip_update_parms.ps_val_clip_max, G_desired_pstate, sizeof(G_desired_pstate)); + unsigned int quad = 0; + uint64_t pstate_list = 0; + for (quad = 0; quad < MAXIMUM_QUADS; quad++) + { + pstate_list |= ((uint64_t) G_desired_pstate[quad] << ((7-quad)*8)); + + // Set clip bounds + G_clip_update_parms.ps_val_clip_min[quad] = proc_freq2pstate(g_amec->sys.fmin); + G_clip_update_parms.ps_val_clip_max[quad] = G_desired_pstate[quad]; + } + + + if (pstate_list != L_last_list) + { + if (L_first_trace) + { + TRAC_IMP("pgpe_clip_update: Scheduling clip update: min[0x%02X], max[0x%08X%04X]", + G_clip_update_parms.ps_val_clip_min[0], + WORD_HIGH(pstate_list), WORD_LOW(pstate_list)>>16); + L_first_trace = FALSE; + } + else + { + TRAC_INFO("pgpe_clip_update: Scheduling clip update: min[0x%02X], max[0x%08X%04X]", + G_clip_update_parms.ps_val_clip_min[0], + WORD_HIGH(pstate_list), WORD_LOW(pstate_list)>>16); + } + L_last_list = pstate_list; + } // Schedule PGPE clip update IPC task rc = gpe_request_schedule(&G_clip_update_req); @@ -735,6 +764,14 @@ int pgpe_start_suspend(uint8_t action, PMCR_OWNER owner) if (!G_simics_environment) { + if (action == PGPE_ACTION_PSTATE_START) + { + TRAC_IMP("pgpe_start_suspend: scheduling enable of pstates (owner=0x%02X)", owner); + } + else if (action == PGPE_ACTION_PSTATE_STOP) + { + TRAC_IMP("pgpe_start_suspend: scheduling disable of pstates (owner=0x%02X)", owner); + } // Schedule PGPE start_suspend task rc = gpe_request_schedule(&G_start_suspend_req); } diff --git a/src/occ_405/proc/proc_pstate.c b/src/occ_405/proc/proc_pstate.c index a66908d..90a9deb 100755 --- a/src/occ_405/proc/proc_pstate.c +++ b/src/occ_405/proc/proc_pstate.c @@ -410,6 +410,9 @@ void check_for_opal_updates(void) (G_opal_dynamic_table.dynamic.mem_throt_status != G_amec_opal_mem_throt_reason) ) // Mem throttle status changed { throttle_change = true; + TRAC_INFO("check_for_opal_updates: throttle status change - proc 0x%02X->0x%02X, mem: 0x%02X->0x%02X", + G_opal_dynamic_table.dynamic.proc_throt_status, G_amec_opal_proc_throt_reason, + G_opal_dynamic_table.dynamic.mem_throt_status, G_amec_opal_mem_throt_reason); update_dynamic_opal_data(); } @@ -422,6 +425,16 @@ void check_for_opal_updates(void) G_opal_dynamic_table.dynamic.max_power_cap != G_master_pcap_data.max_pcap || G_opal_dynamic_table.dynamic.current_power_cap != G_master_pcap_data.current_pcap ) { + if (G_opal_dynamic_table.dynamic.occ_state != CURRENT_STATE()) + TRAC_INFO("check_for_opal_updates: state changed from 0x%02X->0x%02X", G_opal_dynamic_table.dynamic.occ_state, CURRENT_STATE()); + if (G_opal_dynamic_table.dynamic.quick_power_drop != AMEC_INTF_GET_OVERSUBSCRIPTION()) + TRAC_INFO("check_for_opal_updates: qpd changed from 0x%02X->0x%02X", G_opal_dynamic_table.dynamic.quick_power_drop, AMEC_INTF_GET_OVERSUBSCRIPTION()); + if (G_opal_dynamic_table.dynamic.power_cap_type != G_master_pcap_data.source || + G_opal_dynamic_table.dynamic.min_power_cap != G_master_pcap_data.soft_min_pcap || + G_opal_dynamic_table.dynamic.max_power_cap != G_master_pcap_data.max_pcap || + G_opal_dynamic_table.dynamic.current_power_cap != G_master_pcap_data.current_pcap) + TRAC_INFO("check_for_opal_updates: power cap change"); + update_dynamic_opal_data(); } @@ -443,12 +456,10 @@ void check_for_opal_updates(void) // End Function Specification void update_dynamic_opal_data (void) { - TRAC_INFO("update_dynamic_opal_data: populate dynamic OPAL data"); // Initialize the opal table in SRAM (sets valid bit) populate_opal_dynamic_data(); // copy sram image into mainstore HOMER populate_opal_tbl_to_mem(OPAL_DYNAMIC); - TRAC_IMP("update_dynamic_opal_data: updated dynamic OPAL data"); } |