diff options
Diffstat (limited to 'src/ppe/pk/std/std_common.h')
| -rw-r--r-- | src/ppe/pk/std/std_common.h | 22 |
1 files changed, 17 insertions, 5 deletions
diff --git a/src/ppe/pk/std/std_common.h b/src/ppe/pk/std/std_common.h index e709f67..ef17fda 100644 --- a/src/ppe/pk/std/std_common.h +++ b/src/ppe/pk/std/std_common.h @@ -5,7 +5,7 @@ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015 */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -36,7 +36,7 @@ /// #ifndef __ASSEMBLER__ -#include <stdint.h> + #include <stdint.h> #endif //#include "cmehw_interrupts.h" @@ -44,6 +44,7 @@ #include "std_irq_config.h" #ifdef __ASSEMBLER__ +// *INDENT-OFF* /// This macro contains standard PPE code for determining what IRQ caused the /// external exception handler to be invoked by the PPE @@ -53,15 +54,25 @@ /// /// r1, r2, r3, and r13 must not be modified. All other registers may be used. /// +/// The pk_unified_irq_prty_mask_handler routine MUST return the task priority +/// interrupt vector in d5. +/// .macro hwmacro_get_ext_irq - + +#ifdef UNIFIED_IRQ_HANDLER_CME + // Unified approach. + _liw r5, pk_unified_irq_prty_mask_handler + mtlr r5 + blrl // On return, d5 contains task prty irq vec. +#else _lvdg d5, STD_LCL_EISTR #load the 64bit interrupt status into d5 +#endif cntlzw r4, r5 cmpwible r4, 31, call_external_irq_handler #branch if irq is lt or eq to 31 - + ## No IRQ pending in r5. Try r6. ## Note: irq # will be 64 (phantom irq) if no bits were set in either register - + cntlzw r4, r6 addi r4, r4, 32 @@ -73,6 +84,7 @@ .std_irq_cfg_bitmaps .endm +// *INDENT-ON* #endif /* __ASSEMBLER__ */ #endif /* __STD_COMMON_H__ */ |
