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-rwxr-xr-xsrc/Makefile48
-rwxr-xr-xsrc/gpe_export.h13
-rwxr-xr-xsrc/occBootLoader/Makefile62
-rwxr-xr-xsrc/occBootLoader/bootMain.c215
-rwxr-xr-xsrc/occBootLoader/bootMain.h67
-rwxr-xr-xsrc/occBootLoader/bootfiles.mk10
-rwxr-xr-xsrc/occBootLoader/imageHdrScript.c661
-rw-r--r--src/occBootLoader/img_defs.mk287
-rwxr-xr-xsrc/occBootLoader/linkboot.cmd75
-rw-r--r--src/occBootLoader/occLinkInputFile26
-rwxr-xr-xsrc/occ_405/cmdh/cmdh_fsp_cmds.c4
-rw-r--r--src/occ_405/img_defs.mk15
-rwxr-xr-xsrc/occ_405/incl/common_types.h36
-rwxr-xr-xsrc/occ_405/main.c7
-rw-r--r--src/occ_gpe0/Makefile8
-rw-r--r--src/occ_gpe0/gpe0_main.c2
-rwxr-xr-xsrc/occ_gpe0/gpe_export.h41
-rw-r--r--src/occ_gpe0/gpe_util.c3
-rw-r--r--src/occ_gpe0/img_defs.mk10
-rw-r--r--src/occ_gpe0/link.cmd31
-rw-r--r--src/occ_gpe0/topfiles.mk2
-rw-r--r--src/occ_gpe1/Makefile30
-rw-r--r--src/occ_gpe1/img_defs.mk10
-rw-r--r--src/occ_gpe1/link.cmd42
-rw-r--r--src/ssx/ppc405/ppc405_exceptions.S6
25 files changed, 1275 insertions, 436 deletions
diff --git a/src/Makefile b/src/Makefile
index b355147..7e62780 100755
--- a/src/Makefile
+++ b/src/Makefile
@@ -5,7 +5,7 @@
#
# OpenPOWER OnChipController Project
#
-# Contributors Listed Below - COPYRIGHT 2014,2015
+# Contributors Listed Below - COPYRIGHT 2014,2016
# [+] International Business Machines Corp.
#
#
@@ -46,28 +46,41 @@ THASH = $(PPETRACEPP_DIR)/tracehash.pl
OCC_405_IMAGE_NAME = occ_405
OCC_GPE0_IMAGE_NAME = occ_gpe0
OCC_GPE1_IMAGE_NAME = occ_gpe1
+OCC_BOOTLOADER_DIR_NAME = occBootLoader
+OCC_BOOTLOADER_NAME = bootloader
+IMAGE_HDR_SCRIPT = imageHdrScript
+
+COMBINE_IMAGE_SUBDIRS = occBootLoader occ_405 occ_gpe0 occ_gpe1
+COMBINEIMAGE = $(MAKE) combineImage -C $(dir)
+IMAGEFILE = $(OBJDIR)/image.bin
NEEDED_IMAGES = \
$(TRACEPP_DIR)/tracepp \
+ $(OBJDIR)/$(OCC_BOOTLOADER_DIR_NAME)/$(IMAGE_HDR_SCRIPT) \
$(OBJDIR)/$(OCC_405_IMAGE_NAME)/$(OCC_405_IMAGE_NAME).out \
$(OBJDIR)/$(OCC_GPE0_IMAGE_NAME)/$(OCC_GPE0_IMAGE_NAME).out \
- $(OBJDIR)/$(OCC_GPE1_IMAGE_NAME)/$(OCC_GPE1_IMAGE_NAME).out
-
-#SIMICS_WS = /gsa/ausgsa/home/d/a/davidy/work/simics-ppeWork
-
-#default is to build images
-needed_images: $(NEEDED_IMAGES) tracehash
-
-run: $(NEEDED_IMAGES)
- $(SIMICS_WS)/simics \
- -e '$$occ_405_binary_to_load=$(OBJDIR)/$(OCC_405_IMAGE_NAME)/$(OCC_405_IMAGE_NAME).out' \
- -e '$$occ_gpe0_binary_to_load=$(OBJDIR)/$(OCC_GPE0_IMAGE_NAME)/$(OCC_GPE0_IMAGE_NAME).out' \
- -e '$$occ_gpe1_binary_to_load=$(OBJDIR)/$(OCC_GPE1_IMAGE_NAME)/$(OCC_GPE1_IMAGE_NAME).out' \
- modelsetup.simics
-
-
+ $(OBJDIR)/$(OCC_GPE1_IMAGE_NAME)/$(OCC_GPE1_IMAGE_NAME).out \
+ $(OBJDIR)/$(OCC_BOOTLOADER_DIR_NAME)/$(OCC_BOOTLOADER_NAME).out \
+
+.PHONY : all
+all: $(NEEDED_IMAGES) combineImage tracehash
+
+.PHONY : needed_images
+needed_images: $(NEEDED_IMAGES)
+
+.PHONY : combineImage
+combineImage: $(NEEDED_IMAGES)
+ rm -rf $(IMAGEFILE)
+ BASE_OBJDIR=$(BASE_OBJDIR) $(OBJDIR)/$(OCC_BOOTLOADER_DIR_NAME)/$(IMAGE_HDR_SCRIPT) \
+ $(OBJDIR)/$(OCC_BOOTLOADER_DIR_NAME)/$(OCC_BOOTLOADER_NAME).bin \
+ $(OBJDIR)/$(OCC_405_IMAGE_NAME)/$(OCC_405_IMAGE_NAME).bin \
+ $(OBJDIR)/$(OCC_GPE0_IMAGE_NAME)/$(OCC_GPE0_IMAGE_NAME).bin \
+ $(OBJDIR)/$(OCC_GPE1_IMAGE_NAME)/$(OCC_GPE1_IMAGE_NAME).bin \
+ t2 \
+ `md5sum $(OBJDIR)/$(OCC_405_IMAGE_NAME)/$(OCC_405_IMAGE_NAME).bin | cut -c 1-4`
#clean the obj directory
+.PHONY : clean
clean:
rm -fr $(OBJDIR)
rm -f $(TRACEPP_DIR)/tracepp
@@ -82,6 +95,9 @@ $(OBJDIR)/$(OCC_GPE0_IMAGE_NAME)/$(OCC_GPE0_IMAGE_NAME).out:
$(OBJDIR)/$(OCC_GPE1_IMAGE_NAME)/$(OCC_GPE1_IMAGE_NAME).out:
(cd $(SRCDIR)/$(OCC_GPE1_IMAGE_NAME) && make)
+$(OBJDIR)/$(OCC_BOOTLOADER_DIR_NAME)/$(OCC_BOOTLOADER_NAME).out $(OBJDIR)/$(OCC_BOOTLOADER_DIR_NAME)/$(IMAGE_HDR_SCRIPT):
+ (cd $(SRCDIR)/$(OCC_BOOTLOADER_DIR_NAME) && make)
+
$(TRACEPP_DIR)/tracepp:
(cd $(TRACEPP_DIR) && make)
diff --git a/src/gpe_export.h b/src/gpe_export.h
index 6d0bfe0..061866f 100755
--- a/src/gpe_export.h
+++ b/src/gpe_export.h
@@ -1,11 +1,11 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: src/occ_405/gpe/gpe_export.h $ */
+/* $Source: src/gpe_export.h $ */
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2011,2015 */
+/* Contributors Listed Below - COPYRIGHT 2011,2016 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -77,5 +77,14 @@ typedef struct
uint8_t temp;
} dimm_sm_args_t;
+// Arguments for doing a SCOM from GPE0
+typedef struct ipc_scom_op
+{
+ uint32_t addr; // Register address
+ uint64_t data; // Data for read/write
+ uint32_t size; // Size of data buffer
+ uint8_t read; // Read (1) or write (0)
+ GpeErrorStruct error; // Error of SCOM operation
+} ipc_scom_op_t;
#endif //_GPE_EXPORT_H
diff --git a/src/occBootLoader/Makefile b/src/occBootLoader/Makefile
index 1e8c916..727b3da 100755
--- a/src/occBootLoader/Makefile
+++ b/src/occBootLoader/Makefile
@@ -1,12 +1,11 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: src/occBootLoader/Makefile$
+# $Source: src/occBootLoader/Makefile $
#
# OpenPOWER OnChipController Project
#
-# Contributors Listed Below - COPYRIGHT 2011,2014
-# [+] Google Inc.
+# Contributors Listed Below - COPYRIGHT 2011,2016
# [+] International Business Machines Corp.
#
#
@@ -14,7 +13,7 @@
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
-# http://www.apache.org/licenses/LICENSE-2.0
+# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
@@ -24,58 +23,47 @@
#
# IBM_PROLOG_END_TAG
-ifndef ROOTPATH
-ROOTPATH = $(shell pwd)/../
-export OCCROOT = $(ROOTPATH)
-endif
+include img_defs.mk
+include bootfiles.mk
#*******************************************************************************
# Variables
#*******************************************************************************
-OCC = ../occ
-BOOTLOADER = .
-SSX = ../ssx
-
-#*******************************************************************************
-# Includes
-#*******************************************************************************
-include bootfiles.mk
-include ../ssx/pgp/ssx.mk
-
-INCLUDES = -I. -I$(SSX)/ppc32 -I$(SSX)/pgp -I$(OCC)/incl -I$(OCC)/ -I$(SSX)/ppc405
+OBJECTS = $(addprefix $(OBJDIR)/, $(notdir ${BOOTLOADER_OBJECTS}))
+LINK_SCRIPT = $(OBJDIR)/linkscript
+EXECUTABLE = $(OBJDIR)/bootloader
+imageHdrScript = $(OBJDIR)/imageHdrScript
+imageHdrScript_CC = gcc
#*******************************************************************************
# Flags
#*******************************************************************************
-OBJECTS = ${BOOTLOADER_OBJECTS}
-EXECUTABLE = bootloader
-imageHdrScript = imageHdrScript
-imageHdrScript_CC = gcc
-
DEFS += $(D)
#*******************************************************************************
# Compilation
#*******************************************************************************
-
-all: ${BOOTLOADER_OBJECTS} imageHdrScript
- $(CPP) -P $(DEFS) < linkboot.cmd > linkscript
- $(LD) ${BOOTLOADER_OBJECTS} -Tlinkscript $(LDFLAGS) -zmuldefs -Map $(EXECUTABLE).map -melf32ppc --oformat=elf32-powerpc -Bstatic -o $(EXECUTABLE).out
+.PHONY : all
+all: $(OBJDIR) ${OBJECTS} ${imageHdrScript}
+ $(CPP) -P $(DEFS) < linkboot.cmd > $(LINK_SCRIPT)
+ $(LD) ${OBJECTS} -T$(LINK_SCRIPT) $(LDFLAGS) -zmuldefs -Map $(EXECUTABLE).map -melf32ppc --oformat=elf32-powerpc -Bstatic -o $(EXECUTABLE).out -L$(OBJDIR)
$(OBJCOPY) -I elf32-powerpc -O binary $(EXECUTABLE).out $(EXECUTABLE).bin
$(OBJDUMP) -d $(EXECUTABLE).out > $(EXECUTABLE).dis
- $(BOOTLOADER)/$(imageHdrScript) $(EXECUTABLE).bin t1
-.PHONY : combineImage
-combineImage:
- $(BOOTLOADER)/imageHdrScript $(EXECUTABLE).bin combineImage
- $(BOOTLOADER)/imageHdrScript $(EXECUTABLE).out displaySize
+$(OBJDIR)/imageHdrScript: imageHdrScript.c
+ $(imageHdrScript_CC) -g $(LDFLAGS) -I. -I$(OCC405_INCLDIR)/ -I$(OCC405_SRCDIR)/ imageHdrScript.c -o $(OBJDIR)/imageHdrScript
+
+$(OBJDIR)/occbuildname.o:
+ $(TCC) $(CFLAGS) $(DEFS) -o $@ $(OCC405_SRCDIR)/occbuildname.c
-imageHdrScript: imageHdrScript.c
- $(imageHdrScript_CC) $(LDFLAGS) -I$(BOOTLOADER) -I$(OCC)/incl -I$(OCC)/ imageHdrScript.c -o $@
+$(OBJDIR)/savegpr.o:
+ $(TCPP) $(CFLAGS) $(DEFS) -o $@ $(SSX_SRCDIR)/ppc32/savegpr.S
+$(OBJDIR):
+ mkdir -p $(OBJDIR)
#*******************************************************************************
# Clean
#*******************************************************************************
+.PHONY : clean
clean:
- rm -f *.o *.d *.out *.bin *.srec *.dis *.map linkscript imageHdrScript
- rm -rf $(EXECUTABLE) $(IMAGE_FILE)
+ rm -rf $(OBJDIR)
diff --git a/src/occBootLoader/bootMain.c b/src/occBootLoader/bootMain.c
index b90c046..89ea20a 100755
--- a/src/occBootLoader/bootMain.c
+++ b/src/occBootLoader/bootMain.c
@@ -5,10 +5,10 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* COPYRIGHT International Business Machines Corp. 2011,2014 */
-/* [+] Google Inc. */
+/* Contributors Listed Below - COPYRIGHT 2014,2016 */
/* [+] International Business Machines Corp. */
/* */
+/* */
/* Licensed under the Apache License, Version 2.0 (the "License"); */
/* you may not use this file except in compliance with the License. */
/* You may obtain a copy of the License at */
@@ -27,7 +27,7 @@
// Includes
//*************************************************************************
#include <bootMain.h> // boot loader defines
-#include <pgp_common.h> // Nest frequency constant
+#include <occhw_common.h> // Nest frequency constant
#include <stddef.h> // offsetof
//*************************************************************************
@@ -62,8 +62,10 @@ IMAGE_HEADER(G_bootImageHdr,__boot_low_level_init,BOOT_LOADER_ID,
//*************************************************************************
//Forward declaration
uint32_t boot_test_sram();
-uint32_t boot_load_image(const imageHdr_t *i_hdrAddr);
-uint32_t calChecksum(const uint32_t i_startAddr ,const uint32_t i_sz);
+uint32_t boot_load_405(const imageHdr_t *i_hdrAddr);
+uint32_t boot_load_gpe0(uint32_t i_startAddr, uint32_t i_size, uint8_t * i_srcPtr);
+uint32_t boot_load_gpe1(uint32_t i_startAddr, uint32_t i_size, uint8_t * i_srcPtr);
+uint32_t calChecksum(const uint32_t i_startAddr ,const uint32_t i_sz, bool i_gpeFile);
//*************************************************************************
// Functions
@@ -80,7 +82,14 @@ uint32_t calChecksum(const uint32_t i_startAddr ,const uint32_t i_sz);
void main()
{
uint32_t l_rc = 0;
+ uint32_t l_gpe0_start_addr = 0;
+ uint32_t l_gpe1_start_addr = 0;
+ uint32_t l_gpe_size = 0;
+ uint8_t* l_gpe0_src_ptr = 0;
+ uint8_t* l_gpe1_src_ptr = 0;
+
// set checkpoint to boot test SRAM
+
WRITE_TO_SPRG0(BOOT_TEST_SRAM_CHKPOINT);
#ifndef VPO
@@ -104,7 +113,7 @@ void main()
WRITE_TO_SPRG0(BOOT_LOAD_IMAGE_CHKPOINT);
// Load main application image to SRAM including main application header
- l_rc = boot_load_image(l_hdrPtr);
+ l_rc = boot_load_405(l_hdrPtr);
// If failed to load image, write failed return code to SPRG1 and halt
if(0 != l_rc)
@@ -112,18 +121,74 @@ void main()
WRITE_TO_SPRG1_AND_HALT(l_rc);
}
+ // set checkpoint to load gpe0 into SRAM
+ WRITE_TO_SPRG0(BOOT_LOAD_GPE0_CHKPOINT);
+
+ // Load GPE0
+ l_gpe0_start_addr = (uint32_t) (((uint32_t) l_hdrPtr) + l_hdrPtr->image_size);
+ l_gpe0_src_ptr = (uint8_t*) (((uint32_t)l_hdrPtr) + l_hdrPtr->image_size);
+
+ l_rc = boot_load_gpe0(l_gpe0_start_addr, l_hdrPtr->gpe0_size, l_gpe0_src_ptr);
+
+ if(0 != l_rc)
+ {
+ WRITE_TO_SPRG1_AND_HALT(l_rc);
+ }
+
+ WRITE_TO_SPRG0(BOOT_LOAD_GPE1_CHKPOINT);
+
+ // Load GPE1
+ l_gpe1_start_addr = l_gpe0_start_addr + l_hdrPtr->gpe0_size;
+ l_gpe1_src_ptr = (uint8_t*) (((uint32_t)l_gpe0_src_ptr) + l_hdrPtr->gpe0_size);
+
+ l_rc = boot_load_gpe1(l_gpe1_start_addr, l_hdrPtr->gpe1_size, l_gpe1_src_ptr);
+
+ if(0 != l_rc)
+ {
+ WRITE_TO_SPRG1_AND_HALT(l_rc);
+ }
+
+ //==========================================
+ // Calculate checksums and verify they match
+ //==========================================
+
// set checkpoint to calculate checksum
- WRITE_TO_SPRG0(BOOT_CALCULTE_CHKSUM_CHKPOINT);
+ WRITE_TO_SPRG0(BOOT_CALCULTE_CHKSUM_CHKPOINT_405);
- // calculate checksum for the SRAM main application image
+ // Calculate checksum for 405 SRAM
uint32_t l_checksum = calChecksum(l_hdrPtr->start_addr,
- l_hdrPtr->image_size);
+ l_hdrPtr->image_size,
+ false);
// If checksum does not match, store bad checksum into SPRG1 and halt
if(l_checksum != l_hdrPtr->checksum)
{
WRITE_TO_SPRG1_AND_HALT(l_checksum);
}
+ WRITE_TO_SPRG0(BOOT_CALCULTE_CHKSUM_CHKPOINT_GPE0);
+
+ // Calculate checksum for GPE0 SRAM
+ l_checksum = calChecksum(SRAM_START_ADDRESS_GPE0,
+ l_hdrPtr->gpe0_size,
+ true);
+
+ // If checksum does not match, store bad checksum into SPRG1 and halt
+ if(l_checksum != l_hdrPtr->gpe0_checksum)
+ {
+ WRITE_TO_SPRG1_AND_HALT(l_checksum);
+ }
+ WRITE_TO_SPRG0(BOOT_CALCULTE_CHKSUM_CHKPOINT_GPE1);
+
+ // Calculate checksum for GPE1 SRAM
+ l_checksum = calChecksum(SRAM_START_ADDRESS_GPE1,
+ l_hdrPtr->gpe1_size,
+ true);
+
+ // If checksum does not match, store bad checksum into SPRG1 and halt
+ if(l_checksum != l_hdrPtr->gpe1_checksum)
+ {
+ WRITE_TO_SPRG1_AND_HALT(l_checksum);
+ }
// set checkpoint to get nest frequency
WRITE_TO_SPRG0(BOOT_GET_NEST_FREQ_CHKPOINT);
@@ -151,7 +216,7 @@ void main()
// checksum
//
// End Function Specification
-uint32_t calChecksum(const uint32_t i_startAddr, const uint32_t i_sz)
+uint32_t calChecksum(const uint32_t i_startAddr, const uint32_t i_sz, bool i_gpeFile)
{
uint32_t l_checksum = 0;
uint32_t l_counter = 0;
@@ -159,13 +224,29 @@ uint32_t calChecksum(const uint32_t i_startAddr, const uint32_t i_sz)
while(l_counter < i_sz)
{
- l_checksum += (*(l_srcPtr + l_counter));
- l_counter = l_counter + 1;
- if(l_counter == (uint32_t)(offsetof(imageHdr_t,checksum)))
+ if( (l_counter == (uint32_t)(offsetof(imageHdr_t,checksum))) &&
+ !i_gpeFile )
{
l_counter = ((uint32_t)(offsetof(imageHdr_t,checksum)) +
sizeof(G_bootImageHdr.checksum));
}
+ else if ( (l_counter == (uint32_t)(offsetof(imageHdr_t,gpe0_checksum))) &&
+ !i_gpeFile )
+ {
+ l_counter = ((uint32_t)(offsetof(imageHdr_t,gpe0_checksum)) +
+ sizeof(G_bootImageHdr.gpe0_checksum));
+ }
+ else if ( (l_counter == (uint32_t)(offsetof(imageHdr_t,gpe1_checksum))) &&
+ !i_gpeFile )
+ {
+ l_counter = ((uint32_t)(offsetof(imageHdr_t,gpe1_checksum)) +
+ sizeof(G_bootImageHdr.gpe1_checksum));
+ }
+ else
+ {
+ l_checksum += (*(l_srcPtr + l_counter));
+ l_counter = l_counter + 1;
+ }
}
return l_checksum;
@@ -175,27 +256,27 @@ uint32_t calChecksum(const uint32_t i_startAddr, const uint32_t i_sz)
//
// Name: boot_load_image
//
-// Description: This function copies main application image from main memory
-// to SRAM
+// Description: This function copies main application (405)
+// image from main memory to SRAM
//
// End Function Specification
-uint32_t boot_load_image(const imageHdr_t *i_hdrAddr)
+uint32_t boot_load_405(const imageHdr_t* i_hdrAddr)
{
uint32_t l_rc = 0x0;
- uint32_t l_mainAppDestRang = (i_hdrAddr->start_addr) +
+ uint32_t l_mainAppDestRange = (i_hdrAddr->start_addr) +
(i_hdrAddr->image_size-1);
// Make sure main application destination rang address falls within SRAM
// range.
- if((l_mainAppDestRang < SRAM_START_ADDRESS) ||
- (l_mainAppDestRang > SRAM_END_ADDRESS))
+ if((l_mainAppDestRange < SRAM_START_ADDRESS_405) ||
+ (l_mainAppDestRange > SRAM_END_ADDRESS_405))
{
- // Return destination rang address if address is out of range and
+ // Return destination range address if address is out of range and
// address is not zero. If address is zero, then return eye-catcher
// address.
- if(l_mainAppDestRang != 0)
+ if(l_mainAppDestRange != 0)
{
- l_rc = l_mainAppDestRang;
+ l_rc = l_mainAppDestRange;
}
else
{
@@ -203,8 +284,8 @@ uint32_t boot_load_image(const imageHdr_t *i_hdrAddr)
}
}
// Make sure main application start address falls within SRAM range
- else if((i_hdrAddr->start_addr < SRAM_START_ADDRESS) ||
- (i_hdrAddr->start_addr > SRAM_END_ADDRESS))
+ else if((i_hdrAddr->start_addr < SRAM_START_ADDRESS_405) ||
+ (i_hdrAddr->start_addr > SRAM_END_ADDRESS_405))
{
// Return start address if address is out of range and
// address is not zero. If address is zero, then return eye-catcher
@@ -222,9 +303,7 @@ uint32_t boot_load_image(const imageHdr_t *i_hdrAddr)
{
// At this point we know that main application destination address
// is within SRAM range.
- // Now copy main application header specified
- // size of data from main memory to main application header specified
- // start address.
+ // Now copy main application (405) from main memory to SRAM.
uint8_t *l_srcPtr = (uint8_t *)(i_hdrAddr);
uint8_t *l_destPtr = (uint8_t *)(i_hdrAddr->start_addr);
uint32_t l_numWords = i_hdrAddr->image_size;
@@ -234,13 +313,93 @@ uint32_t boot_load_image(const imageHdr_t *i_hdrAddr)
*l_destPtr = *l_srcPtr;
l_destPtr++;
l_srcPtr++;
- l_numWords = l_numWords - 1;
+ l_numWords--;
}
}
return l_rc;
}
+uint32_t boot_load_gpe0(uint32_t i_startAddr, uint32_t i_size, uint8_t * i_srcPtr)
+{
+ uint8_t* l_srcPtr = i_srcPtr;
+ uint32_t l_rc = 0x0;
+ uint32_t l_gpe0DestRange = SRAM_START_ADDRESS_GPE0 + i_size - 1;
+
+ // Make sure GPE0 destination range address falls within its SRAM range.
+ if(l_gpe0DestRange > SRAM_END_ADDRESS_GPE0)
+ {
+ // Return destination range address if address is out of range and
+ // address is not zero. If address is zero, then return eye-catcher
+ // address.
+ if(l_gpe0DestRange != 0)
+ {
+ l_rc = l_gpe0DestRange;
+ }
+ else
+ {
+ l_rc = EYE_CATCHER_ADDRESS;
+ }
+ }
+ else
+ {
+ // At this point we know that the destination address of GPE0
+ // is within SRAM range. Now copy GPE0 from main memory to SRAM.
+ uint8_t *l_destPtr = (uint8_t *)(SRAM_START_ADDRESS_GPE0);
+ uint32_t l_numWords = i_size;
+
+ while(l_numWords != 0)
+ {
+ *l_destPtr = *l_srcPtr;
+ l_destPtr++;
+ l_srcPtr++;
+ l_numWords--;
+ }
+ }
+
+ return l_rc;
+}
+
+
+uint32_t boot_load_gpe1(uint32_t i_startAddr, uint32_t i_size, uint8_t * i_srcPtr)
+{
+ uint8_t* l_srcPtr = i_srcPtr;
+ uint32_t l_rc = 0x0;
+ uint32_t l_gpe1DestRange = SRAM_START_ADDRESS_GPE1 + i_size - 1;
+
+ // Make sure GPE1 destination range address falls within its SRAM range.
+ if (l_gpe1DestRange > SRAM_END_ADDRESS_GPE1)
+ {
+ // Return destination range address if address is out of range and
+ // address is not zero. If address is zero, then return eye-catcher
+ // address.
+ if(l_gpe1DestRange != 0)
+ {
+ l_rc = l_gpe1DestRange;
+ }
+ else
+ {
+ l_rc = EYE_CATCHER_ADDRESS;
+ }
+ }
+ else
+ {
+ // At this point we know that the destination address of GPE1
+ // is within SRAM range. Now copy GPE1 from main memory to SRAM.
+ uint8_t *l_destPtr = (uint8_t *)(SRAM_START_ADDRESS_GPE1);
+ uint32_t l_numWords = i_size;
+
+ while(l_numWords != 0)
+ {
+ *l_destPtr = *l_srcPtr;
+ l_destPtr++;
+ l_srcPtr++;
+ l_numWords--;
+ }
+ }
+
+ return l_rc;
+}
// Function Specification
//
diff --git a/src/occBootLoader/bootMain.h b/src/occBootLoader/bootMain.h
index 35f63fd..f56aa8f 100755
--- a/src/occBootLoader/bootMain.h
+++ b/src/occBootLoader/bootMain.h
@@ -5,10 +5,10 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* COPYRIGHT International Business Machines Corp. 2011,2014 */
-/* [+] Google Inc. */
+/* Contributors Listed Below - COPYRIGHT 2014,2016 */
/* [+] International Business Machines Corp. */
/* */
+/* */
/* Licensed under the Apache License, Version 2.0 (the "License"); */
/* you may not use this file except in compliance with the License. */
/* You may obtain a copy of the License at */
@@ -26,27 +26,27 @@
#ifndef _bootMain_h
#define _bootMain_h
-//*************************************************************************
+//*************************************************************************/
// Includes
-//*************************************************************************
+//*************************************************************************/
#ifndef __ASSEMBLER__
#include <common_types.h> // defines imageHdr_t and other types
#endif /* __ASSEMBLER__ */
-//*************************************************************************
+//*************************************************************************/
// Externs
-//*************************************************************************
+//*************************************************************************/
-//*************************************************************************
+//*************************************************************************/
// Macros
-//*************************************************************************
+//*************************************************************************/
-//*************************************************************************
+//*************************************************************************/
// Defines/Enums
-//*************************************************************************
+//*************************************************************************/
#define MACHINE_CHECK_ENABLE 0x00001000
#define DATA_CACHE_BLOCK_ENABLE 0x00008000
-#define DATA_CACHE_BLOCK_ADDR 0x80000000
+#define DATA_CACHE_BLOCK_ADDR 0x00000000
#define DATA_CACHE_SIZE (16 * 1024)
#define CACHE_LINE_SIZE 32
#define DATA_CACHE_LINES (DATA_CACHE_SIZE/CACHE_LINE_SIZE)
@@ -58,20 +58,29 @@
typedef enum CHKPOINT
{
- BOOT_TEST_SRAM_CHKPOINT = 0x00000001,
- BOOT_LOAD_IMAGE_CHKPOINT = 0x00000002,
- BOOT_CALCULTE_CHKSUM_CHKPOINT= 0x00000003,
- BOOT_GET_NEST_FREQ_CHKPOINT = 0x00000004,
- BOOT_SSX_BOOT_CALL_CHKPOINT = 0x00000005,
- BOOT_SSX_RETURNED_CHKPOINT = 0x00000006
+ BOOT_TEST_SRAM_CHKPOINT = 0x00000001,
+ BOOT_LOAD_IMAGE_CHKPOINT = 0x00000002,
+ BOOT_LOAD_GPE0_CHKPOINT = 0x00000003,
+ BOOT_LOAD_GPE1_CHKPOINT = 0x00000004,
+ BOOT_CALCULTE_CHKSUM_CHKPOINT_405 = 0x00000005,
+ BOOT_CALCULTE_CHKSUM_CHKPOINT_GPE0 = 0x00000006,
+ BOOT_CALCULTE_CHKSUM_CHKPOINT_GPE1 = 0x00000007,
+ BOOT_GET_NEST_FREQ_CHKPOINT = 0x00000008,
+ BOOT_SSX_BOOT_CALL_CHKPOINT = 0x00000009,
+ BOOT_SSX_RETURNED_CHKPOINT = 0x0000000A
}CHKPOINT;
#endif /* __ASSEMBLER__ */
-#define SRAM_TEST_START_ADDRESS 0xFFF80040
-#define SRAM_START_ADDRESS 0xFFF80000
-#define SRAM_TEST_END_ADDRESS 0xFFFFFBFF
-#define SRAM_END_ADDRESS 0xFFFFFFFF
+#define SRAM_TEST_START_ADDRESS 0xFFF00000
+#define SRAM_START_ADDRESS_FULL 0xFFF00000
+#define SRAM_START_ADDRESS_405 0xFFF40000
+#define SRAM_START_ADDRESS_GPE0 0xFFF01000
+#define SRAM_START_ADDRESS_GPE1 0xFFF10000
+#define SRAM_TEST_END_ADDRESS 0xFFFBFFFF
+#define SRAM_END_ADDRESS_405 0xFFFBFFFF
+#define SRAM_END_ADDRESS_GPE0 0xFFF0FFFF
+#define SRAM_END_ADDRESS_GPE1 0xFFF1FFFF
#define SRAM_TEST_BIT_PATTERN 0xA5A5A5A5
#define EYE_CATCHER_ADDRESS 0x1234ABCD
@@ -84,21 +93,21 @@ typedef enum CHKPOINT
#define WRITE_TO_SPRG1_AND_HALT(rc) \
({__asm__ __volatile__ ("mtsprg1 %0;" "tw 31,0,0;": : "r" (rc));})
-//*************************************************************************
+//*************************************************************************/
// Structures
-//*************************************************************************
+//*************************************************************************/
-//*************************************************************************
+//*************************************************************************/
// Globals
-//*************************************************************************
+//*************************************************************************/
-//*************************************************************************
+//*************************************************************************/
// Function Prototypes
-//*************************************************************************
+//*************************************************************************/
-//*************************************************************************
+//*************************************************************************/
// Functions
-//*************************************************************************
+//*************************************************************************/
#endif // _bootMain_h
diff --git a/src/occBootLoader/bootfiles.mk b/src/occBootLoader/bootfiles.mk
index 8eeca95..e9b6940 100755
--- a/src/occBootLoader/bootfiles.mk
+++ b/src/occBootLoader/bootfiles.mk
@@ -1,12 +1,11 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: src/occBootLoader/bootfiles.mk$
+# $Source: src/occBootLoader/bootfiles.mk $
#
# OpenPOWER OnChipController Project
#
-# Contributors Listed Below - COPYRIGHT 2011,2014
-# [+] Google Inc.
+# Contributors Listed Below - COPYRIGHT 2011,2016
# [+] International Business Machines Corp.
#
#
@@ -14,7 +13,7 @@
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
-# http://www.apache.org/licenses/LICENSE-2.0
+# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
@@ -27,8 +26,7 @@
#*******************************************************************************
# INCLUDES
#*******************************************************************************
-C-SOURCES = bootMain.c ../occ/occbuildname.c
+C-SOURCES = bootMain.c ../occ_405/occbuildname.c
S-SOURCES = bootInit.S ../ssx/ppc32/savegpr.S
BOOTLOADER_OBJECTS = $(C-SOURCES:.c=.o) $(S-SOURCES:.S=.o)
-
diff --git a/src/occBootLoader/imageHdrScript.c b/src/occBootLoader/imageHdrScript.c
index 5cf5816..5a1a76d 100755
--- a/src/occBootLoader/imageHdrScript.c
+++ b/src/occBootLoader/imageHdrScript.c
@@ -5,10 +5,10 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* COPYRIGHT International Business Machines Corp. 2011,2014 */
-/* [+] Google Inc. */
+/* Contributors Listed Below - COPYRIGHT 2014,2016 */
/* [+] International Business Machines Corp. */
/* */
+/* */
/* Licensed under the Apache License, Version 2.0 (the "License"); */
/* you may not use this file except in compliance with the License. */
/* You may obtain a copy of the License at */
@@ -23,9 +23,9 @@
/* */
/* IBM_PROLOG_END_TAG */
-//*************************************************************************
+//*************************************************************************/
// Includes
-//*************************************************************************
+//*************************************************************************/
#include <sys/types.h>
#include <stdio.h>
#include <stdlib.h>
@@ -33,18 +33,20 @@
#include <stddef.h>
#include <string.h>
-//*************************************************************************
+//*************************************************************************/
// Externs
-//*************************************************************************
+//*************************************************************************/
-//*************************************************************************
+//*************************************************************************/
// Macros
-//*************************************************************************
+//*************************************************************************/
-//*************************************************************************
+//*************************************************************************/
// Defines/Enums
-//*************************************************************************
+//*************************************************************************/
#define CHECKSUM_FIELD_OFFSET offsetof(imageHdr_t, checksum)
+#define CHECKSUM_GPE0_FIELD_OFFSET offsetof(imageHdr_t, gpe0_checksum)
+#define CHECKSUM_GPE1_FIELD_OFFSET offsetof(imageHdr_t, gpe1_checksum)
#define CHECKSUM_FIELD_LEN 4
#define IMAGE_SZ_FIELD_OFFSET offsetof(imageHdr_t, image_size)
#define IMAGE_SZ_FIELD_LEN 4
@@ -57,34 +59,38 @@
#define VERSION_OFFSET offsetof(imageHdr_t, version)
#define VERSION_LEN 4
#define ID_STR_OFFSET offsetof(imageHdr_t, image_id_str)
+#define GPE0_SZ_FIELD_OFFSET offsetof(imageHdr_t, gpe0_size)
+#define GPE1_SZ_FIELD_OFFSET offsetof(imageHdr_t, gpe1_size)
#define ID_STR_LEN IMAGE_ID_STR_SZ
#define ADDRESS_MASK 0x03FFFFFC
-#define BRANCH_MASK 0x48000002
+#define ABS_BRANCH_MASK 0x48000002
+#define REL_BRANCH_MASK 0x48000000
+#define BRANCH_INSTR_OFFSET 0x40
#define DUMP_HDR_STR "dumpHdr"
#define COMBINE_IMAGE_STR "combineImage"
#define FILE_TO_WRITE_ODE "/obj/ppc/occc/405/image.bin"
-#define FILE_TO_WRITE_GNU "image.bin"
+#define FILE_TO_WRITE_GNU "/image.bin"
#define DISPLAY_SIZE "displaySize"
#define READELF_CMD "readelf -S "
#define PIPE_CMD " > elfdata "
#define ELF_FILE "elfdata"
#define ELF_FILE_REMOVE_CMD "rm elfdata"
-//*************************************************************************
+//*************************************************************************/
// Structures
-//*************************************************************************
+//*************************************************************************/
-//*************************************************************************
+//*************************************************************************/
// Globals
-//*************************************************************************
+//*************************************************************************/
-//*************************************************************************
+//*************************************************************************/
// Function Prototypes
-//*************************************************************************
+//*************************************************************************/
-//*************************************************************************
+//*************************************************************************/
// Functions
-//*************************************************************************
+//*************************************************************************/
// Function Specification
//
@@ -234,9 +240,8 @@ int displaySize(char * i_file)
// Description: Append input image to image.bin
//
// End Function Specification
-int combineImage(char * i_file1)
+int combineImage(FILE * i_file1)
{
- FILE * l_file1 = NULL;
FILE * l_file2 = NULL;
FILE * l_file = NULL;
int l_rc = SUCCESS_RC;
@@ -245,7 +250,7 @@ int combineImage(char * i_file1)
do
{
- char * l_sbPath = getenv("OCCROOT");
+ char * l_sbPath = getenv("BASE_OBJDIR");
if( l_sbPath != NULL)
{
l_size = strlen(l_sbPath);
@@ -262,7 +267,7 @@ int combineImage(char * i_file1)
}
else
{
- printf("Failed to get either SANDBOXBASE or OCCROOT environment variables\n");
+ printf("Failed to get either SANDBOXBASE or BASE_OBJDIR environment variables\n");
l_rc = FAILURE_RC;
break;
}
@@ -281,58 +286,46 @@ int combineImage(char * i_file1)
l_fileToWrite[l_size] = '\0';
printf("Writing to file: %s\n", l_fileToWrite);
- // Open the file1
- l_file1 = fopen(i_file1, "r");
-
- if( NULL == l_file1)
- {
- printf("Failed to open file %s for reading\n",i_file1);
- l_rc = FAILURE_RC;
- break;
- }
-
// Open the destination file
l_file = fopen(l_fileToWrite, "a");
if( NULL == l_file)
{
- printf("Failed to open file %s for reading\n",l_fileToWrite);
+ printf("Failed to open file %s for writing\n",l_fileToWrite);
l_rc = FAILURE_RC;
break;
}
// get size of file1
- l_rc = fseek(l_file1, 0, SEEK_END);
+ l_rc = fseek(i_file1, 0, SEEK_END);
if( l_rc != 0)
{
- printf("Failed to seek end of the file: %s,rc: %d\n",
- i_file1,l_rc);
+ printf("Failed to seek end of the input file, rc: %d\n",l_rc);
l_rc = FAILURE_RC;
break;
}
- unsigned long int l_sz1 = ftell(l_file1);
+ unsigned long int l_sz1 = ftell(i_file1);
//Now seek back to the beginning
- l_rc = fseek(l_file1, 0, SEEK_SET);
+ l_rc = fseek(i_file1, 0, SEEK_SET);
if( l_rc != 0)
{
- printf("Failed to seek start after getting size of the file: %s, "
- "rc: %d\n",i_file1,l_rc);
+ printf("Failed to seek start after getting size of the file, rc: %d\n",l_rc);
l_rc = FAILURE_RC;
break;
}
// Read full file into buffer
unsigned int l_data[l_sz1];
- size_t l_readSz = fread(&l_data[0], 1, l_sz1, l_file1);
+ size_t l_readSz = fread(&l_data[0], 1, l_sz1, i_file1);
if( l_readSz != l_sz1)
{
- printf("Failed to read file: %s,readSz: 0x%x,l_sz: 0x%x\n",
- i_file1,l_readSz,l_sz1);
+ printf("Failed to read input file, readSz: 0x%x,l_sz: 0x%x\n",
+ l_readSz,l_sz1);
l_rc = -1;
break;
}
@@ -349,17 +342,6 @@ int combineImage(char * i_file1)
}while(0);
- // Close file1 if it was open
- if( l_file1 != NULL)
- {
- int l_rc2 = fclose( l_file1);
-
- if( l_rc2 != 0)
- {
- printf("Failed to close file: %s,rc: %d\n", i_file1,l_rc2);
- }
- }
-
// Close destination file if it was open
if( l_file != NULL)
{
@@ -491,19 +473,16 @@ int dumpHdr(char * i_fileStr)
// Description: calculate image checksum
//
// End Function Specification
-unsigned long int calImageChecksum(FILE * i_filePtr)
+unsigned long int calImageChecksum(FILE * i_filePtr, bool i_gpeFile)
{
unsigned long int l_checksum = 0;
-
unsigned long int l_counter = 0;
- int l_val = fgetc(i_filePtr);
+ int l_val = 0;
- while( l_val != EOF)
+ while(1)
{
- l_checksum += l_val;
- l_counter += 1;
// Skip checksum field
- if( l_counter == CHECKSUM_FIELD_OFFSET)
+ if( (l_counter == CHECKSUM_FIELD_OFFSET) && !i_gpeFile )
{
while( l_counter != (CHECKSUM_FIELD_OFFSET + CHECKSUM_FIELD_LEN))
{
@@ -511,7 +490,30 @@ unsigned long int calImageChecksum(FILE * i_filePtr)
l_val = fgetc(i_filePtr);
}
}
- l_val = fgetc(i_filePtr);
+ else if( (l_counter == CHECKSUM_GPE0_FIELD_OFFSET) && !i_gpeFile )
+ {
+ while( l_counter != (CHECKSUM_GPE0_FIELD_OFFSET + CHECKSUM_FIELD_LEN))
+ {
+ l_counter++;
+ l_val = fgetc(i_filePtr);
+ }
+ }
+ else if( (l_counter == CHECKSUM_GPE1_FIELD_OFFSET) && !i_gpeFile )
+ {
+ while( l_counter != (CHECKSUM_GPE1_FIELD_OFFSET + CHECKSUM_FIELD_LEN))
+ {
+ l_counter++;
+ l_val = fgetc(i_filePtr);
+ }
+ }
+ else
+ {
+ l_val = fgetc(i_filePtr);
+ if (l_val == EOF) break;
+
+ l_checksum += l_val;
+ l_counter ++;
+ }
}
fprintf(stdout,"Checksum: 0x%08X\t\tSize: 0x%08X\n", l_checksum, l_counter);
@@ -601,9 +603,37 @@ void printHelp()
// End Function Specification
int main(int argc, char* argv[])
{
- FILE * l_filePtr = NULL;
+ // NOTE: In order for this to work properly, the arguments must be in this order:
+ // argv[0] = (implicitly) name of this executable
+ // argv[1] = bootloader binary file
+ // argv[2] = 405 binary file
+ // argv[3] = gpe0 binary file
+ // argv[4] = gpe1 binary file
+ // argv[5] = bootloader version
+ // argv[6] = 405 version
+ // argv[7] = (optional) bootloader ID
+ // argv[8] = (optional) 405 ID
+
+#define ARG_BOOTLOADER_BIN argv[1]
+#define ARG_405_BIN argv[2]
+#define ARG_GPE0_BIN argv[3]
+#define ARG_GPE1_BIN argv[4]
+#define ARG_BOOTLOADER_VERS argv[5]
+#define ARG_405_VERS argv[6]
+#define ARG_BOOTLOADER_ID argv[7]
+#define ARG_405_ID argv[8]
+
+ FILE * l_bootLdrPtr = NULL;
+ FILE * l_file405Ptr = NULL;
+ FILE * l_fileGPE0Ptr = NULL;
+ FILE * l_fileGPE1Ptr = NULL;
int l_rc = SUCCESS_RC;
+ unsigned long int l_405_sz = 0;
+ unsigned long int l_gpe0_sz = 0;
+ unsigned long int l_gpe1_sz = 0;
+ unsigned long int l_bootLdr_sz = 0;
+
do
{
if( argc <= 2)
@@ -613,6 +643,9 @@ int main(int argc, char* argv[])
break;
}
+ //=============================================
+ // Dump the image header for the specified file
+ //=============================================
if( (strcmp(argv[2],DUMP_HDR_STR)== 0))
{
printf("Dump Image Header\n");
@@ -627,210 +660,542 @@ int main(int argc, char* argv[])
break;
}
- if( (argc > 2) && (strcmp(argv[2],COMBINE_IMAGE_STR)== 0))
+ //=======================================================
+ // Dump the imagesize of the image for the specified file
+ //=======================================================
+ if( (argc > 2) && (strcmp(argv[2],DISPLAY_SIZE)== 0))
{
- printf("Combining image from file: %s\n",argv[1]);
- l_rc = combineImage(argv[1]);
+ l_rc = displaySize(argv[1]);
if( l_rc != 0)
{
- printf("Problem combining image: rc: %d\n",l_rc);
+ printf("Problem displaying size: rc: %d\n",l_rc);
l_rc = FAILURE_RC;
}
break;
}
- if( (argc > 2) && (strcmp(argv[2],DISPLAY_SIZE)== 0))
+ // At this point we know there is at least 1 argument to the program
+ // but we need 6: path to bootloader, 405, gpe0, gpe1, and the versions.
+ if( argc < 7 )
{
- l_rc = displaySize(argv[1]);
+ printf("Need the path to the bootloader, 405, gpe0, gpe1, and versions of 405 and bootloader\n");
+ l_rc = FAILURE_RC;
+ break;
+ }
- if( l_rc != 0)
- {
- printf("Problem displaying size: rc: %d\n",l_rc);
- l_rc = FAILURE_RC;
- }
+ //===============
+ // Open the files
+ //===============
+ l_bootLdrPtr = fopen(ARG_BOOTLOADER_BIN, "r+");
+ l_file405Ptr = fopen(ARG_405_BIN, "r+");
+ l_fileGPE0Ptr = fopen(ARG_GPE0_BIN, "r+");
+ l_fileGPE1Ptr = fopen(ARG_GPE1_BIN, "r+");
+
+ // Verify all were successfully opened
+ if( NULL == l_bootLdrPtr )
+ {
+ printf("Failed to open file %s for reading and writing\n", ARG_BOOTLOADER_BIN);
+ l_rc = FAILURE_RC;
+ break;
+ }
+ else if( NULL == l_file405Ptr)
+ {
+ printf("Failed to open file %s for reading and writing\n", ARG_405_BIN);
+ l_rc = FAILURE_RC;
+ break;
+ }
+ else if( NULL == l_fileGPE0Ptr)
+ {
+ printf("Failed to open file %s for reading and writing\n", ARG_GPE0_BIN);
+ l_rc = FAILURE_RC;
+ break;
+ }
+ else if( NULL == l_fileGPE1Ptr)
+ {
+ printf("Failed to open file %s for reading and writing\n", ARG_GPE1_BIN);
+ l_rc = FAILURE_RC;
break;
}
- // At this point we know there is at least 1 argument to the program
+ //===============================
+ // Files are open, get file sizes
+ //===============================
- // Open the file
- l_filePtr = fopen(argv[1], "r+");
+ // Bootloader
+ l_rc = fseek(l_bootLdrPtr, 0, SEEK_END);
+ if( l_rc != 0)
+ {
+ printf("Failed to seek end of the file: %s, rc: %d\n",ARG_BOOTLOADER_BIN,l_rc);
+ l_rc = FAILURE_RC;
+ break;
+ }
+ l_bootLdr_sz = ftell(l_bootLdrPtr);
- if( NULL == l_filePtr)
+ // 405
+ l_rc = fseek(l_file405Ptr, 0, SEEK_END);
+ if( l_rc != 0)
{
- printf("Failed to open file %s for reading and writing\n",argv[1]);
+ printf("Failed to seek end of the file: %s, rc: %d\n",ARG_405_BIN,l_rc);
l_rc = FAILURE_RC;
break;
}
- // file is open now
- // get the file size
- l_rc = fseek(l_filePtr, 0, SEEK_END);
+ l_405_sz = ftell(l_file405Ptr);
+ // GPE 0
+ l_rc = fseek(l_fileGPE0Ptr, 0, SEEK_END);
if( l_rc != 0)
{
- printf("Failed to seek end of the file: %s, rc: %d\n",argv[1],l_rc);
+ printf("Failed to seek end of the file: %s, rc: %d\n",ARG_GPE0_BIN,l_rc);
l_rc = FAILURE_RC;
break;
}
+ l_gpe0_sz = ftell(l_fileGPE0Ptr);
- unsigned long int l_sz = ftell(l_filePtr);
+ // GPE 1
+ l_rc = fseek(l_fileGPE1Ptr, 0, SEEK_END);
+ if( l_rc != 0)
+ {
+ printf("Failed to seek end of the file: %s, rc: %d\n",ARG_GPE1_BIN,l_rc);
+ l_rc = FAILURE_RC;
+ break;
+ }
+ l_gpe1_sz = ftell(l_fileGPE1Ptr);
- if( l_sz % 128 != 0)
+ //================================================
+ // Ensure that all file sizes are 128-byte aligned
+ //================================================
+ if( (l_405_sz % 128 != 0) || (l_gpe0_sz % 128 != 0) ||
+ (l_gpe1_sz % 128 != 0) || (l_bootLdr_sz % 128 != 0) )
{
- printf("Image size:[%d] in file: [%s] is not 128-byte aligned\n",
- l_sz,argv[1]);
+ printf("An Image size is not 128-byte aligned: BootLdr [%d] 405[%d] GPE0[%d] GPE1[%d]\n",
+ l_bootLdr_sz, l_405_sz, l_gpe0_sz, l_gpe1_sz);
l_rc = FAILURE_RC;
break;
}
- //Now seek back to the beginning
- l_rc = fseek(l_filePtr, 0, SEEK_SET);
+ //=================================================
+ // Now seek back to the beginning of the bootloader
+ // and 405 since we are writing image sizes to them
+ //=================================================
+
+ // 405
+ l_rc = fseek(l_file405Ptr, 0, SEEK_SET);
+ if( l_rc != 0)
+ {
+ printf("Failed to seek start after getting size of the file: %s, "
+ "rc: %d\n",ARG_405_BIN,l_rc);
+ l_rc = FAILURE_RC;
+ break;
+ }
+ // Bootloader
+ l_rc = fseek(l_bootLdrPtr, 0, SEEK_SET);
if( l_rc != 0)
{
printf("Failed to seek start after getting size of the file: %s, "
- "rc: %d\n",argv[1],l_rc);
+ "rc: %d\n",ARG_BOOTLOADER_BIN,l_rc);
l_rc = FAILURE_RC;
break;
}
- l_sz = htonl(l_sz);
+ //==========================================================
+ // Convert from host (typically little endian) to big endian
+ //==========================================================
+ l_bootLdr_sz = htonl(l_bootLdr_sz);
+ l_405_sz = htonl(l_405_sz);
+ l_gpe0_sz = htonl(l_gpe0_sz);
+ l_gpe1_sz = htonl(l_gpe1_sz);
- // Write image size to the image header
- l_rc = write(l_filePtr, &l_sz, IMAGE_SZ_FIELD_LEN,IMAGE_SZ_FIELD_OFFSET);
+ //=======================================
+ // Write image sizes to the image headers
+ //=======================================
+ // Write bootloader size to bootloader image header
+ l_rc = write(l_bootLdrPtr, &l_bootLdr_sz, IMAGE_SZ_FIELD_LEN,IMAGE_SZ_FIELD_OFFSET);
if( l_rc != 0)
{
- printf("Failed to write image size in the file: %s, "
- "rc: %d,l_sz: 0x%x,IMAGE_SZ_FIELD_LEN: %d, "
- "IMAGE_SZ_FIELD_OFFSET: %d\n",argv[1],l_rc,
+ printf("Failed to write bootloader image size in the file: %s, "
+ "rc: %d, IMAGE_SZ_FIELD_LEN: %d, "
+ "IMAGE_SZ_FIELD_OFFSET: %d\n",ARG_BOOTLOADER_BIN,l_rc,
IMAGE_SZ_FIELD_LEN,IMAGE_SZ_FIELD_OFFSET);
l_rc = FAILURE_RC;
break;
}
- // Write image version
+ // Write 405 size to 405 image header
+ l_rc = write(l_file405Ptr, &l_405_sz, IMAGE_SZ_FIELD_LEN,IMAGE_SZ_FIELD_OFFSET);
+ if( l_rc != 0)
+ {
+ printf("Failed to write 405 image size in the file: %s, "
+ "rc: %d, IMAGE_SZ_FIELD_LEN: %d, "
+ "IMAGE_SZ_FIELD_OFFSET: %d\n",ARG_405_BIN,l_rc,
+ IMAGE_SZ_FIELD_LEN,IMAGE_SZ_FIELD_OFFSET);
+ l_rc = FAILURE_RC;
+ break;
+
+ }
+
+ // Write GPE0 size to 405 image header
+ l_rc = write(l_file405Ptr, &l_gpe0_sz, IMAGE_SZ_FIELD_LEN,GPE0_SZ_FIELD_OFFSET);
+ if( l_rc != 0)
+ {
+ printf("Failed to write GPE0 image size in the file: %s, "
+ "rc: %d, IMAGE_SZ_FIELD_LEN: %d, "
+ "GPE0_SZ_FIELD_OFFSET: %d\n",ARG_405_BIN,l_rc,
+ IMAGE_SZ_FIELD_LEN,GPE0_SZ_FIELD_OFFSET);
+ l_rc = FAILURE_RC;
+ break;
+ }
+
+ // Write GPE1 size to 405 image header
+ l_rc = write(l_file405Ptr, &l_gpe1_sz, IMAGE_SZ_FIELD_LEN,GPE1_SZ_FIELD_OFFSET);
+ if( l_rc != 0)
+ {
+ printf("Failed to write GPE1 image size in the file: %s, "
+ "rc: %d, IMAGE_SZ_FIELD_LEN: %d, "
+ "GPE1_SZ_FIELD_OFFSET: %d\n",ARG_405_BIN,l_rc,
+ IMAGE_SZ_FIELD_LEN,GPE1_SZ_FIELD_OFFSET);
+ l_rc = FAILURE_RC;
+ break;
+ }
+
+ //=====================
+ // Write image versions
+ //=====================
unsigned long int l_version = 0;
- sprintf((char*)&l_version, "%s",argv[2]);
- l_rc = write(l_filePtr, &l_version, VERSION_LEN, VERSION_OFFSET);
+ // Bootloader
+ sprintf((char*)&l_version, "%s",argv[5]);
+ l_rc = write(l_bootLdrPtr, &l_version, VERSION_LEN, VERSION_OFFSET);
if( l_rc != 0)
{
printf("Failed to write version in the file: %s, "
- "rc: %d,l_sz: 0x%x,: VERSION_LEN: %d, "
- "VERSION_OFFSET: %d\n",VERSION_LEN,l_rc,
- VERSION_LEN,VERSION_OFFSET);
+ "rc: %d, VERSION_LEN: %d, VERSION_OFFSET: %d\n",
+ ARG_BOOTLOADER_BIN, l_rc, VERSION_LEN, VERSION_OFFSET);
l_rc = FAILURE_RC;
break;
+ }
+ // 405
+ sprintf((char*)&l_version, "%s",argv[6]);
+ l_rc = write(l_file405Ptr, &l_version, VERSION_LEN, VERSION_OFFSET);
+ if( l_rc != 0)
+ {
+ printf("Failed to write version in the file: %s, "
+ "rc: %d, VERSION_LEN: %d, VERSION_OFFSET: %d\n",
+ ARG_405_BIN, l_rc, VERSION_LEN, VERSION_OFFSET);
+ l_rc = FAILURE_RC;
+ break;
}
- // If user has passed in image id string, write it to the image
- if( argc > 3)
+ //===================================
+ // If user has passed in image id
+ // string(s), write it to the image(s)
+ //====================================
+
+ // Bootloader
+ if( argc > 7 )
{
- l_rc = write(l_filePtr, argv[3], ID_STR_LEN, ID_STR_OFFSET);
+ l_rc = write(l_bootLdrPtr, ARG_BOOTLOADER_ID, ID_STR_LEN, ID_STR_OFFSET);
if( l_rc != 0)
{
printf("Failed to write id_str in the file: %s, "
- "rc: %d,l_sz: 0x%x,: ID_STR_LEN: %d, "
- "ID_STR_OFFSET: %d\n",argv[1],l_rc,
- ID_STR_LEN,ID_STR_OFFSET);
+ "rc: %d ID_STR_LEN: %d, ID_STR_OFFSET: %d\n",
+ ARG_BOOTLOADER_BIN, l_rc, ID_STR_LEN,ID_STR_OFFSET);
l_rc = FAILURE_RC;
break;
+ }
+ }
+ // 405
+ if( argc > 8 )
+ {
+ l_rc = write(l_file405Ptr, ARG_405_ID, ID_STR_LEN, ID_STR_OFFSET);
+
+ if( l_rc != 0)
+ {
+ printf("Failed to write id_str in the file: %s, "
+ "rc: %d ID_STR_LEN: %d, ID_STR_OFFSET: %d\n",
+ ARG_405_BIN, l_rc, ID_STR_LEN,ID_STR_OFFSET);
+ l_rc = FAILURE_RC;
+ break;
}
}
- //Now seek to the ep_address field
- l_rc = fseek(l_filePtr, ADDRESS_OFFSET, SEEK_SET);
+ //====================================================
+ // Seek to bootloader/405's entry point address fields
+ //====================================================
+
+ // Bootloader
+ l_rc = fseek(l_bootLdrPtr, ADDRESS_OFFSET, SEEK_SET);
+ if( l_rc != 0)
+ {
+ printf("Failed to seek ep_address offset: 0x%x of the file: %s, "
+ "rc: %d\n",ADDRESS_OFFSET,ARG_BOOTLOADER_BIN,l_rc);
+ l_rc = FAILURE_RC;
+ break;
+ }
+ // 405
+ l_rc = fseek(l_file405Ptr, ADDRESS_OFFSET, SEEK_SET);
if( l_rc != 0)
{
printf("Failed to seek ep_address offset: 0x%x of the file: %s, "
- "rc: %d\n",ADDRESS_OFFSET,argv[1],l_rc);
+ "rc: %d\n",ADDRESS_OFFSET,ARG_405_BIN,l_rc);
l_rc = FAILURE_RC;
break;
}
- unsigned long int l_addr = 0;
- // read ep_addr field
- size_t l_readSz = fread(&l_addr, 1, ADDRESS_LEN, l_filePtr);
+ unsigned long int l_405_addr = 0, l_btldr_addr = 0;
+
+ // Read ep_addr fields
+
+ // 405
+ size_t l_readSz = fread(&l_405_addr, 1, ADDRESS_LEN, l_file405Ptr);
if( l_readSz != ADDRESS_LEN)
{
- printf("Failed to read address for ep_branch calculation.file: %s, "
- "readSz: 0x%x,ADDRESS_LEN: 0x%x\n",argv[1],l_readSz,
+ printf("Failed to read address for ep_branch calculation. File: %s, "
+ "readSz: 0x%x, ADDRESS_LEN: 0x%x\n",ARG_405_BIN,l_readSz,
ADDRESS_LEN);
l_rc = FAILURE_RC;
break;
}
- // calculate branch instruction to that address and write to
+ // Bootloader
+ l_readSz = fread(&l_btldr_addr, 1, ADDRESS_LEN, l_bootLdrPtr);
+ if( l_readSz != ADDRESS_LEN)
+ {
+ printf("Failed to read address for ep_branch calculation. File: %s, "
+ "readSz: 0x%x, ADDRESS_LEN: 0x%x\n",ARG_BOOTLOADER_BIN,l_readSz,
+ ADDRESS_LEN);
+ l_rc = FAILURE_RC;
+ break;
+ }
+
+ //==========================================================
+ // Calculate branch instruction to that address and write to
// ep_branch_inst field in the image header
- l_addr = ntohl(l_addr);
- l_addr &= ADDRESS_MASK;
- l_addr |= BRANCH_MASK;
+ //==========================================================
+
+ // 405
+ l_405_addr = ntohl(l_405_addr);
+ l_405_addr &= ADDRESS_MASK;
+ l_405_addr |= ABS_BRANCH_MASK;
+ l_405_addr = htonl(l_405_addr);
+ l_rc = write(l_file405Ptr, &l_405_addr, EP_BRANCH_INST_LEN,
+ EP_BRANCH_INST_OFFSET);
- l_addr = htonl(l_addr);
+ if( l_rc != 0)
+ {
+ printf("Failed to write ep_branch_inst in the file: %s, "
+ "rc: %d, EP_BRANCH_INST_LEN: %d, "
+ "EP_BRANCH_INST_OFFSET: %d\n",ARG_405_BIN,l_rc,
+ EP_BRANCH_INST_LEN,EP_BRANCH_INST_OFFSET);
+ l_rc = FAILURE_RC;
+ break;
+ }
- l_rc = write(l_filePtr, &l_addr, EP_BRANCH_INST_LEN,
+ // Bootloader
+ l_btldr_addr = ntohl(l_btldr_addr);
+ l_btldr_addr -= BRANCH_INSTR_OFFSET;
+ l_btldr_addr &= ADDRESS_MASK;
+ l_btldr_addr |= REL_BRANCH_MASK;
+ l_btldr_addr = htonl(l_btldr_addr);
+ l_rc = write(l_bootLdrPtr, &l_btldr_addr, EP_BRANCH_INST_LEN,
EP_BRANCH_INST_OFFSET);
if( l_rc != 0)
{
printf("Failed to write ep_branch_inst in the file: %s, "
- "rc: %d,l_sz: 0x%x,: EP_BRANCH_INST_LEN: %d, "
- "EP_BRANCH_INST_OFFSET: %d\n",argv[1],l_rc,
+ "rc: %d, EP_BRANCH_INST_LEN: %d, "
+ "EP_BRANCH_INST_OFFSET: %d\n",ARG_BOOTLOADER_BIN,l_rc,
EP_BRANCH_INST_LEN,EP_BRANCH_INST_OFFSET);
l_rc = FAILURE_RC;
break;
-
}
+ //=======================================================
//Now seek back to the beginning for calculating checksum
- l_rc = fseek(l_filePtr, 0, SEEK_SET);
+ //=======================================================
+ // 405
+ l_rc = fseek(l_file405Ptr, 0, SEEK_SET);
if( l_rc != 0)
{
- printf("Failed to seek start before checksum calculation.file: %s,"
- "rc: %d\n",argv[1],l_rc);
+ printf("Failed to seek start before checksum calculation file: %s,"
+ "rc: %d\n",ARG_405_BIN,l_rc);
l_rc = FAILURE_RC;
break;
}
- // calculate checksum
- unsigned long int l_checksum = calImageChecksum(l_filePtr);
+ // Bootloader
+ l_rc = fseek(l_bootLdrPtr, 0, SEEK_SET);
+ if( l_rc != 0)
+ {
+ printf("Failed to seek start before checksum calculation file: %s,"
+ "rc: %d\n",ARG_BOOTLOADER_BIN,l_rc);
+ l_rc = FAILURE_RC;
+ break;
+ }
- l_checksum = htonl(l_checksum);
+ // GPE0
+ l_rc = fseek(l_fileGPE0Ptr, 0, SEEK_SET);
+ if( l_rc != 0)
+ {
+ printf("Failed to seek ep_address offset: 0x%x of the file: %s, "
+ "rc: %d\n",ADDRESS_OFFSET,ARG_GPE0_BIN,l_rc);
+ l_rc = FAILURE_RC;
+ break;
+ }
+
+ // GPE1
+ l_rc = fseek(l_fileGPE1Ptr, 0, SEEK_SET);
+ if( l_rc != 0)
+ {
+ printf("Failed to seek ep_address offset: 0x%x of the file: %s, "
+ "rc: %d\n",ADDRESS_OFFSET,ARG_GPE1_BIN,l_rc);
+ l_rc = FAILURE_RC;
+ break;
+ }
- // Write checksum
- l_rc = write(l_filePtr, &l_checksum,CHECKSUM_FIELD_LEN,
+ //====================
+ // Calculate checksums
+ //====================
+
+ // 405
+ unsigned long int l_checksum = calImageChecksum(l_file405Ptr, false);
+ l_checksum = htonl(l_checksum);
+ l_rc = write(l_file405Ptr, &l_checksum,CHECKSUM_FIELD_LEN,
CHECKSUM_FIELD_OFFSET);
+ if( l_rc != 0)
+ {
+ printf("Failed to write image checksum in the file: %s, "
+ "rc: %d,IMAGE_SZ_FIELD_LEN: %d, "
+ "CHECKSUM_FIELD_OFFSET: %d\n",ARG_405_BIN,l_rc,
+ CHECKSUM_FIELD_LEN,CHECKSUM_FIELD_OFFSET);
+ l_rc = FAILURE_RC;
+ break;
+ }
+ // Bootloader
+ l_checksum = calImageChecksum(l_bootLdrPtr, false);
+ l_checksum = htonl(l_checksum);
+ l_rc = write(l_bootLdrPtr, &l_checksum,CHECKSUM_FIELD_LEN,
+ CHECKSUM_FIELD_OFFSET);
if( l_rc != 0)
{
- printf("Failed to write image size in the file: %s, "
- "rc: %d,l_sz: 0x%x,IMAGE_SZ_FIELD_LEN: %d, "
- "IMAGE_SZ_FIELD_OFFSET: %d\n",argv[1],l_rc,
+ printf("Failed to write image checksum in the file: %s, "
+ "rc: %d,IMAGE_SZ_FIELD_LEN: %d, "
+ "CHECKSUM_FIELD_OFFSET: %d\n",ARG_BOOTLOADER_BIN,l_rc,
CHECKSUM_FIELD_LEN,CHECKSUM_FIELD_OFFSET);
l_rc = FAILURE_RC;
break;
}
+ // GPE0
+ l_checksum = calImageChecksum(l_fileGPE0Ptr, true);
+ l_checksum = htonl(l_checksum);
+ l_rc = write(l_file405Ptr, &l_checksum,CHECKSUM_FIELD_LEN,
+ CHECKSUM_GPE0_FIELD_OFFSET);
+ if( l_rc != 0)
+ {
+ printf("Failed to write image checksum in the file: %s, "
+ "rc: %d,IMAGE_SZ_FIELD_LEN: %d, "
+ "CHECKSUM_GPE0_FIELD_OFFSET: %d\n",ARG_405_BIN,l_rc,
+ CHECKSUM_FIELD_LEN,CHECKSUM_GPE0_FIELD_OFFSET);
+ l_rc = FAILURE_RC;
+ break;
+ }
+
+ // GPE1
+ l_checksum = calImageChecksum(l_fileGPE1Ptr, true);
+ l_checksum = htonl(l_checksum);
+ l_rc = write(l_file405Ptr, &l_checksum,CHECKSUM_FIELD_LEN,
+ CHECKSUM_GPE1_FIELD_OFFSET);
+ if( l_rc != 0)
+ {
+ printf("Failed to write image checksum in the file: %s, "
+ "rc: %d,IMAGE_SZ_FIELD_LEN: %d, "
+ "CHECKSUM_GPE1_FIELD_OFFSET: %d\n",ARG_405_BIN,l_rc,
+ CHECKSUM_FIELD_LEN,CHECKSUM_GPE1_FIELD_OFFSET);
+ l_rc = FAILURE_RC;
+ break;
+ }
+
+ // Combine the images into one binary
+ l_rc = combineImage(l_bootLdrPtr);
+ if ( l_rc )
+ {
+ printf("Failed to combine file %s, rc %d\n", ARG_BOOTLOADER_BIN, l_rc);
+ l_rc = FAILURE_RC;
+ break;
+ }
+ l_rc = combineImage(l_file405Ptr);
+ if ( l_rc )
+ {
+ printf("Failed to combine file %s, rc %d\n", ARG_405_BIN, l_rc);
+ l_rc = FAILURE_RC;
+ break;
+ }
+ l_rc = combineImage(l_fileGPE0Ptr);
+ if ( l_rc )
+ {
+ printf("Failed to combine file %s, rc %d\n", ARG_GPE0_BIN, l_rc);
+ l_rc = FAILURE_RC;
+ break;
+ }
+ l_rc = combineImage(l_fileGPE1Ptr);
+ if ( l_rc )
+ {
+ printf("Failed to combine file %s, rc %d", ARG_GPE1_BIN, l_rc);
+ l_rc = FAILURE_RC;
+ break;
+ }
}while(0);
- // Close file if open
- if( l_filePtr != NULL)
- {
- int l_rc2 = fclose( l_filePtr);
-
- if( l_rc2 != 0)
- {
- printf("Failed to close file: %s,rc: %d\n", argv[1],l_rc2);
- }
- }
+ // Close files if open
+ if( l_bootLdrPtr != NULL )
+ {
+ int l_rc2 = fclose(l_bootLdrPtr);
+
+ if( l_rc2 != 0)
+ {
+ printf("Failed to close file: %s,rc: %d\n", ARG_BOOTLOADER_BIN,l_rc2);
+ }
+ }
+
+ if( l_file405Ptr != NULL )
+ {
+ int l_rc2 = fclose( l_file405Ptr);
+
+ if( l_rc2 != 0)
+ {
+ printf("Failed to close file: %s,rc: %d\n", ARG_405_BIN,l_rc2);
+ }
+ }
+
+ if( l_fileGPE0Ptr != NULL )
+ {
+ int l_rc2 = fclose( l_fileGPE0Ptr);
+
+ if( l_rc2 != 0)
+ {
+ printf("Failed to close file: %s,rc: %d\n", ARG_GPE0_BIN,l_rc2);
+ }
+ }
+
+ if( l_fileGPE1Ptr != NULL )
+ {
+ int l_rc2 = fclose( l_fileGPE1Ptr);
+
+ if( l_rc2 != 0)
+ {
+ printf("Failed to close file: %s,rc: %d\n", ARG_GPE1_BIN,l_rc2);
+ }
+ }
return l_rc;
diff --git a/src/occBootLoader/img_defs.mk b/src/occBootLoader/img_defs.mk
new file mode 100644
index 0000000..dd07269
--- /dev/null
+++ b/src/occBootLoader/img_defs.mk
@@ -0,0 +1,287 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/occBootLoader/img_defs.mk $
+#
+# OpenPOWER OnChipController Project
+#
+# Contributors Listed Below - COPYRIGHT 2015,2016
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+# $Id: ssx.mk,v 1.2 2014/06/26 12:55:39 cmolsen Exp $
+# $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ssx/pgp/ssx.mk,v $
+# Make header for PgP SSX builds
+#
+# The application may define the following variables to control the
+# build process:
+#
+# IMG_INCLUDES : Aplication-specific header search paths
+#
+# DEFS : A string of -D<symbol>[=<value>] to control compilation
+#
+# SSX_SRCDIR : Default ..; The path to the SSX source code.
+# The default is set for building the SSX
+# subdirectories.
+#
+# SSX_THREAD_SUPPORT : (0/1, default 1); Compile SSX thread and
+# semaphore suppprt
+#
+# SSX_TIMER_SUPPORT : (0/1, default 1); Compile SSX timer suppprt
+#
+# PPC405_MMU_SUPPORT : (0/1, default 1); Compile for PPC405 simple MMU protection
+#
+# SIMICS_ENVIRONMENT : (0/1, current default 0); Compile for Simics
+#
+# SIMICS_MAGIC_PANIC : (0/1, current default 0); Use Simics Magic
+# breakpoint for SSX_PANIC() instead of PowerPC trap.
+# Note that Simics does not model trap correctly in
+# external debug mode.
+#
+# GCC-O-LEVEL : The optimization level passed to GCC (default -Os). May
+# also be defined empty (GCC-O-LEVEL=) to disable
+# optimization. This variable can also be used to pass
+# any other non-default setting to GCC, e.g.
+# make GCC-O-LEVEL="-Os -fno-branch-count-reg"
+#
+# GCC-TOOL-PREFIX : The full path (including executable file prefixes) to
+# the GCC cross-development tools to use. The default is
+# "ppcnf-mcp5-"
+#
+# CTEPATH : This variable defaults to the afs/awd CTE tool
+# installation - The PORE binutils are stored there. If
+# you are not in Austin be sure to define CTEPATH in
+# your .profile.
+
+IMAGE_NAME := occBootLoader
+ifndef IMAGE_SRCDIR
+export IMAGE_SRCDIR = $(abspath .)
+endif
+
+ifndef IMG_INCLUDES
+export IMG_INCLUDES = -I$(IMAGE_SRCDIR)
+endif
+
+ifndef GLOBAL_INCLUDES
+export GLOBAL_INCLUDES = -I$(IMAGE_SRCDIR)/..
+endif
+
+ifndef BASE_OBJDIR
+export BASE_OBJDIR = $(abspath ../../obj)
+endif
+
+export IMG_OBJDIR = $(BASE_OBJDIR)/$(IMAGE_NAME)
+
+ifndef SSX_SRCDIR
+export SSX_SRCDIR = $(abspath ../ssx)
+endif
+
+ifndef COMMONLIB_SRCDIR
+export COMMONLIB_SRCDIR = $(abspath ../lib/common)
+endif
+
+ifndef OCCLIB_SRCDIR
+export OCCLIB_SRCDIR = $(abspath ../lib/occlib)
+endif
+
+ifndef PPC405LIB_SRCDIR
+export PPC405LIB_SRCDIR = $(abspath ../lib/ppc405lib)
+endif
+
+ifndef SSXLIB_SRCDIR
+export SSXLIB_SRCDIR = $(abspath ../lib/ssxlib)
+endif
+
+ifndef OCC405_SRCDIR
+export OCC405_SRCDIR = $(abspath ../occ_405)
+endif
+
+ifndef OCC405_INCLDIR
+export OCC405_INCLDIR = $(OCC405_SRCDIR)/incl
+endif
+
+ifndef GCC-TOOL-PREFIX
+GCC-TOOL-PREFIX = $(CTEPATH)/tools/ppcgcc/prod/bin/powerpc-linux-
+endif
+
+ifndef PPETRACEPP_DIR
+export PPETRACEPP_DIR = $(abspath ../ppe/tools/ppetracepp)
+endif
+
+ifndef TRACEPP_DIR
+export TRACEPP_DIR = $(abspath ../tracepp)
+endif
+
+CC_ASM = $(GCC-TOOL-PREFIX)gcc
+TCC = $(PPETRACEPP_DIR)/ppetracepp $(GCC-TOOL-PREFIX)gcc
+THCC = $(TRACEPP_DIR)/tracepp $(GCC-TOOL-PREFIX)gcc
+CC = $(GCC-TOOL-PREFIX)gcc
+AS = $(GCC-TOOL-PREFIX)as
+AR = $(GCC-TOOL-PREFIX)ar
+LD = $(GCC-TOOL-PREFIX)ld
+OBJDUMP = $(GCC-TOOL-PREFIX)objdump
+OBJCOPY = $(GCC-TOOL-PREFIX)objcopy
+TCPP = $(PPETRACEPP_DIR)/ppetracepp $(GCC-TOOL-PREFIX)gcc
+THASH = $(PPETRACEPP_DIR)/tracehash.pl
+CPP = $(GCC-TOOL-PREFIX)cpp
+
+ifndef CTEPATH
+$(warning The CTEPATH variable is not defined; Defaulting to /afs/awd)
+CTEPATH = /afs/awd/projects/cte
+endif
+
+OBJDIR = $(IMG_OBJDIR)$(SUB_OBJDIR)
+
+ifndef GCC-O-LEVEL
+GCC-O-LEVEL = -Os
+endif
+
+ifeq "$(SSX_TIMER_SUPPORT)" ""
+SSX_TIMER_SUPPORT = 1
+endif
+
+ifeq "$(SSX_THREAD_SUPPORT)" ""
+SSX_THREAD_SUPPORT = 1
+endif
+
+# TODO: Enable this once we get MMU support working in simics
+# Currently, turning on MMU support causes an SSX panic (in Simics)
+ifeq "$(PPC405_MMU_SUPPORT)" ""
+PPC405_MMU_SUPPORT = 0
+endif
+
+ifeq "$(OCCHW_ASYNC_SUPPORT)" ""
+OCCHW_ASYNC_SUPPORT = 1
+endif
+
+ifeq "$(SSX_TRACE_SUPPORT)" ""
+SSX_TRACE_SUPPORT = 1
+endif
+
+ifeq "$(SSX_USE_INIT_SECTION)" ""
+SSX_USE_INIT_SECTION = 0
+endif
+
+# Generate a 16bit trace string hash prefix value based on the name of this image. This will form
+# the upper 16 bits of the 32 bit trace hash values.
+ifndef SSX_TRACE_HASH_PREFIX
+SSX_TRACE_HASH_PREFIX := $(shell echo $(IMAGE_NAME) | md5sum | cut -c1-4 | xargs -i printf "%d" 0x{})
+endif
+
+ifndef GCC-O-LEVEL
+GCC-O-LEVEL = -Os
+endif
+
+ifdef TRAC_TO_SIMICS
+GCC-DEFS += -DTRAC_TO_SIMICS=1
+endif
+
+ifdef STRAIGHT_TO_OBS_HACK
+GCC-DEFS += -DSTRAIGHT_TO_OBS_HACK=$(STRAIGHT_TO_OBS_HACK)
+else
+GCC-DEFS += -DSTRAIGHT_TO_OBS_HACK=1
+endif
+
+GCC-DEFS += -DIMAGE_NAME=$(IMAGE_NAME)
+GCC-DEFS += -DSSX_TIMER_SUPPORT=$(SSX_TIMER_SUPPORT)
+GCC-DEFS += -DSSX_THREAD_SUPPORT=$(SSX_THREAD_SUPPORT)
+GCC-DEFS += -DPPC405_MMU_SUPPORT=$(PPC405_MMU_SUPPORT)
+GCC-DEFS += -DSSX_TRACE_SUPPORT=$(SSX_TRACE_SUPPORT)
+GCC-DEFS += -DSSX_TRACE_HASH_PREFIX=$(SSX_TRACE_HASH_PREFIX)
+GCC-DEFS += -DSSX_USE_INIT_SECTION=$(SSX_USE_INIT_SECTION)
+GCC-DEFS += -DUSE_SSX_APP_CFG_H=1
+GCC-DEFS += -D__SSX__=1
+DEFS += $(GCC-DEFS) -DCONFIGURE_PTS_SLW=0
+
+############################################################################
+
+INCLUDES += $(IMG_INCLUDES) $(GLOBAL_INCLUDES) -I$(OCC405_INCLDIR)\
+ -I$(SSX_SRCDIR)/ssx -I$(SSX_SRCDIR)/ppc32 -I$(SSX_SRCDIR)/ppc405 \
+ -I$(SSX_SRCDIR)/trace -I$(SSX_SRCDIR)/occhw -I$(SSX_SRCDIR)/../lib/common \
+ -I$(SSX_SRCDIR)/../include -I$(SSX_SRCDIR)/../include/registers \
+ -I$(OCCLIB_SRCDIR) -I$(COMMONLIB_SRCDIR) -I$(SSXLIB_SRCDIR) -I$(PPC405LIB_SRCDIR) \
+ -I$(OCC405_SRCDIR)
+
+PIPE-CFLAGS = -pipe -Wa,-m405
+
+GCC-CFLAGS += -g -Wall -fsigned-char -msoft-float \
+ -m32 -mbig-endian -mcpu=405 -mmultiple -mstring \
+ -meabi -msdata=eabi -ffreestanding -fno-common \
+ -fno-inline-functions-called-once
+
+CFLAGS = -c $(GCC-CFLAGS) $(PIPE-CFLAGS) $(GCC-O-LEVEL) $(INCLUDES)
+
+############################################################################
+
+# Build object code
+#
+# %.o: %.c - Compile C code
+#
+# %.o: %.S - Compile PowerPC assembler (including PGAS-PPC assembly)
+
+#override the GNU Make implicit rule for going from a .c to a .o
+%.o: %.c
+$(OBJDIR)/%.o: %.c
+ $(TCC) $(CFLAGS) $(DEFS) -o $@ $<
+
+#override the GNU Make implicit rule for going from a .S to a .o
+%.o: %.S
+$(OBJDIR)/%.o: %.S
+ $(TCPP) $(CFLAGS) $(DEFS) -o $@ $<
+
+# Other useful targets
+#
+# %.S: %.c - See what the assembler produces from the C code, however you can
+# also just look at the final disassembly.
+#
+# %.lst: %.S - Get an assembler listing
+#
+# %.cpp: %.S - Preprocess PowerPC assembler source to stdout
+#
+# %.cpp: %.c - Preprocess C source to stdout
+
+%.S: %.c
+ $(CC) $(CFLAGS) $(DEFS) -S -o $@ $<
+
+%.lst: %.S
+ $(CC_ASM) $(CFLAGS) $(DEFS) -Wa,-al -Wa,--listing-cont-lines=20 $< > $@
+
+%.cpp: %.S
+ $(CC_ASM) $(CFLAGS) $(DEFS) -E $<
+
+%.cpp: %.c
+ $(CC) $(CFLAGS) $(DEFS) -E $<
+
+# From the GNU 'Make' manual - these scripts uses the preprocessor to
+# create dependency files (*.d), then mungs them slightly to make them
+# work as Make targets. The *.d files are include-ed in the
+# subdirectory Makefiles.
+
+#$(OBJDIR)/%.d: %.c
+# @set -e; rm -f $@; \
+# echo -n "$(OBJDIR)/" > $@.$$$$; \
+# $(CC_ASM) -MM $(INCLUDES) $(CPPFLAGS) $(DEFS) $< >> $@.$$$$; \
+# sed 's,\($*\)\.o[ :]*,\1.o $@ : ,g' < $@.$$$$ > $@; \
+# rm -f $@.$$$$
+
+#$(OBJDIR)/%.d: %.S
+# @set -e; rm -f $@; \
+# echo -n "$(OBJDIR)/" > $@.$$$$; \
+# $(CC_ASM) -MM $(INCLUDES) $(CPPFLAGS) $(DEFS) $< >> $@.$$$$; \
+# sed 's,\($*\)\.o[ :]*,\1.o $@ : ,g' < $@.$$$$ > $@; \
+# rm -f $@.$$$$
+
+
diff --git a/src/occBootLoader/linkboot.cmd b/src/occBootLoader/linkboot.cmd
index 816cca7..b84f7f3 100755
--- a/src/occBootLoader/linkboot.cmd
+++ b/src/occBootLoader/linkboot.cmd
@@ -1,44 +1,39 @@
-// IBM_PROLOG_BEGIN_TAG
-// This is an automatically generated prolog.
-//
-// $Source: src/occBootLoader/linkboot.cmd$
-//
-// OpenPOWER OnChipController Project
-//
-// Contributors Listed Below - COPYRIGHT 2011,2014
-// [+] Google Inc.
-// [+] International Business Machines Corp.
-//
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-// http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-// implied. See the License for the specific language governing
-// permissions and limitations under the License.
-//
-// IBM_PROLOG_END_TAG
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/occBootLoader/linkboot.cmd $ */
+/* */
+/* OpenPOWER OnChipController Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2011,2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
// Linker script for the OCC Firmware boot loader.
//
// The image is 4 byte aligned.
-#ifdef OCCMK
-INCLUDE occLinkInputFile
-#endif
-
-#define BOOT_IMAGE_START_ADDR 0x00000000
-#define BOOT_VECTORS 0x00000000
+#define BOOT_IMAGE_START_ADDR 0x80000000
+#define BOOT_VECTORS 0x80000000
#define BOOT_VECTORS_SIZE 0x00000740
#define BOOT_BUILDNAME_ADDR (BOOT_IMAGE_START_ADDR + BOOT_VECTORS_SIZE)
-#define WRITE_DATA_SEC_ADDR 0x80000000
+#define WRITE_DATA_SEC_ADDR 0x00000000
#define BYTE_ALIGN 128
-#define pack_0000 bootMain.o(imageHeader)
+#define pack_0000 *(imageHeader)
MEMORY
{
@@ -64,19 +59,19 @@ SECTIONS
bootInit.o(.vectors_0000)
pack_0000
. = ___vectors + 0x0100;
- bootInit.o(.vectors_0100)
+ *(.vectors_0100)
. = ___vectors + 0x0200;
- bootInit.o(.vectors_0200)
+ *(.vectors_0200)
. = ___vectors + 0x0300;
- bootInit.o(.vectors_0300)
+ *(.vectors_0300)
. = ___vectors + 0x0400;
- bootInit.o(.vectors_0400)
+ *(.vectors_0400)
. = ___vectors + 0x0500;
- bootInit.o(.vectors_0500)
+ *(.vectors_0500)
. = ___vectors + 0x0600;
- bootInit.o(.vectors_0600)
+ *(.vectors_0600)
. = ___vectors + 0x0700;
- bootInit.o(.vectors_0700)
+ *(.vectors_0700)
}
////////////////////////////////
diff --git a/src/occBootLoader/occLinkInputFile b/src/occBootLoader/occLinkInputFile
deleted file mode 100644
index eaf6ce3..0000000
--- a/src/occBootLoader/occLinkInputFile
+++ /dev/null
@@ -1,26 +0,0 @@
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/occBootLoader/occLinkInputFile$
-#
-# OpenPOWER OnChipController Project
-#
-# Contributors Listed Below - COPYRIGHT 2011,2014
-# [+] Google Inc.
-# [+] International Business Machines Corp.
-#
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-INPUT ( bootMain.o ../occ/occbuildname.o bootInit.o ../ssx/ppc32/savegpr.o )
diff --git a/src/occ_405/cmdh/cmdh_fsp_cmds.c b/src/occ_405/cmdh/cmdh_fsp_cmds.c
index 5bcf200..c437f9b 100755
--- a/src/occ_405/cmdh/cmdh_fsp_cmds.c
+++ b/src/occ_405/cmdh/cmdh_fsp_cmds.c
@@ -809,7 +809,7 @@ void cmdh_dbug_peek (const cmdh_fsp_cmd_t * i_cmd_ptr,
// Needed because otherwise we get warnings about
// unused variables when building for Simics
-#if !SIMICS_ENVIRONMENT
+#if PPC405_MMU_SUPPORT
static Ppc405MmuMap L_mmuMapHomer;
static Ppc405MmuMap L_mmuMapCommon;
#endif
@@ -843,7 +843,7 @@ void cmdh_dbug_peek (const cmdh_fsp_cmd_t * i_cmd_ptr,
dcache_flush( (void *) l_addr, l_len );
l_len = 0;
break;
-#if !SIMICS_ENVIRONMENT
+#if PPC405_MMU_SUPPORT
case 0x05: // MMU Map Mainstore
// Map mainstore to oci space so that we can peek at it
diff --git a/src/occ_405/img_defs.mk b/src/occ_405/img_defs.mk
index da22314..3029079 100644
--- a/src/occ_405/img_defs.mk
+++ b/src/occ_405/img_defs.mk
@@ -5,7 +5,7 @@
#
# OpenPOWER OnChipController Project
#
-# Contributors Listed Below - COPYRIGHT 2015
+# Contributors Listed Below - COPYRIGHT 2015,2016
# [+] International Business Machines Corp.
#
#
@@ -138,6 +138,13 @@ endif
OBJDIR = $(IMG_OBJDIR)$(SUB_OBJDIR)
+ifndef BOOTLOADER_OBJDIR
+export BOOTLOADER_OBJDIR = $(BASE_OBJDIR)/occBootLoader
+endif
+
+ifndef IMGHDRSCRIPT
+export IMGHDRSCRIPT = $(BOOTLOADER_OBJDIR)/imageHdrScript
+endif
ifeq "$(SSX_TIMER_SUPPORT)" ""
SSX_TIMER_SUPPORT = 1
@@ -181,6 +188,12 @@ else
GCC-DEFS += -DTRAC_TO_SIMICS=0
endif
+ifdef SIMICS_ENVIRONMENT
+GCC-DEFS += -DSIMICS_ENVIRONMENT=$(SIMICS_ENVIRONMENT)
+else
+GCC-DEFS += -DSIMICS_ENVIRONMENT=1
+endif
+
GCC-DEFS += -DIMAGE_NAME=$(IMAGE_NAME)
GCC-DEFS += -DSSX_TIMER_SUPPORT=$(SSX_TIMER_SUPPORT)
GCC-DEFS += -DSSX_THREAD_SUPPORT=$(SSX_THREAD_SUPPORT)
diff --git a/src/occ_405/incl/common_types.h b/src/occ_405/incl/common_types.h
index bc3f951..d8d8aab 100755
--- a/src/occ_405/incl/common_types.h
+++ b/src/occ_405/incl/common_types.h
@@ -1,11 +1,11 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: src/occ/incl/common_types.h $ */
+/* $Source: src/occ_405/incl/common_types.h $ */
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2011,2015 */
+/* Contributors Listed Below - COPYRIGHT 2011,2016 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -27,8 +27,6 @@
#define _COMMON_TYPES_H
#include <stdint.h>
-#include <core_data.h>
-#include <proc_shared.h>
#ifdef USE_SSX_APP_CFG_H
#include <ssx_app_cfg.h>
#endif
@@ -71,18 +69,27 @@ typedef enum
#define SRAM_REPAIR_RESERVE_SZ 64
#define IMAGE_ID_STR_SZ 16
-#define RESERVED_SZ 14
+#define RESERVED_SZ 16
#define TRAP_INST 0x7FE00004
#define ID_NUM_INVALID 0xFFFF
#define SRAM_HEADER_HACK 0x48000042
#ifndef __ASSEMBLER__
-// Structure for the common image header
+// Structure for the common image header (total size is 162 bytes).
+// We use the first interrupt vector to store the image header on
+// the 405 because it is unused. The max size here is 256 bytes.
+//
+// The first interrupt vector within the PPE42 is actually used,
+// so we are unable to use image headers on the GPE binaries directly.
+// We can mitigate that here by storing information about the GPEs
+// into the bootloader or 405 image headers.
struct image_header
{
// Overload sram_repair_reserved for magic applet number
// Note: unit64_t's don't compile when used w/IMAGE_HEADER macro.
+
+ // TODO: Is this even needed since we've removed applets?
union
{
struct
@@ -116,8 +123,12 @@ struct image_header
uint32_t boot_writeable_size; // boot writeable size
uint32_t zero_data_addr; // zero data address
uint32_t zero_data_size; // zero data size
+ uint32_t gpe0_size; // size of GPE0 binary
+ uint32_t gpe1_size; // size of GPE1 binary
uint32_t ep_addr; // entry point to the image
uint32_t checksum; // checksum of the image including header
+ uint32_t gpe0_checksum; // checksum of GPE0 image
+ uint32_t gpe1_checksum; // checksum of GPE1 image
uint32_t version; // image version
char image_id_str[IMAGE_ID_STR_SZ]; // image id string
uint16_t aplt_id; // type: enum OCC_APLT
@@ -126,15 +137,6 @@ struct image_header
typedef struct image_header imageHdr_t;
-typedef struct ipc_scom_op
-{
- uint32_t addr; // Register address
- uint64_t data; // Data for read/write
- uint32_t size; // Size of data buffer
- uint8_t read; // Read (1) or write (0)
- GpeErrorStruct error; // Error of SCOM operation
-} ipc_scom_op_t;
-
extern uint32_t __READ_ONLY_DATA_LEN__;
extern uint32_t __WRITEABLE_DATA_ADDR__;
extern uint32_t __WRITEABLE_DATA_LEN__;
@@ -177,8 +179,12 @@ const volatile imageHdr_t nameStr __attribute__((section("imageHeader")))= \
(uint32_t)&__WRITEABLE_DATA_LEN__, /* boot_writeable_size */ \
0, /* zero_data_addr (currently unused) */ \
0, /* zero data_size (currently unused) */ \
+ 0, /* GPE 0 Size (calculated later by imageHdrScript) */ \
+ 0, /* GPE 1 Size (calculated later by imageHdrScript) */ \
(uint32_t)&epAddr, /* ep_addr */ \
0, /* checksum (calculated later by imsageHdrScript) */ \
+ 0, /* GPE 0 checksum (calculated later by imageHdrScript) */ \
+ 0, /* GPE 1 checksum (calculated later by imageHdrScript) */ \
0, /* version (filled in later by imageHdrScript) */ \
IdStr, /* image_id_str */ \
(uint16_t)IdNum, /* aplt_id */ \
diff --git a/src/occ_405/main.c b/src/occ_405/main.c
index f45e5c8..a7b9e43 100755
--- a/src/occ_405/main.c
+++ b/src/occ_405/main.c
@@ -2,11 +2,11 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: src/occ/main.c $ */
+/* $Source: src/occ_405/main.c $ */
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2011,2015 */
+/* Contributors Listed Below - COPYRIGHT 2011,2016 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -956,7 +956,7 @@ int main(int argc, char **argv)
SSX_PANIC(0x01000001);
}
-#if SIMICS_ENVIRONMENT
+#if TRAC_TO_SIMICS
l_ssxrc = ppc405_mmu_map(
SIMICS_STDIO_BASE,
SIMICS_STDIO_BASE,
@@ -1099,7 +1099,6 @@ int main(int argc, char **argv)
l_tb_freq_hz);
CHECKPOINT(SSX_INITIALIZED);
-
// TRAC_XXX needs ssx services, traces can only be done after ssx_initialize
TRAC_init_buffers();
diff --git a/src/occ_gpe0/Makefile b/src/occ_gpe0/Makefile
index 0039e1d..cdcbb10 100644
--- a/src/occ_gpe0/Makefile
+++ b/src/occ_gpe0/Makefile
@@ -5,7 +5,7 @@
#
# OpenPOWER OnChipController Project
#
-# Contributors Listed Below - COPYRIGHT 2015
+# Contributors Listed Below - COPYRIGHT 2015,2016
# [+] International Business Machines Corp.
#
#
@@ -100,6 +100,6 @@ clean:
rm -fr $(OBJDIR)
#Add dependencies to header files
-ifneq ($(MAKECMDGOALS),clean)
-include $(OBJS:.o=.d)
-endif
+#ifneq ($(MAKECMDGOALS),clean)
+#include $(OBJS:.o=.d)
+#endif
diff --git a/src/occ_gpe0/gpe0_main.c b/src/occ_gpe0/gpe0_main.c
index 2777a70..398f137 100644
--- a/src/occ_gpe0/gpe0_main.c
+++ b/src/occ_gpe0/gpe0_main.c
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015 */
+/* Contributors Listed Below - COPYRIGHT 2015,2016 */
/* [+] International Business Machines Corp. */
/* */
/* */
diff --git a/src/occ_gpe0/gpe_export.h b/src/occ_gpe0/gpe_export.h
deleted file mode 100755
index 84184e7..0000000
--- a/src/occ_gpe0/gpe_export.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG */
-/* This is an automatically generated prolog. */
-/* */
-/* $Source: src/occ_405/gpe/gpe_export.h $ */
-/* */
-/* OpenPOWER OnChipController Project */
-/* */
-/* Contributors Listed Below - COPYRIGHT 2011,2015 */
-/* [+] International Business Machines Corp. */
-/* */
-/* */
-/* Licensed under the Apache License, Version 2.0 (the "License"); */
-/* you may not use this file except in compliance with the License. */
-/* You may obtain a copy of the License at */
-/* */
-/* http://www.apache.org/licenses/LICENSE-2.0 */
-/* */
-/* Unless required by applicable law or agreed to in writing, software */
-/* distributed under the License is distributed on an "AS IS" BASIS, */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
-/* implied. See the License for the specific language governing */
-/* permissions and limitations under the License. */
-/* */
-/* IBM_PROLOG_END_TAG */
-
-#ifndef _GPE_EXPORT_H
-#define _GPE_EXPORT_H
-
-typedef struct {
- union
- {
- struct {
- uint32_t rc;
- uint32_t addr;
- };
- uint64_t error;
- };
- uint64_t ffdc;
-} GpeErrorStruct; // Same for every GPE program
-
-#endif //_GPE_EXPORT_H
diff --git a/src/occ_gpe0/gpe_util.c b/src/occ_gpe0/gpe_util.c
index 42125a9..d8f7e6d 100644
--- a/src/occ_gpe0/gpe_util.c
+++ b/src/occ_gpe0/gpe_util.c
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015 */
+/* Contributors Listed Below - COPYRIGHT 2015,2016 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -27,6 +27,7 @@
#include "ppe42_scom.h"
#include "pss_constants.h"
#include "gpe_util.h"
+#include "gpe_export.h"
#define SPIPSS_P2S_ONGOING_MASK 0x8000000000000000
/*
diff --git a/src/occ_gpe0/img_defs.mk b/src/occ_gpe0/img_defs.mk
index fe5ea31..f13815a 100644
--- a/src/occ_gpe0/img_defs.mk
+++ b/src/occ_gpe0/img_defs.mk
@@ -5,7 +5,7 @@
#
# OpenPOWER OnChipController Project
#
-# Contributors Listed Below - COPYRIGHT 2015
+# Contributors Listed Below - COPYRIGHT 2015,2016
# [+] International Business Machines Corp.
#
#
@@ -118,6 +118,14 @@ ifndef PPETRACEPP_DIR
export PPETRACEPP_DIR = $(abspath ../ppe/tools/ppetracepp)
endif
+ifndef BOOTLOADER_OBJDIR
+export BOOTLOADER_OBJDIR = $(BASE_OBJDIR)/occBootLoader
+endif
+
+ifndef IMGHDRSCRIPT
+export IMGHDRSCRIPT = $(BOOTLOADER_OBJDIR)/imageHdrScript
+endif
+
OBJDIR = $(IMG_OBJDIR)$(SUB_OBJDIR)
diff --git a/src/occ_gpe0/link.cmd b/src/occ_gpe0/link.cmd
index a64a21a..344c060 100644
--- a/src/occ_gpe0/link.cmd
+++ b/src/occ_gpe0/link.cmd
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015 */
+/* Contributors Listed Below - COPYRIGHT 2015,2016 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -36,6 +36,7 @@ OUTPUT_FORMAT(elf32-powerpc);
// is loaded at 0xfff01000
#define SRAM_START 0xfff01000
#define SRAM_LENGTH 0xF000
+// Exception vectors
#define PPE_DEBUG_PTRS_OFFSET 0x180
MEMORY
@@ -51,12 +52,12 @@ EXTERN(pk_debug_ptrs);
SECTIONS
{
. = SRAM_START;
-
. = ALIGN(512);
_VECTOR_START = .;
+ __START_ADDR__ = .;
- .vectors _VECTOR_START : { *(.vectors) } > sram
+ .vectors _VECTOR_START : { *(.vectors) } > sram
///////////////////////////////////////////////////////////////////////////
// Debug Pointers Table
@@ -71,13 +72,12 @@ SECTIONS
////////////////////////////////
// All non-vector code goes here
////////////////////////////////
- .text : { *(.text) } > sram
+ .text : { *(.text) . = ALIGN(128); } > sram
////////////////////////////////
// Read-only Data
////////////////////////////////
- . = ALIGN(8);
_RODATA_SECTION_BASE = .;
// SDA2 constant sections .sdata2 and .sbss2 must be adjacent to each
@@ -85,20 +85,21 @@ SECTIONS
// offsets.
_SDA2_BASE_ = .;
- .sdata2 . : { *(.sdata2) } > sram
- .sbss2 . : { *(.sbss2) } > sram
+ .sdata2 . : { *(.sdata2) . = ALIGN(128); } > sram
+ .sbss2 . : { *(.sbss2 ) . = ALIGN(128); } > sram
// Other read-only data.
- .rodata . : { *(.rodata*) *(.got2) } > sram
+ .rodata . : { *(.rodata*) *(.got2) . = ALIGN(128); } > sram
- _RODATA_SECTION_SIZE = . - _RODATA_SECTION_BASE;
+ __READ_ONLY_DATA_LEN__ = . - _RODATA_SECTION_BASE;
+ __WRITEABLE_DATA_ADDR__ = .;
+ __WRITEABLE_DATA_LEN__ = . - __WRITEABLE_DATA_ADDR__;
////////////////////////////////
// Read-write Data
////////////////////////////////
- . = ALIGN(8);
_DATA_SECTION_BASE = .;
// SDA sections .sdata and .sbss must be adjacent to each
@@ -106,15 +107,15 @@ SECTIONS
// offsets.
_SDA_BASE_ = .;
- .sdata . : { *(.sdata) } > sram
- .sbss . : { *(.sbss) } > sram
+ .sdata . : { *(.sdata) . = ALIGN(128); } > sram
+ .sbss . : { *(.sbss) . = ALIGN(128); } > sram
// Other read-write data
// It's not clear why boot.S is generating empty .glink,.iplt
- .rela . : { *(.rela*) } > sram
- .rwdata . : { *(.data) *(.bss) } > sram
-// .iplt . : { *(.iplt) } > sram
+ .rela . : { *(.rela*) . = ALIGN(128); } > sram
+ .rwdata . : { *(.data) *(.bss) . = ALIGN(128); } > sram
+// .iplt . : { *(.iplt) ALIGN(128); } > sram
_PK_INITIAL_STACK_LIMIT = .;
. = . + INITIAL_STACK_SIZE;
diff --git a/src/occ_gpe0/topfiles.mk b/src/occ_gpe0/topfiles.mk
index 58f261c..8723d2f 100644
--- a/src/occ_gpe0/topfiles.mk
+++ b/src/occ_gpe0/topfiles.mk
@@ -5,7 +5,7 @@
#
# OpenPOWER OnChipController Project
#
-# Contributors Listed Below - COPYRIGHT 2015
+# Contributors Listed Below - COPYRIGHT 2015,2016
# [+] International Business Machines Corp.
#
#
diff --git a/src/occ_gpe1/Makefile b/src/occ_gpe1/Makefile
index a69bc27..3479842 100644
--- a/src/occ_gpe1/Makefile
+++ b/src/occ_gpe1/Makefile
@@ -1,3 +1,27 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/occ_gpe1/Makefile $
+#
+# OpenPOWER OnChipController Project
+#
+# Contributors Listed Below - COPYRIGHT 2015,2016
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
#remove this once we have a real compiler
export P2P_ENABLE = 1
@@ -76,6 +100,6 @@ clean:
rm -fr $(OBJDIR)
#Add dependencies to header files
-ifneq ($(MAKECMDGOALS),clean)
-include $(OBJS:.o=.d)
-endif
+#ifneq ($(MAKECMDGOALS),clean)
+#include $(OBJS:.o=.d)
+#endif
diff --git a/src/occ_gpe1/img_defs.mk b/src/occ_gpe1/img_defs.mk
index fec6d69..51a027c 100644
--- a/src/occ_gpe1/img_defs.mk
+++ b/src/occ_gpe1/img_defs.mk
@@ -5,7 +5,7 @@
#
# OpenPOWER OnChipController Project
#
-# Contributors Listed Below - COPYRIGHT 2015
+# Contributors Listed Below - COPYRIGHT 2015,2016
# [+] International Business Machines Corp.
#
#
@@ -114,6 +114,14 @@ ifndef PPETRACEPP_DIR
export PPETRACEPP_DIR = $(abspath ../ppe/tools/ppetracepp)
endif
+ifndef BOOTLOADER_OBJDIR
+export BOOTLOADER_OBJDIR = $(BASE_OBJDIR)/occBootLoader
+endif
+
+ifndef IMGHDRSCRIPT
+export IMGHDRSCRIPT = $(BOOTLOADER_OBJDIR)/imageHdrScript
+endif
+
OBJDIR = $(IMG_OBJDIR)$(SUB_OBJDIR)
diff --git a/src/occ_gpe1/link.cmd b/src/occ_gpe1/link.cmd
index ec9245e..cd243ec 100644
--- a/src/occ_gpe1/link.cmd
+++ b/src/occ_gpe1/link.cmd
@@ -1,3 +1,27 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/occ_gpe1/link.cmd $ */
+/* */
+/* OpenPOWER OnChipController Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
// Need to do this so that elf32-powerpc is not modified!
#undef powerpc
@@ -46,7 +70,7 @@ SECTIONS
////////////////////////////////
// All non-vector code goes here
////////////////////////////////
- .text : { *(.text) } > sram
+ .text : { *(.text) . = ALIGN(128); } > sram
////////////////////////////////
// Read-only Data
@@ -60,12 +84,12 @@ SECTIONS
// offsets.
_SDA2_BASE_ = .;
- .sdata2 . : { *(.sdata2) } > sram
- .sbss2 . : { *(.sbss2) } > sram
+ .sdata2 . : { *(.sdata2) . = ALIGN(128); } > sram
+ .sbss2 . : { *(.sbss2) . = ALIGN(128); } > sram
// Other read-only data.
- .rodata . : { *(.rodata*) *(.got2) } > sram
+ .rodata . : { *(.rodata*) *(.got2) . = ALIGN(128); } > sram
_RODATA_SECTION_SIZE = . - _RODATA_SECTION_BASE;
@@ -81,15 +105,15 @@ SECTIONS
// offsets.
_SDA_BASE_ = .;
- .sdata . : { *(.sdata) } > sram
- .sbss . : { *(.sbss) } > sram
+ .sdata . : { *(.sdata) . = ALIGN(128); } > sram
+ .sbss . : { *(.sbss) . = ALIGN(128); } > sram
// Other read-write data
// It's not clear why boot.S is generating empty .glink,.iplt
- .rela . : { *(.rela*) } > sram
- .rwdata . : { *(.data) *(.bss) } > sram
-// .iplt . : { *(.iplt) } > sram
+ .rela . : { *(.rela*) . = ALIGN(128); } > sram
+ .rwdata . : { *(.data) *(.bss) . = ALIGN(128); } > sram
+// .iplt . : { *(.iplt) . = ALIGN(128); } > sram
_PK_INITIAL_STACK_LIMIT = .;
. = . + INITIAL_STACK_SIZE;
diff --git a/src/ssx/ppc405/ppc405_exceptions.S b/src/ssx/ppc405/ppc405_exceptions.S
index b4a1419..aae7c0b 100644
--- a/src/ssx/ppc405/ppc405_exceptions.S
+++ b/src/ssx/ppc405/ppc405_exceptions.S
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2014,2015 */
+/* Contributors Listed Below - COPYRIGHT 2014,2016 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -84,10 +84,6 @@
__vectors:
__vectors_0000:
- // FIXME: This is just a quick hack to get SSX running on simics -- grm
- .global __ssx_boot
- b __ssx_boot
-
### ****************************************************************************
### .vectors_0100
### ****************************************************************************
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