WOF dependency cleanup

RTC:174543

Change-Id: Ie315794a2745c9b6620c787927a354ac182339d6
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42061
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>

8 files changed, 393 insertions, 105 deletions

diff --git a/src/occ_405/amec/amec_freq.c b/src/occ_405/amec/amec_freq.c
index 05d14c2..b138d4b 100755
--- a/src/occ_405/amec/amec_freq.c
+++ b/src/occ_405/amec/amec_freq.c
@@ -129,10 +129,22 @@ errlHndl_t amec_set_freq_range(const OCC_MODE i_mode)
 
       // Use max frequency for performance modes and FMF
       if( (i_mode == OCC_MODE_NOM_PERFORMANCE) || (i_mode == OCC_MODE_MAX_PERFORMANCE) ||
-          (i_mode == OCC_MODE_FMF) )
-        l_freq_max = G_proc_fmax_mhz;
+          (i_mode == OCC_MODE_FMF) || (i_mode ==OCC_MODE_DYN_POWER_SAVE) ||
+          (i_mode == OCC_MODE_DYN_POWER_SAVE_FP) )
+      {
+          if( g_amec->wof.wof_disabled )
+          {
+              l_freq_max = G_sysConfigData.sys_mode_freq.table[OCC_MODE_TURBO];
+          }
+          else
+          {
+              l_freq_max = G_proc_fmax_mhz;
+          }
+      }
       else
-        l_freq_max = G_sysConfigData.sys_mode_freq.table[i_mode];
+      {
+          l_freq_max = G_sysConfigData.sys_mode_freq.table[i_mode];
+      }
     }
 
     if( (l_freq_min == 0) || (l_freq_max == 0) )
diff --git a/src/occ_405/amec/amec_parm.h b/src/occ_405/amec/amec_parm.h
index bcc2fe4..ddcf0e1 100755
--- a/src/occ_405/amec/amec_parm.h
+++ b/src/occ_405/amec/amec_parm.h
@@ -116,19 +116,21 @@ typedef enum
     PARM_IAC_VDD,
     PARM_IAC_VDN,
     PARM_IAC_TDP_VDD,
-    PARM_VOLTAGE_IDX,
     PARM_V_RATIO,
     PARM_F_RATIO,
     PARM_V_CLIP,
-    PARM_F_CLIP,
+    PARM_F_CLIP_PS,
+    PARM_F_CLIP_FREQ,
     PARM_CEFF_TDP_VDD,
     PARM_CEFF_VDD,
     PARM_CEFF_RATIO_VDD,
     PARM_CEFF_TDP_VDN,
     PARM_CEFF_VDN,
     PARM_CEFF_RATIO_VDN,
+    PARM_VOLTAGE_IDX,
     PARM_ALL_CORES_OFF_ISO,
     PARM_ALL_CACHES_ON_ISO,
+    PARM_ALL_CACHES_OFF_ISO,
     PARM_QUAD_GOOD_CORES_ONLY,
     PARM_QUAD_ON_CORES,
     PARM_QUAD_BAD_OFF_CORES,
@@ -148,10 +150,42 @@ typedef enum
     PARM_REQ_ACTIVE_QUADS_ADDR,
     PARM_CORE_LEAKAGE_PERCENT,
     PARM_PSTATE_TBL_SRAM_ADDR,
+    PARM_GPE_REQ_RC,
+    PARM_CONTROL_IPC_RC,
     PARM_VFRT_CALLBACK_ERR,
     PARM_PGPE_WOF_OFF,
     PARM_VFRT_MM_OFFSET,
     PARM_VFRT_REQ_RC,
+    PARM_VDD_RATIO_VOLT,
+    PARM_VDD_RATIO_FREQ,
+    PARM_VDN_RATIO_VOLT,
+    PARM_VDN_RATIO_FREQ,
+    PARM_CORES_OFF_B4,
+    PARM_GOOD_QUADS_PER_SORT,
+    PARM_NORMAL_CORES_PER_SORT,
+    PARM_CACHES_PER_SORT,
+    PARM_GOOD_NORMAL_CORES,
+    PARM_GOOD_CACHES,
+    PARM_CORES_CACHES_ON,
+    PARM_CORES_CACHES_OFF,
+    PARM_CORES_OFF_CACHES_ON,
+    PARM_QUAD_ALL_ON_1,
+    PARM_QUAD_ALL_ON_2,
+    PARM_QUAD_ALL_ON_3,
+    PARM_QUAD_ALL_ON_4,
+    PARM_QUAD_ALL_ON_5,
+    PARM_QUAD_ALL_ON_6,
+    PARM_IVDN,
+    PARM_CORES_CACHES_ON_T,
+    PARM_CORES_CACHES_OFF_T,
+    PARM_CORES_OFF_CACHES_ON_T,
+    PARM_QUAD_ALL_ON_1_T,
+    PARM_QUAD_ALL_ON_2_T,
+    PARM_QUAD_ALL_ON_3_T,
+    PARM_QUAD_ALL_ON_4_T,
+    PARM_QUAD_ALL_ON_5_T,
+    PARM_QUAD_ALL_ON_6_T,
+    PARM_AVGTEMP_VDN,
 
     // End WOF Parameters
     AMEC_PARM_NUMBER_OF_PARAMETERS
diff --git a/src/occ_405/amec/amec_parm_table.c b/src/occ_405/amec/amec_parm_table.c
index 6f07bee..9e0b0c6 100755
--- a/src/occ_405/amec/amec_parm_table.c
+++ b/src/occ_405/amec/amec_parm_table.c
@@ -172,7 +172,7 @@ amec_parm_t g_amec_parm_list[] = {
     AMEC_PARM_UINT32_ARRAY(PARM_V_CORE, "v_core_100uV", &g_amec_sys.wof.v_core_100uV, MAXIMUM_QUADS),
     AMEC_PARM_UINT32(PARM_CORE_PWR_ON, "core_pwr_on", &g_amec_sys.wof.core_pwr_on),
     AMEC_PARM_UINT8_ARRAY(PARM_CORES_ON_PER_QUAD, "coresonPerQuad", &g_amec_sys.wof.cores_on_per_quad, MAXIMUM_QUADS),
-    AMEC_PARM_UINT16(PARM_WOF_DISABLED, "wof_disabled", &g_amec_sys.wof.wof_disabled),
+    AMEC_PARM_UINT32(PARM_WOF_DISABLED, "wof_disabled", &g_amec_sys.wof.wof_disabled),
     AMEC_PARM_UINT32(PARM_VOLT_VDD_SENSE, "voltvddsense", &g_amec_sys.wof.voltvddsense_sensor),
     AMEC_PARM_UINT16_ARRAY(PARM_TEMPPROCTHERMC, "tempprocthrmc", &g_amec_sys.wof.tempprocthrmc, MAX_NUM_CORES),
     AMEC_PARM_UINT16(PARM_TEMPNEST, "tempnest_sensor", &g_amec_sys.wof.tempnest_sensor),
@@ -189,23 +189,25 @@ amec_parm_t g_amec_parm_list[] = {
     AMEC_PARM_UINT32(PARM_IAC_VDD, "iac_vdd", &g_amec_sys.wof.iac_vdd),
     AMEC_PARM_UINT32(PARM_IAC_VDN, "iac_vdn", &g_amec_sys.wof.iac_vdn),
     AMEC_PARM_UINT32(PARM_IAC_TDP_VDD, "iac_tdp_vdd", &g_amec_sys.wof.iac_tdp_vdd),
-    AMEC_PARM_UINT8(PARM_VOLTAGE_IDX, "voltage_idx", &g_amec_sys.wof.chip_volt_idx),
-    AMEC_PARM_UINT32(PARM_V_RATIO, "Vratio", &g_amec_sys.wof.v_ratio),
-    AMEC_PARM_UINT32(PARM_F_RATIO, "Fratio", &g_amec_sys.wof.f_ratio),
-    AMEC_PARM_UINT32(PARM_V_CLIP, "Vclip", &g_amec_sys.wof.v_clip),
-    AMEC_PARM_UINT32(PARM_F_CLIP, "Fclip", &g_amec_sys.wof.f_clip),
+    AMEC_PARM_UINT16(PARM_V_RATIO, "Vratio", &g_amec_sys.wof.v_ratio),
+    AMEC_PARM_UINT16(PARM_F_RATIO, "Fratio", &g_amec_sys.wof.f_ratio),
+    AMEC_PARM_UINT16(PARM_V_CLIP, "Vclip", &g_amec_sys.wof.v_clip),
+    AMEC_PARM_UINT8(PARM_F_CLIP_PS, "Fclip_PS", &g_amec_sys.wof.f_clip_ps),
+    AMEC_PARM_UINT32(PARM_F_CLIP_FREQ, "Fclip_Freq", &g_amec_sys.wof.f_clip_freq),
     AMEC_PARM_UINT32(PARM_CEFF_TDP_VDD, "ceff_tdp_vdd", &g_amec_sys.wof.ceff_tdp_vdd),
     AMEC_PARM_UINT32(PARM_CEFF_VDD, "ceff_vdd", &g_amec_sys.wof.ceff_vdd),
     AMEC_PARM_UINT32(PARM_CEFF_RATIO_VDD, "ceff_ratio_vdd", &g_amec_sys.wof.ceff_ratio_vdd),
     AMEC_PARM_UINT32(PARM_CEFF_TDP_VDN, "ceff_tdp_vdn", &g_amec_sys.wof.ceff_tdp_vdn),
     AMEC_PARM_UINT32(PARM_CEFF_VDN, "ceff_vdn", &g_amec_sys.wof.ceff_vdn),
     AMEC_PARM_UINT32(PARM_CEFF_RATIO_VDN, "ceff_ratio_vdn", &g_amec_sys.wof.ceff_ratio_vdn),
+    AMEC_PARM_UINT8(PARM_VOLTAGE_IDX, "voltage_idx", &g_amec_sys.wof.chip_volt_idx),
 
     AMEC_PARM_UINT32(PARM_ALL_CORES_OFF_ISO, "allCoresOffIso", &g_amec_sys.wof.all_cores_off_iso),
     AMEC_PARM_UINT32(PARM_ALL_CACHES_ON_ISO, "allCachesOnIso", &g_amec_sys.wof.all_good_caches_on_iso),
-    AMEC_PARM_UINT16_ARRAY(PARM_QUAD_GOOD_CORES_ONLY, "quad_good_cores", &g_amec_sys.wof.quad_good_cores_only, MAXIMUM_QUADS),
+    AMEC_PARM_UINT32(PARM_ALL_CACHES_OFF_ISO, "allCachesOffIso", &g_amec_sys.wof.all_caches_off_iso),
+    AMEC_PARM_UINT32_ARRAY(PARM_QUAD_GOOD_CORES_ONLY, "quad_good_cores", &g_amec_sys.wof.quad_good_cores_only, MAXIMUM_QUADS),
     AMEC_PARM_UINT16_ARRAY(PARM_QUAD_ON_CORES, "quad_on_cores", &g_amec_sys.wof.quad_on_cores, MAXIMUM_QUADS),
-    AMEC_PARM_UINT16_ARRAY(PARM_QUAD_BAD_OFF_CORES,"quadBadOffCores", &g_amec_sys.wof.quad_on_cores, MAXIMUM_QUADS),
+    AMEC_PARM_UINT16_ARRAY(PARM_QUAD_BAD_OFF_CORES,"quadBadOffCores", &g_amec_sys.wof.quad_bad_off_cores, MAXIMUM_QUADS),
     AMEC_PARM_UINT8(PARM_REQ_ACTIVE_QUAD_UPDATE, "req_active_quad", &g_amec_sys.wof.req_active_quad_update),
     AMEC_PARM_UINT8(PARM_PREV_REQ_ACTIVE_QUADS, "prevActiveQuads", &g_amec_sys.wof.prev_req_active_quads),
     AMEC_PARM_UINT8(PARM_NUM_ACTIVE_QUADS, "numActiveQuads", &g_amec_sys.wof.num_active_quads),
@@ -222,10 +224,43 @@ amec_parm_t g_amec_parm_list[] = {
     AMEC_PARM_UINT32(PARM_REQ_ACTIVE_QUADS_ADDR, "reqActQuadAddr", &g_amec_sys.wof.req_active_quads_addr),
     AMEC_PARM_UINT16(PARM_CORE_LEAKAGE_PERCENT, "coreLeakPercent", &g_amec_sys.wof.core_leakage_percent),
     AMEC_PARM_UINT32(PARM_PSTATE_TBL_SRAM_ADDR, "PstatesSramAddr", &g_amec_sys.wof.pstate_tbl_sram_addr),
+    AMEC_PARM_UINT32(PARM_GPE_REQ_RC, "gpeReqRc", &g_amec_sys.wof.gpe_req_rc),
+    AMEC_PARM_UINT32(PARM_CONTROL_IPC_RC, "ctrlIpcRc", &g_amec_sys.wof.control_ipc_rc),
     AMEC_PARM_UINT8(PARM_VFRT_CALLBACK_ERR, "vfrtCallbackErr", &g_amec_sys.wof.vfrt_callback_error),
     AMEC_PARM_UINT8(PARM_PGPE_WOF_OFF, "pgpeWofOff", &g_amec_sys.wof.pgpe_wof_off),
     AMEC_PARM_UINT32(PARM_VFRT_MM_OFFSET, "vfrt_mm_offset", &g_amec_sys.wof.vfrt_mm_offset),
     AMEC_PARM_UINT8(PARM_VFRT_REQ_RC, "wof_vfrt_req_rc", &g_amec_sys.wof.wof_vfrt_req_rc ),
+    AMEC_PARM_UINT32(PARM_VDD_RATIO_VOLT, "vddRatioVolt", &g_amec_sys.wof.c_ratio_vdd_volt),
+    AMEC_PARM_UINT32(PARM_VDD_RATIO_FREQ, "vddRatioFreq", &g_amec_sys.wof.c_ratio_vdd_freq),
+    AMEC_PARM_UINT32(PARM_VDN_RATIO_VOLT, "vdnRatioVolt", &g_amec_sys.wof.c_ratio_vdn_volt),
+    AMEC_PARM_UINT32(PARM_VDN_RATIO_FREQ, "vdnRatioFreq", &g_amec_sys.wof.c_ratio_vdn_freq),
+    AMEC_PARM_UINT32(PARM_CORES_OFF_B4,"Allcoresoffb4", &g_amec_sys.wof.all_cores_off_before),
+    AMEC_PARM_UINT8(PARM_GOOD_QUADS_PER_SORT, "QuadsPerSort", &g_amec_sys.wof.good_quads_per_sort),
+    AMEC_PARM_UINT8(PARM_NORMAL_CORES_PER_SORT, "CoresPerSort", &g_amec_sys.wof.good_normal_cores_per_sort),
+    AMEC_PARM_UINT8(PARM_CACHES_PER_SORT, "CachesPerSort", &g_amec_sys.wof.good_caches_per_sort),
+    AMEC_PARM_UINT8_ARRAY(PARM_GOOD_NORMAL_CORES, "goodNormalCores", &g_amec_sys.wof.good_normal_cores, MAXIMUM_QUADS),
+    AMEC_PARM_UINT8_ARRAY(PARM_GOOD_CACHES, "goodCaches", &g_amec_sys.wof.good_caches, MAXIMUM_QUADS),
+    AMEC_PARM_UINT16_ARRAY(PARM_CORES_CACHES_ON, "coresCachesOn", &g_amec_sys.wof.allGoodCoresCachesOn, MAXIMUM_QUADS),
+    AMEC_PARM_UINT16_ARRAY(PARM_CORES_CACHES_OFF, "coresCachesOff", &g_amec_sys.wof.allCoresCachesOff, MAXIMUM_QUADS),
+    AMEC_PARM_UINT16_ARRAY(PARM_CORES_OFF_CACHES_ON, "corsOffCachesOn", &g_amec_sys.wof.coresOffCachesOn, MAXIMUM_QUADS),
+    AMEC_PARM_UINT16_ARRAY(PARM_QUAD_ALL_ON_1, "q1CoresCachesOn", &g_amec_sys.wof.quad1CoresCachesOn, MAXIMUM_QUADS),
+    AMEC_PARM_UINT16_ARRAY(PARM_QUAD_ALL_ON_2, "q2CoresCachesOn", &g_amec_sys.wof.quad2CoresCachesOn, MAXIMUM_QUADS),
+    AMEC_PARM_UINT16_ARRAY(PARM_QUAD_ALL_ON_3, "q3CoresCachesOn", &g_amec_sys.wof.quad3CoresCachesOn, MAXIMUM_QUADS),
+    AMEC_PARM_UINT16_ARRAY(PARM_QUAD_ALL_ON_4, "q4CoresCachesOn", &g_amec_sys.wof.quad4CoresCachesOn, MAXIMUM_QUADS),
+    AMEC_PARM_UINT16_ARRAY(PARM_QUAD_ALL_ON_5, "q5CoresCachesOn", &g_amec_sys.wof.quad5CoresCachesOn, MAXIMUM_QUADS),
+    AMEC_PARM_UINT16_ARRAY(PARM_QUAD_ALL_ON_6, "q6CoresCachesOn", &g_amec_sys.wof.quad6CoresCachesOn, MAXIMUM_QUADS),
+    AMEC_PARM_UINT16_ARRAY(PARM_IVDN, "ivdn", &g_amec_sys.wof.ivdn, MAXIMUM_QUADS),
+    AMEC_PARM_UINT8_ARRAY(PARM_CORES_CACHES_ON_T, "coresCachesOnT", &g_amec_sys.wof.allCoresCachesOnT, MAXIMUM_QUADS),
+    AMEC_PARM_UINT8_ARRAY(PARM_CORES_CACHES_OFF_T, "coresCachesOffT", &g_amec_sys.wof.allCoresCachesOffT, MAXIMUM_QUADS),
+    AMEC_PARM_UINT8_ARRAY(PARM_CORES_OFF_CACHES_ON_T, "corOffCachesOnT", &g_amec_sys.wof.coresOffCachesOnT, MAXIMUM_QUADS),
+    AMEC_PARM_UINT8_ARRAY(PARM_QUAD_ALL_ON_1_T, "q1CorsCachesOnT", &g_amec_sys.wof.quad1CoresCachesOnT, MAXIMUM_QUADS),
+    AMEC_PARM_UINT8_ARRAY(PARM_QUAD_ALL_ON_2_T, "q2CorsCachesOnT", &g_amec_sys.wof.quad2CoresCachesOnT, MAXIMUM_QUADS),
+    AMEC_PARM_UINT8_ARRAY(PARM_QUAD_ALL_ON_3_T, "q3CorsCachesOnT", &g_amec_sys.wof.quad3CoresCachesOnT, MAXIMUM_QUADS),
+    AMEC_PARM_UINT8_ARRAY(PARM_QUAD_ALL_ON_4_T, "q4CorsCachesOnT", &g_amec_sys.wof.quad4CoresCachesOnT, MAXIMUM_QUADS),
+    AMEC_PARM_UINT8_ARRAY(PARM_QUAD_ALL_ON_5_T, "q5CorsCachesOnT", &g_amec_sys.wof.quad5CoresCachesOnT, MAXIMUM_QUADS),
+    AMEC_PARM_UINT8_ARRAY(PARM_QUAD_ALL_ON_6_T, "q6CorsCachesOnT", &g_amec_sys.wof.quad6CoresCachesOnT, MAXIMUM_QUADS),
+    AMEC_PARM_UINT8_ARRAY(PARM_AVGTEMP_VDN, "avgtemp_vdn", &g_amec_sys.wof.avgtemp_vdn, MAXIMUM_QUADS),
+
     // End WOF parameters
 };
 
diff --git a/src/occ_405/amec/amec_sensors_power.c b/src/occ_405/amec/amec_sensors_power.c
index 4e4f240..1363a78 100755
--- a/src/occ_405/amec/amec_sensors_power.c
+++ b/src/occ_405/amec/amec_sensors_power.c
@@ -23,7 +23,6 @@
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
 
-//#define AVSDEBUG
 
 /******************************************************************************/
 /* Includes                                                                   */
@@ -47,7 +46,7 @@
 #include <cmdh_snapshot.h>
 #include "amec_oversub.h"
 #include "avsbus.h"
-
+#include <p9_pstates_occ.h>
 /******************************************************************************/
 /* Globals                                                                    */
 /******************************************************************************/
@@ -73,6 +72,8 @@ uint32_t G_curr_num_gpus_sys = 0;
 extern uint8_t G_occ_interrupt_type;
 extern bool    G_vrm_thermal_monitoring;
 extern PWR_READING_TYPE  G_pwr_reading_type;
+extern bool    G_apss_present;
+extern OCCPstateParmBlock G_oppb;
 
 //*************************************************************************/
 // Code
@@ -485,9 +486,8 @@ void update_avsbus_power_sensors(const avsbus_type_e i_type)
     static bool L_throttle_vdd = FALSE;
     static bool L_throttle_vdn = FALSE;
     bool * L_throttle = &L_throttle_vdd;
-    // TODO: RTC 130216 : read loadline and distloss from Pstate Super Structure
-    uint32_t l_loadline = 0x0000; // OCCPstateParmBlock.vdd_sysparm.loadline_uohm
-    uint32_t l_distloss = 0x0000; // OCCPstateParmBlock.vdd_sysparm.distloss_uohm
+    uint32_t l_loadline = G_oppb.vdd_sysparm.loadline_uohm;
+    uint32_t l_distloss = G_oppb.vdd_sysparm.distloss_uohm;
     uint32_t l_currentSensor = CURVDD;
     uint32_t l_voltageSensor = VOLTVDD;
     uint32_t l_voltageChip = VOLTVDDSENSE;
@@ -496,8 +496,8 @@ void update_avsbus_power_sensors(const avsbus_type_e i_type)
     if (AVSBUS_VDN == i_type)
     {
         L_throttle = &L_throttle_vdn;
-        l_loadline = 0x0000; // OCCPstateParmBlock.vdn_sysparm.loadline_uohm
-        l_distloss = 0x0000; // OCCPstateParmBlock.vdn_sysparm.distloss_uohm
+        l_loadline = G_oppb.vdn_sysparm.loadline_uohm;
+        l_distloss = G_oppb.vdn_sysparm.distloss_uohm;
         l_currentSensor = CURVDN;
         l_voltageSensor = VOLTVDN;
         l_voltageChip = VOLTVDNSENSE;
@@ -519,18 +519,6 @@ void update_avsbus_power_sensors(const avsbus_type_e i_type)
         l_current_10ma = l_sensor->sample;
     }
 
-#ifdef AVSDEBUG
-    // TODO: RTC 130216 : REMOVE AFTER VERIFYING loadline/distlost from Pstate Super Structure
-    static uint32_t L_traceCount = 0;
-    uint32_t DEBUG_TRACE_MAX = 8;
-    if (L_traceCount < DEBUG_TRACE_MAX)
-    {
-        TRAC_INFO("update_avsbus_power_sensors: #%d Vd%c=%dx100uV, I=%dx10mA", L_traceCount, (i_type==AVSBUS_VDD)?'d':'n',
-                  l_voltage_100uv, l_current_10ma);
-        TRAC_INFO("update_avsbus_power_sensors: #%d Vd%c Rloadline=%d, Rdistloss=%d", L_traceCount, (i_type==AVSBUS_VDD)?'d':'n',
-                  l_loadline, l_distloss);
-    }
-#endif
 
     if ((l_voltage_100uv != 0) && (l_current_10ma != 0))
     {
@@ -581,24 +569,7 @@ void update_avsbus_power_sensors(const avsbus_type_e i_type)
             }
         }
 
-#ifdef AVSDEBUG
-        // TODO: RTC 130216 : REMOVE AFTER VERIFYING loadline/distlost from Pstate Super Structure
-        if (L_traceCount < DEBUG_TRACE_MAX)
-        {
-            const sensor_t *power = getSensorByGsid(l_powerSensor);
-            TRAC_INFO("update_avsbus_power_sensors: #%d Vd%cs=%dx100uV, P=%dW", L_traceCount, (i_type==AVSBUS_VDD)?'d':'n',
-                      l_chip_voltage_100uv, power->sample);
-        }
-#endif
-    }
-
-#ifdef AVSDEBUG
-    // TODO: RTC 130216 : REMOVE AFTER VERIFYING loadline/distlost from Pstate Super Structure
-    if (L_traceCount < DEBUG_TRACE_MAX)
-    {
-        ++L_traceCount;
     }
-#endif
 
 } // end update_avsbus_power_sensors()
 
diff --git a/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c b/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c
index fa6aab9..ab91db3 100755
--- a/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c
+++ b/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c
@@ -302,8 +302,6 @@ errlHndl_t data_store_freq_data(const cmdh_fsp_cmd_t * i_cmd_ptr,
                 l_freq = G_proc_fmax_mhz;
             }
             l_table[OCC_MODE_TURBO] = l_freq;
-            l_table[OCC_MODE_DYN_POWER_SAVE] = l_freq;
-            l_table[OCC_MODE_DYN_POWER_SAVE_FP] = l_freq;
             CMDH_TRAC_INFO("Turbo frequency = %d MHz", l_freq);
 
             // Bytes 7-8 Minimum Frequency Point
@@ -353,6 +351,10 @@ errlHndl_t data_store_freq_data(const cmdh_fsp_cmd_t * i_cmd_ptr,
                 G_proc_fmax_mhz = l_table[OCC_MODE_TURBO];
             }
 
+            // Set dynamic power save frequencies
+            l_table[OCC_MODE_DYN_POWER_SAVE] = G_proc_fmax_mhz;
+            l_table[OCC_MODE_DYN_POWER_SAVE_FP] = G_proc_fmax_mhz;
+
             // Bytes 11-12 Static Power Save Frequency Point
             l_freq = (l_buf[8] << 8 | l_buf[9]);
             // in case min freq was clipped verify power save not below min
diff --git a/src/occ_405/main.c b/src/occ_405/main.c
index 36bf4ce..7abdbfb 100755
--- a/src/occ_405/main.c
+++ b/src/occ_405/main.c
@@ -487,6 +487,51 @@ void create_tlb_entry(uint32_t address, uint32_t size)
 #endif
 }
 
+/*
+ * Function Specification
+ *
+ * Name: externalize_oppb
+ *
+ * Description: Saves the relevant content from the G_oppb into g_amec
+ *              for WOF calculations.
+ *
+ * End Function Specification
+ */
+void externalize_oppb( void )
+{
+
+    g_amec->wof.good_quads_per_sort = G_oppb.iddq.good_quads_per_sort;
+    g_amec->wof.good_normal_cores_per_sort = G_oppb.iddq.good_normal_cores_per_sort;
+    g_amec->wof.good_caches_per_sort = G_oppb.iddq.good_caches_per_sort;
+
+    int i = 0;
+    for( i = 0; i < MAXIMUM_QUADS; i++)
+    {
+        g_amec->wof.good_normal_cores[i] = G_oppb.iddq.good_normal_cores[i];
+        g_amec->wof.good_caches[i] = G_oppb.iddq.good_caches[i];
+        g_amec->wof.allGoodCoresCachesOn[i] = G_oppb.iddq.ivdd_all_good_cores_on_caches_on[i];
+        g_amec->wof.allCoresCachesOff[i] = G_oppb.iddq.ivdd_all_cores_off_caches_off[i];
+        g_amec->wof.coresOffCachesOn[i] = G_oppb.iddq.ivdd_all_good_cores_off_good_caches_on[i];
+        g_amec->wof.quad1CoresCachesOn[i] = G_oppb.iddq.ivdd_quad_good_cores_on_good_caches_on[0][i];
+        g_amec->wof.quad2CoresCachesOn[i] = G_oppb.iddq.ivdd_quad_good_cores_on_good_caches_on[1][i];
+        g_amec->wof.quad3CoresCachesOn[i] = G_oppb.iddq.ivdd_quad_good_cores_on_good_caches_on[2][i];
+        g_amec->wof.quad4CoresCachesOn[i] = G_oppb.iddq.ivdd_quad_good_cores_on_good_caches_on[3][i];
+        g_amec->wof.quad5CoresCachesOn[i] = G_oppb.iddq.ivdd_quad_good_cores_on_good_caches_on[4][i];
+        g_amec->wof.quad6CoresCachesOn[i] = G_oppb.iddq.ivdd_quad_good_cores_on_good_caches_on[5][i];
+        g_amec->wof.ivdn[i] = G_oppb.iddq.ivdn[i];
+        g_amec->wof.allCoresCachesOnT[i] = G_oppb.iddq.avgtemp_all_good_cores_on[i];
+        g_amec->wof.allCoresCachesOffT[i] = G_oppb.iddq.avgtemp_all_cores_off_caches_off[i];
+        g_amec->wof.coresOffCachesOnT[i] = G_oppb.iddq.avgtemp_all_good_cores_off[i];
+        g_amec->wof.quad1CoresCachesOnT[i] = G_oppb.iddq.avgtemp_quad_good_cores_on[0][i];
+        g_amec->wof.quad2CoresCachesOnT[i] = G_oppb.iddq.avgtemp_quad_good_cores_on[1][i];
+        g_amec->wof.quad3CoresCachesOnT[i] = G_oppb.iddq.avgtemp_quad_good_cores_on[2][i];
+        g_amec->wof.quad4CoresCachesOnT[i] = G_oppb.iddq.avgtemp_quad_good_cores_on[3][i];
+        g_amec->wof.quad5CoresCachesOnT[i] = G_oppb.iddq.avgtemp_quad_good_cores_on[4][i];
+        g_amec->wof.quad6CoresCachesOnT[i] = G_oppb.iddq.avgtemp_quad_good_cores_on[5][i];
+        g_amec->wof.avgtemp_vdn[i] = G_oppb.iddq.avgtemp_vdn[i];
+
+    }
+}
 
 /*
  * Function Specification
@@ -504,6 +549,8 @@ void read_wof_header(void)
     bool l_error = false;
 
     MAIN_TRAC_INFO("read_wof_header() 0x%08X", G_pgpe_header.wof_tables_addr);
+    // Get OCCPstateParmBlock out to Amester
+    externalize_oppb();
 
     // Read active quads address, wof tables address, and wof tables len
     g_amec->wof.req_active_quads_addr   = G_pgpe_header.requested_active_quad_sram_addr;
@@ -512,6 +559,8 @@ void read_wof_header(void)
     g_amec->wof.pgpe_wof_state_addr     = G_pgpe_header.wof_state_address;
     g_amec->wof.pstate_tbl_sram_addr    = G_pgpe_header.occ_pstate_table_sram_addr;
 
+    MAIN_TRAC_INFO("read_wof_header() 0x%08X", g_amec->wof.vfrt_tbls_main_mem_addr);
+
     // Read in quad state addresses here once
     g_amec->wof.quad_state_0_addr = G_pgpe_header.actual_quad_status_sram_addr;
     g_amec->wof.quad_state_1_addr = g_amec->wof.quad_state_0_addr +
@@ -628,13 +677,12 @@ void read_wof_header(void)
     else
     {
         // We were unable to get the WOF header thus it should not be run.
-        MAIN_TRAC_INFO("read_wof_header(): WOF header address is 0 or NOT"
+        MAIN_TRAC_ERR("read_wof_header(): WOF header address is 0 or NOT"
                 " 128-byte aligned, WOF is disabled");
         set_clear_wof_disabled( SET, WOF_RC_NO_WOF_HEADER_MASK );
     }
 } // end read_wof_header()
 
-
 /*
  * Function Specification
  *
@@ -680,10 +728,12 @@ bool read_pgpe_header(void)
             MAIN_TRAC_IMP("Shared SRAM Address[0x%08x], PGPE Beacon Address[0x%08x]",
                           G_pgpe_header.shared_sram_addr, G_pgpe_header.beacon_sram_addr);
             MAIN_TRAC_IMP("WOF Tables Main Memory Address[0x%08x], Len[0x%08x], "
-                          "Req Active Quads Address[0x%08x]",
+                          "Req Active Quads Address[0x%08x], "
+                          "WOF State address[0x%08x]",
                           G_pgpe_header.wof_tables_addr,
                           G_pgpe_header.wof_tables_length,
-                          G_pgpe_header.requested_active_quad_sram_addr);
+                          G_pgpe_header.requested_active_quad_sram_addr,
+                          G_pgpe_header.wof_state_address);
             if ((G_pgpe_header.beacon_sram_addr == 0) ||
                 (G_pgpe_header.shared_sram_addr == 0))
             {
diff --git a/src/occ_405/wof/wof.c b/src/occ_405/wof/wof.c
index 5aeaac1..2f4a6c5 100644
--- a/src/occ_405/wof/wof.c
+++ b/src/occ_405/wof/wof.c
@@ -34,6 +34,7 @@
 #include <amec_sys.h>
 #include <occ_sys_config.h>
 #include <wof.h>
+#include <amec_freq.h>
 
 //******************************************************************************
 // External Globals
@@ -372,6 +373,7 @@ void wof_main(void)
 
     // Calculate the AC currents
     calculate_AC_currents();
+
     // Calculate ceff_ratio_vdd and ceff_ratio_vdn
     calculate_ceff_ratio_vdd();
     calculate_ceff_ratio_vdn();
@@ -600,12 +602,6 @@ void send_vfrt_to_pgpe( uint32_t i_vfrt_main_mem_addr )
 
     do
     {
-        static bool print = true;
-        if( print )
-        {
-            //print_data();
-            print = false;
-        }
         // First check if the address is 128-byte aligned. error if not.
         if( i_vfrt_main_mem_addr % 128 )
         {
@@ -718,14 +714,15 @@ void read_shared_sram( void )
     // Read f_clip, v_clip, f_ratio, and v_ratio
     pgpe_wof_state_t l_wofstate;
     l_wofstate.value = in64(g_wof->pgpe_wof_state_addr);
-    //
-    g_wof->f_clip  = l_wofstate.fields.fclip_ps;
+
+    g_wof->f_clip_ps  = l_wofstate.fields.fclip_ps;
+
+    // convert f_clip_ps from Pstate to frequency(mHz)
+    g_wof->f_clip_freq = (proc_pstate2freq(g_wof->f_clip_ps))/1000;
+
     g_wof->v_clip  = l_wofstate.fields.vclip_mv;
-    //TODO RTC 174543: hard code values to 1
-//    g_wof->f_ratio = l_wofstate.fields.fratio;
-//    g_wof->v_ratio = l_wofstate.fields.vratio;
-    g_wof->f_ratio = 1;
-    g_wof->v_ratio = 1;
+    g_wof->f_ratio = l_wofstate.fields.fratio;
+    g_wof->v_ratio = l_wofstate.fields.vratio;
 
     // Get the requested active quad update
     read_req_active_quads();
@@ -826,7 +823,7 @@ void calculate_core_leakage( void )
     // Loop through all Quads and their respective Cores to calculate
     // leakage.
     int quad_idx = 0;       // Quad Index (0-5)
-    uint8_t core_idx = 0;       // Actual core index (0-23)
+    uint8_t core_idx = 0;   // Actual core index (0-23)
     int core_loop_idx = 0;  // On a per quad basis (0-3)
 
     for(quad_idx = 0; quad_idx < MAXIMUM_QUADS; quad_idx++)
@@ -843,9 +840,11 @@ void calculate_core_leakage( void )
                                g_wof->tempnest_sensor,
                                g_wof->v_core_100uV[quad_idx] );
 
+        g_wof->all_cores_off_before = g_wof->all_cores_off_iso;
+
         //Multiply by core leakage percentage
-        g_wof->all_cores_off_iso = g_wof->all_cores_off_iso *
-            g_wof->core_leakage_percent / 100;
+        g_wof->all_cores_off_iso = ( g_wof->all_cores_off_iso *
+            g_wof->core_leakage_percent ) / 100;
 
         // Calculate ALL_GOOD_CACHES_ON_ISO
         g_wof->all_good_caches_on_iso =
@@ -856,6 +855,7 @@ void calculate_core_leakage( void )
                                g_wof->v_core_100uV[quad_idx] ) -
                                g_wof->all_cores_off_iso;
 
+
         // Calculate ALL_CACHES_OFF_ISO
         g_wof->all_caches_off_iso =
         scale_and_interpolate( G_oppb.iddq.ivdd_all_cores_off_caches_off,
@@ -900,6 +900,7 @@ void calculate_core_leakage( void )
 
             // Reset num_cores_off_in_quad before processing current quads cores
             uint8_t num_cores_off_in_quad = 0;
+
             // Loop all cores within current quad
             for(core_loop_idx = 0; core_loop_idx < NUM_CORES_PER_QUAD; core_loop_idx++)
             {
@@ -923,27 +924,26 @@ void calculate_core_leakage( void )
                     // Calculate QUAD_GOOD_CORES_ONLY
                     g_wof->quad_good_cores_only[quad_idx] =
                     scale_and_interpolate
-                   (G_oppb.iddq.ivdd_quad_good_cores_on_good_caches_on[quad_idx],
+                    (G_oppb.iddq.ivdd_quad_good_cores_on_good_caches_on[quad_idx],
                     G_oppb.iddq.avgtemp_quad_good_cores_on[quad_idx],
                     quad_v_idx,
                     g_wof->tempprocthrmc[core_idx],
                     g_wof->v_core_100uV[quad_idx] )
                     -
                     scale_and_interpolate
-                   (G_oppb.iddq.ivdd_all_good_cores_off_good_caches_on,
+                    (G_oppb.iddq.ivdd_all_good_cores_off_good_caches_on,
                     G_oppb.iddq.avgtemp_all_good_cores_off,
                     quad_v_idx,
                     g_wof->tempprocthrmc[core_idx],
-                    g_wof->v_core_100uV[quad_idx])
+                    g_wof->v_core_100uV[quad_idx]) 
                     +
                     (g_wof->all_cores_off_iso * G_oppb.iddq.good_normal_cores[quad_idx])
                      / 24;
 
                     // Calculate quad_on_cores[quad]
                     g_wof->quad_on_cores[quad_idx] =
-                        (g_wof->quad_good_cores_only[quad_idx]*
-                         g_wof->cores_on_per_quad[quad_idx]) /
-                         G_oppb.iddq.good_normal_cores[quad_idx];
+                        g_wof->quad_good_cores_only[quad_idx] /
+                        G_oppb.iddq.good_normal_cores[quad_idx];
 
                     // Add to overall leakage
                     idc_vdd += g_wof->quad_on_cores[quad_idx];
@@ -973,7 +973,6 @@ void calculate_core_leakage( void )
             // After all cores have been processed in current quad, multiply
             // the scaled value by the numer of cores that were off.
 
-
             // Incorporate the cache into leakage calculation.
             // scale from nest to quad
             idc_vdd += scale( l_quad_cache,
@@ -1069,16 +1068,15 @@ uint32_t calculate_effective_capacitance( uint32_t i_iAC,
 void calculate_ceff_ratio_vdn( void )
 {
     // Get ceff_tdp_vdn from OCCPPB
-    // TODO RTC: 174543 - remove hardcoded values once present
-    //g_wof->ceff_tdp_vdn = G_oppb.ceff_tdp_vdn;
-    g_wof->ceff_tdp_vdn = 1;
+    g_wof->ceff_tdp_vdn = G_oppb.ceff_tdp_vdn;
 
     // Calculate ceff_vdn
     // iac_vdn/ (VOLTVDN^1.3 * Fnest)
+    g_wof->c_ratio_vdn_freq = G_nest_frequency_mhz;
     g_wof->ceff_vdn =
                 calculate_effective_capacitance( g_wof->iac_vdn,
                                                  g_wof->voltvdn_sensor,
-                                                 G_nest_frequency_mhz );
+                                                 g_wof->c_ratio_vdn_freq );
 
     // Prevent divide by zero
     if( g_wof->ceff_tdp_vdn == 0 )
@@ -1104,29 +1102,29 @@ void calculate_ceff_ratio_vdn( void )
 void calculate_ceff_ratio_vdd( void )
 {
     // Read iac_tdp_vdd from OCCPstateParmBlock struct
-    // TODO  RTC: 174543 - remove hardcoded values once present
-    // g_wof->iac_tdp_vdd = G_oppb.lac_tdp_vdd_turbo_10ma;
-    g_wof->iac_tdp_vdd = 10;
+    g_wof->iac_tdp_vdd = G_oppb.lac_tdp_vdd_turbo_10ma;
 
     // Get Vturbo and convert to 100uV (mV -> 100uV) = mV*10
     // Multiply by Vratio
-    uint32_t V = (G_oppb.operating_points[TURBO].vdd_mv*10) * g_wof->v_ratio;
+    g_wof->c_ratio_vdd_volt =
+        (G_oppb.operating_points[TURBO].vdd_mv*10) * g_wof->v_ratio;
 
     // Get Fturbo and multiply by Fratio
-    uint32_t F = G_oppb.operating_points[TURBO].frequency_mhz * g_wof->f_ratio;
+    g_wof->c_ratio_vdd_freq =
+        G_oppb.operating_points[TURBO].frequency_mhz * g_wof->f_ratio;
 
     // Calculate ceff_tdp_vdd
     // iac_tdp_vdd / ((Vturbo*Vratio)^1.3 * (Fturbo*Fratio))
     g_wof->ceff_tdp_vdd =
                 calculate_effective_capacitance( g_wof->iac_tdp_vdd,
-                                                 V,
-                                                 F );
+                                                 g_wof->c_ratio_vdd_volt,
+                                                 g_wof->c_ratio_vdd_freq );
     // Calculate ceff_vdd
     // iac_vdd / (Vclip^1.3 * Fclip)
     g_wof->ceff_vdd =
                 calculate_effective_capacitance( g_wof->iac_vdd,
-                                                 g_wof->v_clip,
-                                                 g_wof->f_clip );
+                                                 (g_wof->v_clip*10), // mV->100uV
+                                                 g_wof->f_clip_freq );
 
     // Prevent divide by zero
     if( g_wof->ceff_tdp_vdd == 0 )
@@ -1139,7 +1137,8 @@ void calculate_ceff_ratio_vdd( void )
     }
     else
     {
-        g_wof->ceff_ratio_vdd = g_wof->ceff_vdd / g_wof->ceff_tdp_vdd;
+        // Save ceff_ratio_vdd. Multiply by 10000 to convert to correct granularity.
+        g_wof->ceff_ratio_vdd = (g_wof->ceff_vdd*10000) / g_wof->ceff_tdp_vdd;
     }
 }
 
@@ -1165,7 +1164,7 @@ inline void calculate_AC_currents( void )
  *
  * Return: Returns TRUE if the core is powered on, FALSE otherwise
  */
-inline bool core_powered_on(uint8_t i_core_num)
+inline uint32_t core_powered_on(uint8_t i_core_num)
 {
     return ( g_wof->core_pwr_on & (0x80000000 >> i_core_num));
 }
@@ -1188,7 +1187,7 @@ uint8_t num_cores_on_in_quad( uint8_t i_quad_num )
     uint8_t num_powered_on_cores = 0;
     for(i = start_index; i < (start_index + NUM_CORES_PER_QUAD); i++)
     {
-        if( core_powered_on(i) )
+        if( core_powered_on(i) > 0 )
         {
             num_powered_on_cores++;
         }
@@ -1360,6 +1359,12 @@ void set_clear_wof_disabled( uint8_t i_action,
                 {
                     // Disable WOF
                     disable_wof();
+                    // Set the the frequency ranges
+                    l_errl = amec_set_freq_range(CURRENT_MODE());
+                    if(l_errl)
+                    {
+                        commitErrl( &l_errl);
+                    }
                 }
             }
         }
@@ -1393,6 +1398,13 @@ void set_clear_wof_disabled( uint8_t i_action,
 
                 // commit the error log
                 commitErrl( &l_errl );
+
+                // Set the the frequency ranges
+                l_errl = amec_set_freq_range(CURRENT_MODE());
+                if(l_errl)
+                {
+                    commitErrl( &l_errl);
+                }
             }
         }
         else
@@ -1699,8 +1711,8 @@ void send_initial_vfrt_to_pgpe( void )
 void read_req_active_quads( void )
 {
     uint64_t l_doubleword = in64(g_wof->req_active_quads_addr);
-    memcpy(&g_wof->req_active_quad_update, &l_doubleword, sizeof(uint8_t));
 
+    g_wof->req_active_quad_update = (uint8_t)(0x00000000000000ff & l_doubleword);
     // Count the number of on bits in req_active_quad_update
     int i = 0;
     uint8_t on_bits = 0;
@@ -1795,7 +1807,7 @@ uint32_t scale( uint16_t i_current,
  * Param[in]: i_base_temp - The base temperature used to scale the current
  * Param[in]: i_voltage - The associated voltage.
  *
- * Return: The approximated scaled current.
+ * Return: The approximated scaled current in 10mA.
  */
 uint32_t scale_and_interpolate( uint16_t * i_leak_arr,
                        uint8_t * i_avgtemp_arr,
@@ -1812,16 +1824,17 @@ uint32_t scale_and_interpolate( uint16_t * i_leak_arr,
     // Scale the currents based on the delta temperature
     uint32_t scaled_lower_leak = scale( i_leak_arr[i_idx],
                                         lower_delta );
-    uint32_t scaled_upper_leak = scale( i_leak_arr[i_idx],
+    uint32_t scaled_upper_leak = scale( i_leak_arr[i_idx+1],
                                         upper_delta );
 
     // Approximate current between the scaled currents using linear
     // interpolation and return the result
+    // Divide by 10 to get 10mA units
     return interpolate_linear( (int32_t) i_voltage,
                                (int32_t) G_iddq_voltages[i_idx],
                                (int32_t) G_iddq_voltages[i_idx+1],
                                (int32_t) scaled_lower_leak,
-                               (int32_t) scaled_upper_leak );
+                               (int32_t) scaled_upper_leak ) / 10;
 
 }
 
@@ -1869,8 +1882,139 @@ void print_data( void )
     INTR_TRAC_INFO("fratio_size:        %d",g_wof->fratio_size);
     INTR_TRAC_INFO("fratio:             %d",g_wof->f_ratio);
     INTR_TRAC_INFO("vratio:             %d",g_wof->v_ratio);
-    INTR_TRAC_INFO("fclip:              %d",g_wof->f_clip);
+    INTR_TRAC_INFO("fclip_ps:           %x",g_wof->f_clip_ps);
+    INTR_TRAC_INFO("fclip_freq:         %d",g_wof->f_clip_freq);
     INTR_TRAC_INFO("vclip:              %d",g_wof->v_clip);
     INTR_TRAC_INFO("req_active_quads:   %x", g_wof->req_active_quad_update);
     INTR_TRAC_INFO("vfrt_mm_offset:     0x%08x", g_wof->vfrt_mm_offset);
 }
+
+/**
+ * print_oppb
+ *
+ * Description: For internal use only. Traces the contents of G_oppb that
+ *              are used in this file.
+ */
+void print_oppb( void )
+{
+    CMDH_TRAC_INFO("Printing Contents of OCCPstateParmBlock");
+    CMDH_TRAC_INFO("");
+
+    int i;
+    for(i = 0; i < VPD_PV_POINTS; i++)
+    {
+        CMDH_TRAC_INFO("operating_points[%d] = %d",
+                       i,
+                       G_oppb.operating_points[i] );
+    }
+    CMDH_TRAC_INFO("G_oppb.IddqTable");
+    CMDH_TRAC_INFO("");
+    CMDH_TRAC_INFO("iddq_version = %x", G_oppb.iddq.iddq_version);
+    CMDH_TRAC_INFO("good_quads_per_sort = %d", G_oppb.iddq.good_quads_per_sort);
+    CMDH_TRAC_INFO("good_normal_cores_per_sort = %d",
+           G_oppb.iddq.good_normal_cores_per_sort);
+    CMDH_TRAC_INFO("good_caches_per_sort = %d", G_oppb.iddq.good_caches_per_sort);
+
+    for( i = 0; i < MAXIMUM_QUADS; i++)
+    {
+        CMDH_TRAC_INFO("good_normal_cores[%d] = %d",
+                        i,
+                        G_oppb.iddq.good_normal_cores[i] );
+    }
+    for( i = 0; i < MAXIMUM_QUADS; i++)
+    {
+        CMDH_TRAC_INFO("good_caches[%d] = %d",
+                        i,
+                        G_oppb.iddq.good_caches[i] );
+    }
+    CMDH_TRAC_INFO("rdp_to_tdp_scale_factor = %d", G_oppb.iddq.rdp_to_tdp_scale_factor);
+    CMDH_TRAC_INFO("wof_iddq_margin_factor = %d", G_oppb.iddq.wof_iddq_margin_factor);
+    CMDH_TRAC_INFO("vdd_temp_scale_factor = %d",
+            G_oppb.iddq.vdd_temperature_scale_factor);
+    CMDH_TRAC_INFO("vdn_temp_scale_factor = %d",
+            G_oppb.iddq.vdn_temperature_scale_factor);
+    for( i = 0; i < IDDQ_MEASUREMENTS; i++)
+    {
+        CMDH_TRAC_INFO("ivdd_all_good_cores_on_caches_on[%d] = %d",
+                        i,
+                        G_oppb.iddq.ivdd_all_good_cores_on_caches_on[i]);
+    }
+    for( i = 0; i < IDDQ_MEASUREMENTS; i++)
+    {
+        CMDH_TRAC_INFO("ivdd_all_cores_off_caches_off[%d] = %d",
+                        i,
+                        G_oppb.iddq.ivdd_all_cores_off_caches_off[i]);
+    }
+    for( i = 0; i < IDDQ_MEASUREMENTS; i++)
+    {
+        CMDH_TRAC_INFO("ivdd_all_good_cores_off_good_caches_on[%d] = %d",
+                        i,
+                        G_oppb.iddq.ivdd_all_good_cores_off_good_caches_on[i]);
+    }
+    int j;
+    for( i = 0; i < MAXIMUM_QUADS; i++ )
+    {
+        for( j = 0; j < IDDQ_MEASUREMENTS; j++)
+        {
+            CMDH_TRAC_INFO("ivdd_quad_good_cores_on_good_caches_on[%d][%d] = %d",
+            i,
+            j,
+            G_oppb.iddq.ivdd_quad_good_cores_on_good_caches_on[i][j]);
+        }
+    }
+    for( i = 0; i < IDDQ_MEASUREMENTS; i++)
+    {
+        CMDH_TRAC_INFO("ivdn[%d] = %d",
+                        i,
+                        G_oppb.iddq.ivdn[i]);
+    }
+    for( i = 0; i < IDDQ_MEASUREMENTS; i++)
+    {
+        CMDH_TRAC_INFO("avgtemp_all_good_cores_on[%d] = %d",
+                        i,
+                        G_oppb.iddq.avgtemp_all_good_cores_on[i]);
+    }
+    for( i = 0; i < IDDQ_MEASUREMENTS; i++)
+    {
+        CMDH_TRAC_INFO("avgtemp_all_cores_off_caches_off[%d] = %d",
+                        i,
+                        G_oppb.iddq.avgtemp_all_cores_off_caches_off[i]);
+    }
+    for( i = 0; i < IDDQ_MEASUREMENTS; i++)
+    {
+        CMDH_TRAC_INFO("avgtemp_all_good_cores_off[%d] = %d",
+                        i,
+                        G_oppb.iddq.avgtemp_all_good_cores_off[i] );
+    }
+    for( i = 0; i < MAXIMUM_QUADS; i++ )
+    {
+        for( j = 0; j < IDDQ_MEASUREMENTS; j++)
+        {
+            CMDH_TRAC_INFO("avgtemp_quad_good_cores_on[%d][%d] = %d",
+            i,
+            j,
+            G_oppb.iddq.avgtemp_quad_good_cores_on[i][j]);
+        }
+    }
+    for( i = 0; i < IDDQ_MEASUREMENTS; i++)
+    {
+        CMDH_TRAC_INFO("avgtemp_vdn[%d] = %d",
+                        i,
+                        G_oppb.iddq.avgtemp_vdn[i]);
+    }
+    CMDH_TRAC_INFO("");
+    CMDH_TRAC_INFO("freq_min_khz = %d", G_oppb.frequency_min_khz);
+    CMDH_TRAC_INFO("freq_max_khz = %d", G_oppb.frequency_max_khz);
+    CMDH_TRAC_INFO("freq_step_khz = %d", G_oppb.frequency_step_khz);
+    CMDH_TRAC_INFO("pstate_min = %d", G_oppb.pstate_min);
+    CMDH_TRAC_INFO("nest_freq_mhz = %d", G_oppb.nest_frequency_mhz);
+    CMDH_TRAC_INFO("nest_leakage_percent = %d", G_oppb.nest_leakage_percent);
+    CMDH_TRAC_INFO("ceff_tdp_vdn = %d", G_oppb.ceff_tdp_vdn);
+    CMDH_TRAC_INFO("lac_tdp_vdd_turbo_10ma = %d", G_oppb.lac_tdp_vdd_turbo_10ma);
+    CMDH_TRAC_INFO("lac_tdp_vdd_nominal_10ma = %d", G_oppb.lac_tdp_vdd_nominal_10ma);
+    CMDH_TRAC_INFO("vdd_sysparm.loadline = %d", G_oppb.vdd_sysparm.loadline_uohm);
+    CMDH_TRAC_INFO("vdd_sysparm.distloss = %d", G_oppb.vdd_sysparm.distloss_uohm);
+    CMDH_TRAC_INFO("vdn_sysparm.loadline = %d", G_oppb.vdn_sysparm.loadline_uohm);
+    CMDH_TRAC_INFO("vdn_sysparm.distloss = %d", G_oppb.vdn_sysparm.distloss_uohm);
+    CMDH_TRAC_INFO("End OCCPstateParmBlock");
+}
diff --git a/src/occ_405/wof/wof.h b/src/occ_405/wof/wof.h
index 481f88e..91ea563 100644
--- a/src/occ_405/wof/wof.h
+++ b/src/occ_405/wof/wof.h
@@ -206,13 +206,15 @@ typedef struct
     // Contains iac_tdp_vdd(@turbo) read from the pstate parameter block
     uint32_t iac_tdp_vdd;
     // Contains Vratio, read from OCC-PGPE shared SRAM
-    uint32_t v_ratio;
+    uint16_t v_ratio;
     // Contains Fratio, read from OCC-PGPE shared SRAM
-    uint32_t f_ratio;
+    uint16_t f_ratio;
     // Contains Vclip, read from OCC-PGPE shared SRAM
-    uint32_t v_clip;
-    // Contains Fclip, read from OCC-PGPE shared SRAM
-    uint32_t f_clip;
+    uint16_t v_clip;
+    // Contains Fclip_ps pstate, read from OCC-PGPE shared SRAM
+    uint8_t f_clip_ps;
+    // Contains the actual frequency translated from f_clip_ps;
+    uint32_t f_clip_freq;
     // Contains the calculated effective capacitance for tdp_vdd
     uint32_t ceff_tdp_vdd;
     // Contains the calculated effective capacitance for vdd
@@ -287,6 +289,42 @@ typedef struct
     uint32_t vfrt_mm_offset;
     // Return code returned from a bad VFRT request
     uint8_t wof_vfrt_req_rc;
+    // Voltage used in ceff_ratio_vdd calc
+    uint32_t c_ratio_vdd_volt;
+    // Frequency used in ceff_ratio_vdd calc
+    uint32_t c_ratio_vdd_freq;
+    // Voltage used in ceff_ratio_vdn calc
+    uint32_t c_ratio_vdn_volt;
+    // Frequency used in ceff_ratio_vdn calc
+    uint32_t c_ratio_vdn_freq;
+
+    uint32_t all_cores_off_before;
+    //OPPB variables
+    uint8_t good_quads_per_sort;
+    uint8_t good_normal_cores_per_sort;
+    uint8_t good_caches_per_sort;
+    uint8_t good_normal_cores[MAXIMUM_QUADS];
+    uint8_t good_caches[MAXIMUM_QUADS];
+    uint16_t allGoodCoresCachesOn[CORE_IDDQ_MEASUREMENTS];
+    uint16_t allCoresCachesOff[CORE_IDDQ_MEASUREMENTS];
+    uint16_t coresOffCachesOn[CORE_IDDQ_MEASUREMENTS];
+    uint16_t quad1CoresCachesOn[CORE_IDDQ_MEASUREMENTS];
+    uint16_t quad2CoresCachesOn[CORE_IDDQ_MEASUREMENTS];
+    uint16_t quad3CoresCachesOn[CORE_IDDQ_MEASUREMENTS];
+    uint16_t quad4CoresCachesOn[CORE_IDDQ_MEASUREMENTS];
+    uint16_t quad5CoresCachesOn[CORE_IDDQ_MEASUREMENTS];
+    uint16_t quad6CoresCachesOn[CORE_IDDQ_MEASUREMENTS];
+    uint16_t ivdn[CORE_IDDQ_MEASUREMENTS];
+    uint8_t allCoresCachesOnT[CORE_IDDQ_MEASUREMENTS];
+    uint8_t allCoresCachesOffT[CORE_IDDQ_MEASUREMENTS];
+    uint8_t coresOffCachesOnT[CORE_IDDQ_MEASUREMENTS];
+    uint8_t quad1CoresCachesOnT[CORE_IDDQ_MEASUREMENTS];
+    uint8_t quad2CoresCachesOnT[CORE_IDDQ_MEASUREMENTS];
+    uint8_t quad3CoresCachesOnT[CORE_IDDQ_MEASUREMENTS];
+    uint8_t quad4CoresCachesOnT[CORE_IDDQ_MEASUREMENTS];
+    uint8_t quad5CoresCachesOnT[CORE_IDDQ_MEASUREMENTS];
+    uint8_t quad6CoresCachesOnT[CORE_IDDQ_MEASUREMENTS];
+    uint8_t avgtemp_vdn[CORE_IDDQ_MEASUREMENTS];
 } amec_wof_t;
 
 typedef struct __attribute__ ((packed))
@@ -333,7 +371,7 @@ void calculate_ceff_ratio_vdd( void );
 
 inline void calculate_AC_currents( void );
 
-inline bool core_powered_on( uint8_t i_core_num );
+inline uint32_t  core_powered_on( uint8_t i_core_num );
 
 uint8_t num_cores_on_in_quad( uint8_t i_quad_num );
 
@@ -376,4 +414,6 @@ uint32_t scale_and_interpolate( uint16_t * i_leak_arr,
                                 uint16_t i_voltage );
 
 void print_data(void);
+
+void print_oppb(void);
 #endif