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authorWilliam Bryan <wilbryan@us.ibm.com>2015-08-21 15:17:53 -0500
committerWilliam A. Bryan <wilbryan@us.ibm.com>2015-08-26 16:45:54 -0500
commit0f26c7e693a059bc77529c03e2bec44486131e4a (patch)
tree9d2502293f3557eaea41bede138597a5f86f8736 /src/ssx
parentd4b74d20664271d6736008d87591a5fcbf815ded (diff)
downloadtalos-occ-0f26c7e693a059bc77529c03e2bec44486131e4a.tar.gz
talos-occ-0f26c7e693a059bc77529c03e2bec44486131e4a.zip
Enabled FFDC and Simics
Also included: -- Some more cmdh files into the build -- Workaround for OCB Timer divider register in Simics -- Workaround to start APSS tasks until DCOM is back RTC: 133819 Change-Id: Ie19c2a544f64c40126c2bc4a0af6fabfe6430d21 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19998 Reviewed-by: Wael Elessawy <welessa@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
Diffstat (limited to 'src/ssx')
-rw-r--r--src/ssx/occhw/occhw_ocb.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/src/ssx/occhw/occhw_ocb.c b/src/ssx/occhw/occhw_ocb.c
index 237c333..6188abb 100644
--- a/src/ssx/occhw/occhw_ocb.c
+++ b/src/ssx/occhw/occhw_ocb.c
@@ -150,13 +150,15 @@ ocb_timer_setup(int timer,
do
{
//Read Hang Pulse Register 2 to get the log base 2 of the ocb clock divider -- grm
- rc = getscom(TPC_HPR2, &l_hpr2.value);
+// TEMP : Need Simics to model this
+// rc = getscom(TPC_HPR2, &l_hpr2.value);
if(rc)
{
break;
}
-
- g_ocb_timer_divider = 1 << l_hpr2.fields.hang_pulse_reg;
+//David Du: l_hpr2.fields.hang_pulse_reg is typically 9
+// g_ocb_timer_divider = 1 << l_hpr2.fields.hang_pulse_reg;
+ g_ocb_timer_divider = 1 << 9;
//printk("ocb_timer_setup(%d, %d, %d, %p, %p, %d)\n",
// timer, auto_reload, timeout_ns,
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