diff options
| author | mbroyles <mbroyles@us.ibm.com> | 2015-08-03 14:02:47 -0500 |
|---|---|---|
| committer | William A. Bryan <wilbryan@us.ibm.com> | 2015-08-03 15:24:17 -0500 |
| commit | adade8c8ef30ed519322674c762d95663009c5d4 (patch) | |
| tree | b1c773b88ec7c896c0185482c869d841b5322d76 /src/ppe/hwp/perv | |
| parent | e304743c292e7161db5e2412d18a28c1b6f37a75 (diff) | |
| download | talos-occ-adade8c8ef30ed519322674c762d95663009c5d4.tar.gz talos-occ-adade8c8ef30ed519322674c762d95663009c5d4.zip | |
new ppe dir
Change-Id: I43d54c18ac4f3bce90a4f26510e443a55c446bba
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19509
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Tested-by: William A. Bryan <wilbryan@us.ibm.com>
Diffstat (limited to 'src/ppe/hwp/perv')
60 files changed, 3510 insertions, 0 deletions
diff --git a/src/ppe/hwp/perv/.empty b/src/ppe/hwp/perv/.empty new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/src/ppe/hwp/perv/.empty diff --git a/src/ppe/hwp/perv/Makefile b/src/ppe/hwp/perv/Makefile new file mode 100644 index 0000000..68a803f --- /dev/null +++ b/src/ppe/hwp/perv/Makefile @@ -0,0 +1,54 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: src/ppe/hwp/perv/Makefile $ +# +# OpenPOWER OnChipController Project +# +# Contributors Listed Below - COPYRIGHT 2015 +# [+] International Business Machines Corp. +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG + +# This Makefile compiles all of the core hardware procedure code. See the +# "pervfiles.mk" file in this directory. + +#all generated files from this makefile will end up in obj/perv +export SUB_OBJDIR = /perv + +include img_defs.mk +include pervfiles.mk + + +OBJS := $(addprefix $(OBJDIR)/, $(PERV_OBJECTS)) + +libperv.a: perv + $(AR) crs $(OBJDIR)/libperv.a $(OBJDIR)/*.o + +.PHONY: clean perv +perv: $(OBJS) + +$(OBJS) $(OBJS:.o=.d): | $(OBJDIR) + +$(OBJDIR): + mkdir -p $(OBJDIR) + +clean: + rm -fr $(OBJDIR) + +ifneq ($(MAKECMDGOALS),clean) +include $(OBJS:.o=.d) +endif diff --git a/src/ppe/hwp/perv/p9_sbe_attr_setup.C b/src/ppe/hwp/perv/p9_sbe_attr_setup.C new file mode 100644 index 0000000..cc08372 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_attr_setup.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_attr_setup.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_attr_setup.C +/// +/// @brief If and only if scratch registers are non-zero, HWP will read the contents of the scratch registers and call FAPI2 APIs to set the values into the corresponding platform ATTR +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_sbe_attr_setup.H" +fapi2::ReturnCode p9_sbe_attr_setup(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_sbe_attr_setup: Entering ..."); + + FAPI_DBG("p9_sbe_attr_setup: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_sbe_attr_setup.H b/src/ppe/hwp/perv/p9_sbe_attr_setup.H new file mode 100644 index 0000000..d392969 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_attr_setup.H @@ -0,0 +1,61 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_attr_setup.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_attr_setup.H +/// +/// @brief If and only if scratch registers are non-zero, HWP will read the contents of the scratch registers and call FAPI2 APIs to set the values into the corresponding platform ATTR +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SBE_ATTR_SETUP_H_ +#define _P9_SBE_ATTR_SETUP_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_sbe_attr_setup_FP_t)(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief --Setting All Mailbox scratch register 1, 2, 3, 4, 5, 6, 7, 8 +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_sbe_attr_setup(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_sbe_check_master.C b/src/ppe/hwp/perv/p9_sbe_check_master.C new file mode 100644 index 0000000..b348bdf --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_check_master.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_check_master.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_check_master.C +/// +/// @brief Deremine if this is master SBE -- External FSI/GP bitIf master continue, else enable runtime chipOps +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_sbe_check_master.H" +fapi2::ReturnCode p9_sbe_check_master(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_sbe_check_master: Entering ..."); + + FAPI_DBG("p9_sbe_check_master: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_sbe_check_master.H b/src/ppe/hwp/perv/p9_sbe_check_master.H new file mode 100644 index 0000000..04a1748 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_check_master.H @@ -0,0 +1,61 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_check_master.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_check_master.H +/// +/// @brief Deremine if this is master SBE -- External FSI/GP bitIf master continue, else enable runtime chipOps +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SBE_CHECK_MASTER_H_ +#define _P9_SBE_CHECK_MASTER_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_sbe_check_master_FP_t)(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief If master continue, else enable runtime chipOps +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_sbe_check_master(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_sbe_enable_seeprom.C b/src/ppe/hwp/perv/p9_sbe_enable_seeprom.C new file mode 100644 index 0000000..eab78e2 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_enable_seeprom.C @@ -0,0 +1,53 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_enable_seeprom.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_enable_seeprom.C +/// +/// @brief SBE enable SEEPROM (runs from OTPROM) +/// +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_sbe_enable_seeprom.H" +fapi2::ReturnCode p9_sbe_enable_seeprom(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_sbe_enable_seeprom: Entering ..."); + + FAPI_DBG("p9_sbe_enable_seeprom: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_sbe_enable_seeprom.H b/src/ppe/hwp/perv/p9_sbe_enable_seeprom.H new file mode 100644 index 0000000..e74e114 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_enable_seeprom.H @@ -0,0 +1,67 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_enable_seeprom.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_enable_seeprom.H +/// +/// @brief SBE enable SEEPROM (runs from OTPROM) +/// +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SBE_ENABLE_SEEPROM_H_ +#define _P9_SBE_ENABLE_SEEPROM_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_sbe_enable_seeprom_FP_t)( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief -- Check SBE Vital Register for selected SEEPROM image +/// -- Update SBE FI2C_E0_PARAM register +/// -- Check for valid SEEPROM image +/// -- Branch to SEEPROM +/// +/// +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_sbe_enable_seeprom(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_sbe_lpc_init.C b/src/ppe/hwp/perv/p9_sbe_lpc_init.C new file mode 100644 index 0000000..533bad3 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_lpc_init.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_lpc_init.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_lpc_init.C +/// +/// @brief Requirement from the bootloader is that it only uses MMIOs to LPC master, not Xscom +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_sbe_lpc_init.H" +fapi2::ReturnCode p9_sbe_lpc_init(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_sbe_lpc_init: Entering ..."); + + FAPI_DBG("p9_sbe_lpc_init: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_sbe_lpc_init.H b/src/ppe/hwp/perv/p9_sbe_lpc_init.H new file mode 100644 index 0000000..859f7bf --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_lpc_init.H @@ -0,0 +1,65 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_lpc_init.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_lpc_init.H +/// +/// @brief Requirement from the bootloader is that it only uses MMIOs to LPC master, not Xscom +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SBE_LPC_INIT_H_ +#define _P9_SBE_LPC_INIT_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_sbe_lpc_init_FP_t)(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief PerfoPerform scoms to setup LPC bus +/// -- Move the LPC clock to external input +/// Pull the LPC unit out of reset +/// Set LPC BAR -- hardcoded like Xscom BAR +/// +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_sbe_lpc_init(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_sbe_nest_arrayinit.C b/src/ppe/hwp/perv/p9_sbe_nest_arrayinit.C new file mode 100644 index 0000000..141f29a --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_nest_arrayinit.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_nest_arrayinit.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_nest_arrayinit.C +/// +/// @brief array init for nest chiplet arrays +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_sbe_nest_arrayinit.H" +fapi2::ReturnCode p9_sbe_nest_arrayinit(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_sbe_nest_arrayinit: Entering ..."); + + FAPI_DBG("p9_sbe_nest_arrayinit: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_sbe_nest_arrayinit.H b/src/ppe/hwp/perv/p9_sbe_nest_arrayinit.H new file mode 100644 index 0000000..33deab2 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_nest_arrayinit.H @@ -0,0 +1,62 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_nest_arrayinit.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_nest_arrayinit.H +/// +/// @brief array init for nest chiplet arrays +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SBE_NEST_ARRAYINIT_H_ +#define _P9_SBE_NEST_ARRAYINIT_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_sbe_nest_arrayinit_FP_t)( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief --Run arrayinit on all enabled chiplets +/// --Scan flush 0 to all rings except GPTR, Time, Repair on all enabled chiplets +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_sbe_nest_arrayinit(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_sbe_nest_chiplet_init.C b/src/ppe/hwp/perv/p9_sbe_nest_chiplet_init.C new file mode 100644 index 0000000..d60414b --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_nest_chiplet_init.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_nest_chiplet_init.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_nest_chiplet_init.C +/// +/// @brief proc sbe nest chiplet init +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_sbe_nest_chiplet_init.H" +fapi2::ReturnCode p9_sbe_nest_chiplet_init(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_sbe_nest_chiplet_init: Entering ..."); + + FAPI_DBG("p9_sbe_nest_chiplet_init: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_sbe_nest_chiplet_init.H b/src/ppe/hwp/perv/p9_sbe_nest_chiplet_init.H new file mode 100644 index 0000000..795e3a6 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_nest_chiplet_init.H @@ -0,0 +1,61 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_nest_chiplet_init.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_nest_chiplet_init.H +/// +/// @brief proc sbe nest chiplet init +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SBE_NEST_CHIPLET_INIT_H_ +#define _P9_SBE_NEST_CHIPLET_INIT_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_sbe_nest_chiplet_init_FP_t)( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief --Scan 0 all rings (except time, repair, gptr) on all enabled chiplets +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_sbe_nest_chiplet_init(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_sbe_nest_chiplet_reset.C b/src/ppe/hwp/perv/p9_sbe_nest_chiplet_reset.C new file mode 100644 index 0000000..4a8626d --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_nest_chiplet_reset.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_nest_chiplet_reset.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_nest_chiplet_reset.C +/// +/// @brief proc nest chiplet reset +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_sbe_nest_chiplet_reset.H" +fapi2::ReturnCode p9_sbe_nest_chiplet_reset(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_sbe_nest_chiplet_reset: Entering ..."); + + FAPI_DBG("p9_sbe_nest_chiplet_reset: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_sbe_nest_chiplet_reset.H b/src/ppe/hwp/perv/p9_sbe_nest_chiplet_reset.H new file mode 100644 index 0000000..e9922eb --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_nest_chiplet_reset.H @@ -0,0 +1,61 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_nest_chiplet_reset.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_nest_chiplet_reset.H +/// +/// @brief proc nest chiplet reset +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SBE_NEST_CHIPLET_RESET_H_ +#define _P9_SBE_NEST_CHIPLET_RESET_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_sbe_nest_chiplet_reset_FP_t)( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief Reset Nest chiplet +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_sbe_nest_chiplet_reset(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_sbe_nest_gptr_time_repr_initf.C b/src/ppe/hwp/perv/p9_sbe_nest_gptr_time_repr_initf.C new file mode 100644 index 0000000..c06d950 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_nest_gptr_time_repr_initf.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_nest_gptr_time_repr_initf.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_nest_gptr_time_repr_initf.C +/// +/// @brief proc sbe nest gptr time repr initf +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_sbe_nest_gptr_time_repr_initf.H" +fapi2::ReturnCode p9_sbe_nest_gptr_time_repr_initf(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_sbe_nest_gptr_time_repr_initf: Entering ..."); + + FAPI_DBG("p9_sbe_nest_gptr_time_repr_initf: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_sbe_nest_gptr_time_repr_initf.H b/src/ppe/hwp/perv/p9_sbe_nest_gptr_time_repr_initf.H new file mode 100644 index 0000000..b37145b --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_nest_gptr_time_repr_initf.H @@ -0,0 +1,61 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_nest_gptr_time_repr_initf.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_nest_gptr_time_repr_initf.H +/// +/// @brief proc sbe nest gptr time repr initf +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SBE_NEST_GPTR_TIME_REPR_INITF_H_ +#define _P9_SBE_NEST_GPTR_TIME_REPR_INITF_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_sbe_nest_gptr_time_repr_initf_FP_t)( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief Scan 0 all rings on all enabled chiplets (except for TP) +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_sbe_nest_gptr_time_repr_initf(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_sbe_nest_initf.C b/src/ppe/hwp/perv/p9_sbe_nest_initf.C new file mode 100644 index 0000000..c8bd4a7 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_nest_initf.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_nest_initf.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_nest_initf.C +/// +/// @brief proc_sbe_nest_initf +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_sbe_nest_initf.H" +fapi2::ReturnCode p9_sbe_nest_initf(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_sbe_nest_initf: Entering ..."); + + FAPI_DBG("p9_sbe_nest_initf: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_sbe_nest_initf.H b/src/ppe/hwp/perv/p9_sbe_nest_initf.H new file mode 100644 index 0000000..2add6ac --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_nest_initf.H @@ -0,0 +1,61 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_nest_initf.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_nest_initf.H +/// +/// @brief proc_sbe_nest_initf +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SBE_NEST_INITF_H_ +#define _P9_SBE_NEST_INITF_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_sbe_nest_initf_FP_t)(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief apply init file +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_sbe_nest_initf(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_sbe_nest_startclocks.C b/src/ppe/hwp/perv/p9_sbe_nest_startclocks.C new file mode 100644 index 0000000..d44835d --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_nest_startclocks.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_nest_startclocks.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_nest_startclocks.C +/// +/// @brief start clocks for nest chiplets +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_sbe_nest_startclocks.H" +fapi2::ReturnCode p9_sbe_nest_startclocks(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_sbe_nest_startclocks: Entering ..."); + + FAPI_DBG("p9_sbe_nest_startclocks: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_sbe_nest_startclocks.H b/src/ppe/hwp/perv/p9_sbe_nest_startclocks.H new file mode 100644 index 0000000..e4644c9 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_nest_startclocks.H @@ -0,0 +1,68 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_nest_startclocks.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_nest_startclocks.H +/// +/// @brief start clocks for nest chiplets +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SBE_NEST_STARTCLOCKS_H_ +#define _P9_SBE_NEST_STARTCLOCKS_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_sbe_nest_startclocks_FP_t)( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief --drop vital fence +/// --reset abstclk muxsel and syncclk muxsel +/// --Module align chiplets +/// --Module clock start stop +/// --Check clock stat SL, NSL , ARY +/// --drop chiplet fence +/// --check checkstop register +/// --clear flush inhibit to go into flush mode +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_sbe_nest_startclocks(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_sbe_npll_initf.C b/src/ppe/hwp/perv/p9_sbe_npll_initf.C new file mode 100644 index 0000000..d40f141 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_npll_initf.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_npll_initf.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_npll_initf.C +/// +/// @brief apply initfile for level 0 & 1 PLLs +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_sbe_npll_initf.H" +fapi2::ReturnCode p9_sbe_npll_initf(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_sbe_npll_initf: Entering ..."); + + FAPI_DBG("p9_sbe_npll_initf: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_sbe_npll_initf.H b/src/ppe/hwp/perv/p9_sbe_npll_initf.H new file mode 100644 index 0000000..8445de1 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_npll_initf.H @@ -0,0 +1,64 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_npll_initf.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_npll_initf.H +/// +/// @brief apply initfile for level 0 & 1 PLLs +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SBE_NPLL_INITF_H_ +#define _P9_SBE_NPLL_INITF_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_sbe_npll_initf_FP_t)(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief --run scan0 module (scan region = PLL, scan_types = GPTR) +/// --run scan0 module (scan region = PLL, scan_types = BNDY/FUNC) +/// --Scan initialize PLL BNDY chain (chiplet = PERV, scan ring = PLL, scan type = BNDY) +/// +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_sbe_npll_initf(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_sbe_npll_setup.C b/src/ppe/hwp/perv/p9_sbe_npll_setup.C new file mode 100644 index 0000000..1a66606 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_npll_setup.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_npll_setup.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_npll_setup.C +/// +/// @brief scan initialize level 0 & 1 PLLs +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_sbe_npll_setup.H" +fapi2::ReturnCode p9_sbe_npll_setup(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_sbe_npll_setup: Entering ..."); + + FAPI_DBG("p9_sbe_npll_setup: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_sbe_npll_setup.H b/src/ppe/hwp/perv/p9_sbe_npll_setup.H new file mode 100644 index 0000000..bcc5f01 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_npll_setup.H @@ -0,0 +1,73 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_npll_setup.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_npll_setup.H +/// +/// @brief scan initialize level 0 & 1 PLLs +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SBE_NPLL_SETUP_H_ +#define _P9_SBE_NPLL_SETUP_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_sbe_npll_setup_FP_t)(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief --Release PLL test enable for SS, Filt & NEST PLLs +/// --Release SS PLL reset0 +/// --check SS PLL lock +/// --Release SS PLL bypass0 +/// --Release Filter PLL reset1 +/// --check PLL lock for Filter PLLs +/// --Release Filter PLL bypass signals +/// --Switch MC meshs to Nest mesh +/// --Release test_pll_bypass2 +/// --Release Tank PLL reset2 +/// --check Nest PLL lock +/// --Release Tank PLL bypass2 +/// +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_sbe_npll_setup(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_sbe_select_ex.C b/src/ppe/hwp/perv/p9_sbe_select_ex.C new file mode 100644 index 0000000..1976840 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_select_ex.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_select_ex.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_select_ex.C +/// +/// @brief proc sbe select ex +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_sbe_select_ex.H" +fapi2::ReturnCode p9_sbe_select_ex(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_sbe_select_ex: Entering ..."); + + FAPI_DBG("p9_sbe_select_ex: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_sbe_select_ex.H b/src/ppe/hwp/perv/p9_sbe_select_ex.H new file mode 100644 index 0000000..a62d1dd --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_select_ex.H @@ -0,0 +1,66 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_select_ex.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_select_ex.H +/// +/// @brief proc sbe select ex +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SBE_SELECT_EX_H_ +#define _P9_SBE_SELECT_EX_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_sbe_select_ex_FP_t)(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief ATTR will indicate single core or all +/// Use the partial good info and ATTR to find the first good core +/// For selected master EQ and Core +/// -- Turn on chiplet enable +/// Write selected EQ/Core mask into OCC complex +/// -- This is the "master record " of the enabled cores/quad in the system +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_sbe_select_ex(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_sbe_tp_arrayinit.C b/src/ppe/hwp/perv/p9_sbe_tp_arrayinit.C new file mode 100644 index 0000000..0371235 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_tp_arrayinit.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_tp_arrayinit.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_tp_arrayinit.C +/// +/// @brief SBE PRV Array Init Procedure +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_sbe_tp_arrayinit.H" +fapi2::ReturnCode p9_sbe_tp_arrayinit(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_sbe_tp_arrayinit: Entering ..."); + + FAPI_DBG("p9_sbe_tp_arrayinit: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_sbe_tp_arrayinit.H b/src/ppe/hwp/perv/p9_sbe_tp_arrayinit.H new file mode 100644 index 0000000..5ece4e4 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_tp_arrayinit.H @@ -0,0 +1,63 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_tp_arrayinit.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_tp_arrayinit.H +/// +/// @brief SBE PRV Array Init Procedure +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SBE_TP_ARRAYINIT_H_ +#define _P9_SBE_TP_ARRAYINIT_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_sbe_tp_arrayinit_FP_t)(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief -- Array Init for PRV Cplt +/// -- Scan0 of PRV Chiplet (except PIB/PCB) +/// +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_sbe_tp_arrayinit(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_sbe_tp_chiplet_init1.C b/src/ppe/hwp/perv/p9_sbe_tp_chiplet_init1.C new file mode 100644 index 0000000..4756b0b --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_tp_chiplet_init1.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_tp_chiplet_init1.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_tp_chiplet_init1.C +/// +/// @brief IPL STEP 2.3: SBE TP Chiplet Init 1 :: Releases PCB Reset, Sets TP chiplet enable, Drops Perv chiplet fence +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_sbe_tp_chiplet_init1.H" +fapi2::ReturnCode p9_sbe_tp_chiplet_init1(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_sbe_tp_chiplet_init1: Entering ..."); + + FAPI_DBG("p9_sbe_tp_chiplet_init1: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_sbe_tp_chiplet_init1.H b/src/ppe/hwp/perv/p9_sbe_tp_chiplet_init1.H new file mode 100644 index 0000000..601c167 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_tp_chiplet_init1.H @@ -0,0 +1,65 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_tp_chiplet_init1.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_tp_chiplet_init1.H +/// +/// @brief IPL STEP 2.3: SBE TP Chiplet Init 1 :: Releases PCB Reset, Sets TP chiplet enable, Drops Perv chiplet fence +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SBE_TP_CHIPLET_INIT1_H_ +#define _P9_SBE_TP_CHIPLET_INIT1_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_sbe_tp_chiplet_init1_FP_t)( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief DESCRIPTION -- Drop VSS2VIO fence +/// -- Releases PCB reset +/// -- Sets PRV Chiplet Enable +/// -- Drops PRV Chiplet fence enable +/// -- Drop Global Endpoint Reset +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_sbe_tp_chiplet_init1(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_sbe_tp_chiplet_init2.C b/src/ppe/hwp/perv/p9_sbe_tp_chiplet_init2.C new file mode 100644 index 0000000..36ebf0f --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_tp_chiplet_init2.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_tp_chiplet_init2.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_tp_chiplet_init2.C +/// +/// @brief IPL STEP 2.10 : SBE TP Chiplet Init2 :: Run scan 0 module for pervasive +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_sbe_tp_chiplet_init2.H" +fapi2::ReturnCode p9_sbe_tp_chiplet_init2(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_sbe_tp_chiplet_init2: Entering ..."); + + FAPI_DBG("p9_sbe_tp_chiplet_init2: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_sbe_tp_chiplet_init2.H b/src/ppe/hwp/perv/p9_sbe_tp_chiplet_init2.H new file mode 100644 index 0000000..d37e8be --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_tp_chiplet_init2.H @@ -0,0 +1,62 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_tp_chiplet_init2.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_tp_chiplet_init2.H +/// +/// @brief IPL STEP 2.10 : SBE TP Chiplet Init2 :: Run scan 0 module for pervasive +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SBE_TP_CHIPLET_INIT2_H_ +#define _P9_SBE_TP_CHIPLET_INIT2_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_sbe_tp_chiplet_init2_FP_t)( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief -- Initialize TP Hangcounter 6 +/// -- Scan Repair, Time and GPTR for PRV Chiplet +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_sbe_tp_chiplet_init2(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_sbe_tp_chiplet_init3.C b/src/ppe/hwp/perv/p9_sbe_tp_chiplet_init3.C new file mode 100644 index 0000000..80cb27e --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_tp_chiplet_init3.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_tp_chiplet_init3.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_tp_chiplet_init3.C +/// +/// @brief SBE Pervasive Init Procedure 3 +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_sbe_tp_chiplet_init3.H" +fapi2::ReturnCode p9_sbe_tp_chiplet_init3(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_sbe_tp_chiplet_init3: Entering ..."); + + FAPI_DBG("p9_sbe_tp_chiplet_init3: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_sbe_tp_chiplet_init3.H b/src/ppe/hwp/perv/p9_sbe_tp_chiplet_init3.H new file mode 100644 index 0000000..25c1c2e --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_tp_chiplet_init3.H @@ -0,0 +1,68 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_tp_chiplet_init3.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_tp_chiplet_init3.H +/// +/// @brief SBE Pervasive Init Procedure 3 +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SBE_TP_CHIPLET_INIT3_H_ +#define _P9_SBE_TP_CHIPLET_INIT3_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_sbe_tp_chiplet_init3_FP_t)( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief -- Switches PRV Chiplet OOB mux +/// -- Reset PCB Master Interrupt Register +/// -- Drop Pervasive and OCC2PIB Fence in GP0 (bits 19 & 63) +/// --"Clock Start" command (all other clk domains) +/// -- Clear force_align in chiplet GP0 +/// -- Clear flushmode_inhibit in chiplet GP0 +/// -- Drop FSI fence 5 (checkstop, interrupt conditions) +/// +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_sbe_tp_chiplet_init3(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_sbe_tp_chiplet_reset.C b/src/ppe/hwp/perv/p9_sbe_tp_chiplet_reset.C new file mode 100644 index 0000000..bc90079 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_tp_chiplet_reset.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_tp_chiplet_reset.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_tp_chiplet_reset.C +/// +/// @brief IPL STEP 2.8 : SBE TP Chiplet Reset :: setup hangcounter 6 for TP chiplet +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_sbe_tp_chiplet_reset.H" +fapi2::ReturnCode p9_sbe_tp_chiplet_reset(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_sbe_tp_chiplet_reset: Entering ..."); + + FAPI_DBG("p9_sbe_tp_chiplet_reset: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_sbe_tp_chiplet_reset.H b/src/ppe/hwp/perv/p9_sbe_tp_chiplet_reset.H new file mode 100644 index 0000000..9f3c7ae --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_tp_chiplet_reset.H @@ -0,0 +1,62 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_tp_chiplet_reset.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_tp_chiplet_reset.H +/// +/// @brief IPL STEP 2.8 : SBE TP Chiplet Reset :: setup hangcounter 6 for TP chiplet +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SBE_TP_CHIPLET_RESET_H_ +#define _P9_SBE_TP_CHIPLET_RESET_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_sbe_tp_chiplet_reset_FP_t)( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief --Setup hang counter for PCB slaves/master +/// +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_sbe_tp_chiplet_reset(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.C b/src/ppe/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.C new file mode 100644 index 0000000..57ebc5f --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_tp_gptr_time_repr_initf.C +/// +/// @brief proc sbe tp gptr time repr initf +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_sbe_tp_gptr_time_repr_initf.H" +fapi2::ReturnCode p9_sbe_tp_gptr_time_repr_initf(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_sbe_tp_gptr_time_repr_initf: Entering ..."); + + FAPI_DBG("p9_sbe_tp_gptr_time_repr_initf: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.H b/src/ppe/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.H new file mode 100644 index 0000000..43e777a --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.H @@ -0,0 +1,62 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_tp_gptr_time_repr_initf.H +/// +/// @brief proc sbe tp gptr time repr initf +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SBE_TP_GPTR_TIME_REPR_INITF_H_ +#define _P9_SBE_TP_GPTR_TIME_REPR_INITF_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_sbe_tp_gptr_time_repr_initf_FP_t)( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief --Load Scan Repair, Time and GPTR for TP Chiplet +/// +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_sbe_tp_gptr_time_repr_initf(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_sbe_tp_initf.C b/src/ppe/hwp/perv/p9_sbe_tp_initf.C new file mode 100644 index 0000000..908cfad --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_tp_initf.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_tp_initf.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_tp_initf.C +/// +/// @brief TP chiplet scaninits for the TP rings +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_sbe_tp_initf.H" +fapi2::ReturnCode p9_sbe_tp_initf(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_sbe_tp_initf: Entering ..."); + + FAPI_DBG("p9_sbe_tp_initf: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_sbe_tp_initf.H b/src/ppe/hwp/perv/p9_sbe_tp_initf.H new file mode 100644 index 0000000..56c2cd1 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_tp_initf.H @@ -0,0 +1,65 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_tp_initf.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_tp_initf.H +/// +/// @brief TP chiplet scaninits for the TP rings +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SBE_TP_INITF_H_ +#define _P9_SBE_TP_INITF_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_sbe_tp_initf_FP_t)(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief -- This doesn't include the gptr/time/repair rings, +/// -- since they are scanned in tp_chiplet_init2. +/// -- This doesn't include the net/pib/fuse rings, +/// -- since they are used by the SBE hardware itself. +/// +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_sbe_tp_initf(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_sbe_tp_ld_image.C b/src/ppe/hwp/perv/p9_sbe_tp_ld_image.C new file mode 100644 index 0000000..2741796 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_tp_ld_image.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_tp_ld_image.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_tp_ld_image.C +/// +/// @brief Proc SBE load Image +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_sbe_tp_ld_image.H" +fapi2::ReturnCode p9_sbe_tp_ld_image(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_sbe_tp_ld_image: Entering ..."); + + FAPI_DBG("p9_sbe_tp_ld_image: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_sbe_tp_ld_image.H b/src/ppe/hwp/perv/p9_sbe_tp_ld_image.H new file mode 100644 index 0000000..3e13af6 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_tp_ld_image.H @@ -0,0 +1,65 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_tp_ld_image.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_tp_ld_image.H +/// +/// @brief Proc SBE load Image +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SBE_TP_LD_IMAGE_H_ +#define _P9_SBE_TP_LD_IMAGE_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_sbe_tp_ld_image_FP_t)(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief This procedure copies the .pibmem0 section of image from SEEPROM to the PIBMEM. +/// The pibmem0 section contains the PORE branch table (error handlers) used for the majority of the SEEPROM IPL as well as +/// performance sensitive routines such as the decompression-scan routine and the LCO loader. +/// Once the image is loaded then the error handlers are switched to +/// +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_sbe_tp_ld_image(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_sbe_tp_switch_gears.C b/src/ppe/hwp/perv/p9_sbe_tp_switch_gears.C new file mode 100644 index 0000000..dc9cb47 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_tp_switch_gears.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_tp_switch_gears.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_tp_switch_gears.C +/// +/// @brief SBE switch gears Procedure +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_sbe_tp_switch_gears.H" +fapi2::ReturnCode p9_sbe_tp_switch_gears(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_sbe_tp_switch_gears: Entering ..."); + + FAPI_DBG("p9_sbe_tp_switch_gears: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_sbe_tp_switch_gears.H b/src/ppe/hwp/perv/p9_sbe_tp_switch_gears.H new file mode 100644 index 0000000..3a7e893 --- /dev/null +++ b/src/ppe/hwp/perv/p9_sbe_tp_switch_gears.H @@ -0,0 +1,61 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_sbe_tp_switch_gears.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_tp_switch_gears.H +/// +/// @brief SBE switch gears Procedure +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SBE_TP_SWITCH_GEARS_H_ +#define _P9_SBE_TP_SWITCH_GEARS_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_sbe_tp_switch_gears_FP_t)( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief -- Calls the gear switcher procedure from PIBMEM +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_sbe_tp_switch_gears(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_select_boot_master.C b/src/ppe/hwp/perv/p9_select_boot_master.C new file mode 100644 index 0000000..b849a4f --- /dev/null +++ b/src/ppe/hwp/perv/p9_select_boot_master.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_select_boot_master.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_select_boot_master.C +/// +/// @brief Select Boot Master +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_select_boot_master.H" +fapi2::ReturnCode p9_select_boot_master(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_select_boot_master: Entering ..."); + + FAPI_DBG("p9_select_boot_master: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_select_boot_master.H b/src/ppe/hwp/perv/p9_select_boot_master.H new file mode 100644 index 0000000..201fec0 --- /dev/null +++ b/src/ppe/hwp/perv/p9_select_boot_master.H @@ -0,0 +1,61 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_select_boot_master.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_select_boot_master.H +/// +/// @brief Select Boot Master +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SELECT_BOOT_MASTER_H_ +#define _P9_SELECT_BOOT_MASTER_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_select_boot_master_FP_t)( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief --Select Master Chip +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_select_boot_master(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_select_clock_mux.C b/src/ppe/hwp/perv/p9_select_clock_mux.C new file mode 100644 index 0000000..c6482cf --- /dev/null +++ b/src/ppe/hwp/perv/p9_select_clock_mux.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_select_clock_mux.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_select_clock_mux.C +/// +/// @brief proc select clock mux +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_select_clock_mux.H" +fapi2::ReturnCode p9_select_clock_mux(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_select_clock_mux: Entering ..."); + + FAPI_DBG("p9_select_clock_mux: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_select_clock_mux.H b/src/ppe/hwp/perv/p9_select_clock_mux.H new file mode 100644 index 0000000..94fa7e1 --- /dev/null +++ b/src/ppe/hwp/perv/p9_select_clock_mux.H @@ -0,0 +1,62 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_select_clock_mux.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_select_clock_mux.H +/// +/// @brief proc select clock mux +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SELECT_CLOCK_MUX_H_ +#define _P9_SELECT_CLOCK_MUX_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_select_clock_mux_FP_t)(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief Select internal clock mux to drive the memory clocks off of +/// Flips all bits needed for clock routing (processor only), centaur is done later in p9_cen_ref_clk_enable +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_select_clock_mux(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_set_fsi_gp_shadow.C b/src/ppe/hwp/perv/p9_set_fsi_gp_shadow.C new file mode 100644 index 0000000..ff32cc0 --- /dev/null +++ b/src/ppe/hwp/perv/p9_set_fsi_gp_shadow.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_set_fsi_gp_shadow.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_set_fsi_gp_shadow.C +/// +/// @brief --IPL step 0.8 proc_prep_ipl +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_set_fsi_gp_shadow.H" +fapi2::ReturnCode p9_set_fsi_gp_shadow(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_set_fsi_gp_shadow: Entering ..."); + + FAPI_DBG("p9_set_fsi_gp_shadow: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_set_fsi_gp_shadow.H b/src/ppe/hwp/perv/p9_set_fsi_gp_shadow.H new file mode 100644 index 0000000..c08c3f3 --- /dev/null +++ b/src/ppe/hwp/perv/p9_set_fsi_gp_shadow.H @@ -0,0 +1,61 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_set_fsi_gp_shadow.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_set_fsi_gp_shadow.H +/// +/// @brief --IPL step 0.8 proc_prep_ipl +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SET_FSI_GP_SHADOW_H_ +#define _P9_SET_FSI_GP_SHADOW_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_set_fsi_gp_shadow_FP_t)(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief --update ROOT CTRL shadows if needed +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_set_fsi_gp_shadow(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_setup_clock_term.C b/src/ppe/hwp/perv/p9_setup_clock_term.C new file mode 100644 index 0000000..0a62a24 --- /dev/null +++ b/src/ppe/hwp/perv/p9_setup_clock_term.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_setup_clock_term.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_setup_clock_term.C +/// +/// @brief proc setup clock term +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_setup_clock_term.H" +fapi2::ReturnCode p9_setup_clock_term(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_setup_clock_term: Entering ..."); + + FAPI_DBG("p9_setup_clock_term: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_setup_clock_term.H b/src/ppe/hwp/perv/p9_setup_clock_term.H new file mode 100644 index 0000000..f49bb74 --- /dev/null +++ b/src/ppe/hwp/perv/p9_setup_clock_term.H @@ -0,0 +1,62 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_setup_clock_term.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_setup_clock_term.H +/// +/// @brief proc setup clock term +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SETUP_CLOCK_TERM_H_ +#define _P9_SETUP_CLOCK_TERM_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_setup_clock_term_FP_t)(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief Setup the clock termination correctly for system/chip type +/// Since this is the first procedure run against the chips it also clears the GP write protect +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_setup_clock_term(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_setup_sbe_config.C b/src/ppe/hwp/perv/p9_setup_sbe_config.C new file mode 100644 index 0000000..68b0446 --- /dev/null +++ b/src/ppe/hwp/perv/p9_setup_sbe_config.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_setup_sbe_config.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_setup_sbe_config.C +/// +/// @brief proc setup sbe config +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_setup_sbe_config.H" +fapi2::ReturnCode p9_setup_sbe_config(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip) +{ + FAPI_DBG("p9_setup_sbe_config: Entering ..."); + + FAPI_DBG("p9_setup_sbe_config: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_setup_sbe_config.H b/src/ppe/hwp/perv/p9_setup_sbe_config.H new file mode 100644 index 0000000..5c4521b --- /dev/null +++ b/src/ppe/hwp/perv/p9_setup_sbe_config.H @@ -0,0 +1,61 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_setup_sbe_config.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_setup_sbe_config.H +/// +/// @brief proc setup sbe config +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_SETUP_SBE_CONFIG_H_ +#define _P9_SETUP_SBE_CONFIG_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_setup_sbe_config_FP_t)(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief update mailbox with boot parameters +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_setup_sbe_config(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/p9_start_cbs.C b/src/ppe/hwp/perv/p9_start_cbs.C new file mode 100644 index 0000000..fdec2cc --- /dev/null +++ b/src/ppe/hwp/perv/p9_start_cbs.C @@ -0,0 +1,52 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_start_cbs.C $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_start_cbs.C +/// +/// @brief Start CBS : Trigger CBS +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_start_cbs.H" +fapi2::ReturnCode p9_start_cbs(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> + & i_target_chip) +{ + FAPI_DBG("p9_start_cbs: Entering ..."); + + FAPI_DBG("p9_start_cbs: Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} diff --git a/src/ppe/hwp/perv/p9_start_cbs.H b/src/ppe/hwp/perv/p9_start_cbs.H new file mode 100644 index 0000000..7e89907 --- /dev/null +++ b/src/ppe/hwp/perv/p9_start_cbs.H @@ -0,0 +1,65 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ppe/hwp/perv/p9_start_cbs.H $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_start_cbs.H +/// +/// @brief Start CBS : Trigger CBS +// *! +// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com +// *! BACKUP NAME : Email: +//------------------------------------------------------------------------------ +// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> +// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + + +#ifndef _P9_START_CBS_H_ +#define _P9_START_CBS_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_start_cbs_FP_t)(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &); + +/// @brief --check/wait for VDN_PGOOD = 1 +/// --check for OSC ok +/// --check for VDD (VDD status check) +/// --start CBS(CBS runs thru default path) +/// +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_start_cbs(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> + & i_target_chip); +} + +#endif diff --git a/src/ppe/hwp/perv/pervasive_attributes.xml b/src/ppe/hwp/perv/pervasive_attributes.xml new file mode 100644 index 0000000..f49ed7a --- /dev/null +++ b/src/ppe/hwp/perv/pervasive_attributes.xml @@ -0,0 +1,149 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/ppe/hwp/perv/pervasive_attributes.xml $ --> +<!-- --> +<!-- OpenPOWER OnChipController Project --> +<!-- --> +<!-- Contributors Listed Below - COPYRIGHT 2015 --> +<!-- [+] International Business Machines Corp. --> +<!-- --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<!-- This is an automatically generated file. --> +<!-- File: pervasive_attributes.xml. --> +<!-- XML file specifying attributes used by HW Procedures. Attributes are taken from model pervasive --> +<!--pervasive_attributes.xml--> +<attributes> +<attribute> + <id>ATTR_BOOT_FREQ</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description></description> + <valueType>uint8</valueType> +</attribute> + +<attribute> + <id>ATTR_CHIP_REGIONS_TO_ENABLE</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description></description> + <valueType>uint32</valueType> +</attribute> + +<attribute> + <id>ATTR_CHIP_UNIT_POS</id> + <targetType>TARGET_TYPE_PERV,TARGET_TYPE_PROC_CHIP</targetType> + <description></description> + <valueType>uint8</valueType> +</attribute> + +<attribute> + <id>ATTR_ECID</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description></description> + <valueType>uint64</valueType> +</attribute> + +<attribute> + <id>ATTR_EC_GARD</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description></description> + <valueType>uint8</valueType> +</attribute> + +<attribute> + <id>ATTR_EQ_GARD</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description></description> + <valueType>uint8</valueType> +</attribute> + +<attribute> + <id>ATTR_I2C_BUS_DIV_NEST</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description></description> + <valueType>uint8</valueType> +</attribute> + +<attribute> + <id>ATTR_I2C_BUS_DIV_REF</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description></description> + <valueType>uint8</valueType> +</attribute> + +<attribute> + <id>ATTR_MC_SYNC_MODE</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description></description> + <valueType>uint8</valueType> +</attribute> + +<attribute> + <id>ATTR_NEST_PLL_BUCKET</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description></description> + <valueType>uint8</valueType> +</attribute> + +<attribute> + <id>ATTR_PROC_PB_BNDY_DMIPLL_DATA</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description></description> + <valueType>uint8</valueType> +</attribute> + +<attribute> + <id>ATTR_PROC_PB_BNDY_DMIPLL_FOR_DCCAL_DATA</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description></description> + <valueType>uint8</valueType> +</attribute> + +<attribute> + <id>ATTR_PROC_PERV_BNDY_PLL_DATA</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description></description> + <valueType>uint8</valueType> +</attribute> + +<attribute> + <id>ATTR_SBE_SEEPROM_I2C_DEVICE_ADDRESS</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description></description> + <valueType>uint32</valueType> +</attribute> + +<attribute> + <id>ATTR_SBE_SEEPROM_I2C_PORT</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description></description> + <valueType>uint32</valueType> +</attribute> + +<attribute> + <id>ATTR_VCS_BOOT_VOLTAGE</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description></description> + <valueType>uint8</valueType> +</attribute> + +<attribute> + <id>ATTR_VDD_BOOT_VOLTAGE</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description></description> + <valueType>uint8</valueType> +</attribute> + +</attributes> diff --git a/src/ppe/hwp/perv/pervfiles.mk b/src/ppe/hwp/perv/pervfiles.mk new file mode 100644 index 0000000..c99113c --- /dev/null +++ b/src/ppe/hwp/perv/pervfiles.mk @@ -0,0 +1,74 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: src/ppe/hwp/perv/pervfiles.mk $ +# +# OpenPOWER OnChipController Project +# +# Contributors Listed Below - COPYRIGHT 2015 +# [+] International Business Machines Corp. +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG +# @file pervfiles.mk +# +# @brief mk for including perv object files +# +# @page ChangeLogs Change Logs +# @section pervfiles.mk +# @verbatim +# +# @endverbatim +# +########################################################################## +# Object Files +########################################################################## + +PERV-CPP-SOURCES = p9_sbe_setup_evid.C +PERV-CPP-SOURCES +=p9_sbe_attr_setup.C +PERV-CPP-SOURCES +=p9_sbe_tp_chiplet_init1.C +PERV-CPP-SOURCES +=p9_sbe_check_master.C +PERV-CPP-SOURCES +=p9_sbe_tp_chiplet_init2.C +PERV-CPP-SOURCES +=p9_sbe_enable_seeprom.C +PERV-CPP-SOURCES +=p9_sbe_tp_chiplet_init3.C +PERV-CPP-SOURCES +=p9_sbe_lpc_init.C +PERV-CPP-SOURCES +=p9_sbe_tp_chiplet_reset.C +PERV-CPP-SOURCES +=p9_sbe_nest_arrayinit.C +PERV-CPP-SOURCES +=p9_sbe_tp_gptr_time_repr_initf.C +PERV-CPP-SOURCES +=p9_sbe_nest_chiplet_init.C +PERV-CPP-SOURCES +=p9_sbe_tp_initf.C +PERV-CPP-SOURCES +=p9_sbe_nest_chiplet_reset.C +PERV-CPP-SOURCES +=p9_sbe_tp_ld_image.C +PERV-CPP-SOURCES +=p9_sbe_nest_gptr_time_repr_initf.C +PERV-CPP-SOURCES +=p9_sbe_tp_switch_gears.C +PERV-CPP-SOURCES +=p9_sbe_nest_initf.C +PERV-CPP-SOURCES +=p9_select_boot_master.C +PERV-CPP-SOURCES +=p9_sbe_nest_startclocks.C +PERV-CPP-SOURCES +=p9_select_clock_mux.C +PERV-CPP-SOURCES +=p9_sbe_npll_initf.C +PERV-CPP-SOURCES +=p9_set_fsi_gp_shadow.C +PERV-CPP-SOURCES +=p9_sbe_npll_setup.C +PERV-CPP-SOURCES +=p9_setup_clock_term.C +PERV-CPP-SOURCES +=p9_sbe_select_ex.C +PERV-CPP-SOURCES +=p9_setup_sbe_config.C +PERV-CPP-SOURCES +=p9_sbe_tp_arrayinit.C +PERV-CPP-SOURCES +=p9_start_cbs.C + +PERV-C-SOURCES = +PERV-S-SOURCES = + +PERV_OBJECTS += $(PERV-CPP-SOURCES:.C=.o) +PERV_OBJECTS += $(PERV-C-SOURCES:.c=.o) +PERV_OBJECTS += $(PERV-S-SOURCES:.S=.o) |
