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authorPrachi Gupta <pragupta@us.ibm.com>2017-07-19 20:52:43 -0500
committerWilliam A. Bryan <wilbryan@us.ibm.com>2017-07-21 17:52:38 -0400
commit7990cb411443a3d30a40f2cd101732fc353bcd38 (patch)
tree0dc290edabeac88774036249000789f201096916 /src/occ_gpe0
parentb796b12052f5542945bf6d1a831f8d67a502a0ef (diff)
downloadtalos-occ-7990cb411443a3d30a40f2cd101732fc353bcd38.tar.gz
talos-occ-7990cb411443a3d30a40f2cd101732fc353bcd38.zip
rt_xstop_analysis: enable proc1 fir collection
Change-Id: I4a028c6d371dc9a87ea86e7384e2875108b0c735 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43448 Reviewed-by: ILYA SMIRNOV <ismirno@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Diffstat (limited to 'src/occ_gpe0')
-rw-r--r--src/occ_gpe0/firdata/firData.c6
-rw-r--r--src/occ_gpe0/firdata/fsi.c8
-rw-r--r--src/occ_gpe0/firdata/fsi.h4
-rw-r--r--src/occ_gpe0/firdata/sbe_fifo.c43
4 files changed, 18 insertions, 43 deletions
diff --git a/src/occ_gpe0/firdata/firData.c b/src/occ_gpe0/firdata/firData.c
index 04ae81d..85f3d85 100644
--- a/src/occ_gpe0/firdata/firData.c
+++ b/src/occ_gpe0/firdata/firData.c
@@ -83,7 +83,7 @@ typedef struct
/* Uncomment for additional debug traces */
-#if 0
+#if 0
#define DEBUG_PRD_CHKSTOP_ANALYSIS
#endif
@@ -949,16 +949,15 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd )
l_existBits.mcbist_mc_Mask, l_existBits.mcs_mi_Mask,
l_existBits.mca_dmi_Mask );
#endif
-
/* Add this PROC to the PNOR. */
sTrgt = SCOM_Trgt_getTrgt(TRGT_PROC, p, 0, fsi, isM);
full = FirData_addTrgtToPnor( io_fd, sTrgt, &noAttn, l_chipPtr );
+
/* noAttn is true when we have global regs but none */
/* indicate an attention is present */
if ( full ) break;
if ( noAttn ) continue; /* Skip other proc chiplets */
-
/* gather other chiplets on the processor */
for ( u = 0; u < MAX_XBUS_PER_PROC; u++ )
{
@@ -1159,7 +1158,6 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd )
}
if ( full ) break;
- break; //@TODO remove when 2 proc support is in place
} /* if processor chip type */
else if (HOMER_CHIP_CENTAUR == l_chipPtr->chipType)
{
diff --git a/src/occ_gpe0/firdata/fsi.c b/src/occ_gpe0/firdata/fsi.c
index 4bf105a..fc5ec3c 100644
--- a/src/occ_gpe0/firdata/fsi.c
+++ b/src/occ_gpe0/firdata/fsi.c
@@ -95,11 +95,11 @@ int32_t poll_for_complete( uint32_t * o_val )
/**
* @brief Read a FSI register
*/
-int32_t getfsi( SCOM_Trgt_t i_trgt, uint32_t i_addr, uint32_t * o_val )
+int32_t getfsi( SCOM_Trgt_t* i_trgt, uint32_t i_addr, uint32_t * o_val )
{
int32_t rc = SUCCESS;
- uint32_t fsi_addr = i_trgt.fsiBaseAddr | i_addr;
+ uint32_t fsi_addr = i_trgt->fsiBaseAddr | i_addr;
/* setup the OPB command register */
/* only supporting 4-byte access */
@@ -123,11 +123,11 @@ int32_t getfsi( SCOM_Trgt_t i_trgt, uint32_t i_addr, uint32_t * o_val )
/**
* @brief Write a FSI register
*/
-int32_t putfsi( SCOM_Trgt_t i_trgt, uint32_t i_addr, uint32_t i_val )
+int32_t putfsi( SCOM_Trgt_t* i_trgt, uint32_t i_addr, uint32_t i_val )
{
int32_t rc = SUCCESS;
- uint32_t fsi_addr = i_trgt.fsiBaseAddr | i_addr;
+ uint32_t fsi_addr = i_trgt->fsiBaseAddr | i_addr;
/* setup the OPB command register */
/* only supporting 4-byte access */
diff --git a/src/occ_gpe0/firdata/fsi.h b/src/occ_gpe0/firdata/fsi.h
index 870e47f..f28b044 100644
--- a/src/occ_gpe0/firdata/fsi.h
+++ b/src/occ_gpe0/firdata/fsi.h
@@ -34,7 +34,7 @@
* @param o_val Returned value.
* @return Non-SUCCESS if an internal function fails. SUCCESS otherwise.
*/
-int32_t getfsi( SCOM_Trgt_t i_trgt, uint32_t i_addr, uint32_t * o_val );
+int32_t getfsi( SCOM_Trgt_t* i_trgt, uint32_t i_addr, uint32_t * o_val );
/**
* @brief Write a FSI register.
@@ -43,5 +43,5 @@ int32_t getfsi( SCOM_Trgt_t i_trgt, uint32_t i_addr, uint32_t * o_val );
* @param o_val Value to write.
* @return Non-SUCCESS if an internal function fails. SUCCESS otherwise.
*/
-int32_t putfsi( SCOM_Trgt_t i_trgt, uint32_t i_addr, uint32_t i_val );
+int32_t putfsi( SCOM_Trgt_t* i_trgt, uint32_t i_addr, uint32_t i_val );
diff --git a/src/occ_gpe0/firdata/sbe_fifo.c b/src/occ_gpe0/firdata/sbe_fifo.c
index d53834a..1cddde5 100644
--- a/src/occ_gpe0/firdata/sbe_fifo.c
+++ b/src/occ_gpe0/firdata/sbe_fifo.c
@@ -26,6 +26,7 @@
#include <fsi.h>
#include <native.h>
+extern void busy_wait(uint32_t t_microseconds);
/** @brief Waits for FIFO to be ready to be written to
* @param i_target The SCOM target.
* @return Non-SUCCESS if the SCOM fails. SUCCESS otherwise.
@@ -41,7 +42,7 @@ uint32_t waitUpFifoReady(SCOM_Trgt_t* i_target)
do
{
//Read upstream status to see if there is room for more data
- l_rc = getfsi(*i_target, l_addr, &l_data);
+ l_rc = getfsi(i_target, l_addr, &l_data);
if(l_rc != SUCCESS)
{
TRAC_ERR("waitUpFifoReady: failed to getfsi from addr 0x%08x",
@@ -63,7 +64,7 @@ uint32_t waitUpFifoReady(SCOM_Trgt_t* i_target)
break;
}
- sleep(10000); //sleep for 10,000 ns
+ busy_wait(10); //sleep for 10,000 ns
l_elapsed_time_ns += 10000;
}while(TRUE);
@@ -86,7 +87,7 @@ uint32_t waitDnFifoReady(SCOM_Trgt_t* i_target, uint32_t* o_status)
{
// read dnstream status to see if data ready to be read
// or if has hit the EOT
- l_rc = getfsi(*i_target, l_addr, o_status);
+ l_rc = getfsi(i_target, l_addr, o_status);
if(l_rc != SUCCESS)
{
return l_rc;
@@ -97,11 +98,6 @@ uint32_t waitDnFifoReady(SCOM_Trgt_t* i_target, uint32_t* o_status)
{
break;
}
- else
- {
- TRAC_IMP("SBE status reg returned fifo empty or dequeued eot flag 0x%.8X",
- *o_status);
- }
// Check for timeout
if(l_elapsed_time_ns >= MAX_UP_FIFO_TIMEOUT_NS)
@@ -112,7 +108,7 @@ uint32_t waitDnFifoReady(SCOM_Trgt_t* i_target, uint32_t* o_status)
break;
}
- sleep(10000); // wait for 10,000 ns
+ busy_wait(10); // wait for 10,000 ns
l_elapsed_time_ns += 10000;
}while(TRUE);
@@ -129,13 +125,11 @@ uint32_t writeRequest(SCOM_Trgt_t* i_target, uint32_t* i_fifoRequest)
{
uint32_t l_rc = SUCCESS;
- TRAC_IMP("Enter writeRequest");
-
// Ensure Downstream Max Transfer Counter is 0 non-0 can cause
// protocol issues)
uint32_t l_addr = SBE_FIFO_DNFIFO_MAX_TSFR;
uint32_t l_data = 0;
- l_rc = putfsi(*i_target, l_addr, l_data);
+ l_rc = putfsi(i_target, l_addr, l_data);
if(l_rc != SUCCESS)
{
TRAC_ERR("writeRequest: failed to putfsi to addr 0x%08x",
@@ -159,7 +153,7 @@ uint32_t writeRequest(SCOM_Trgt_t* i_target, uint32_t* i_fifoRequest)
}
//Send data into fifo
- l_rc = putfsi(*i_target, l_addr, *l_sent);
+ l_rc = putfsi(i_target, l_addr, *l_sent);
if(l_rc != SUCCESS)
{
TRAC_ERR("writeRequest: failed to putfsi to addr 0x%08x",
@@ -179,14 +173,12 @@ uint32_t writeRequest(SCOM_Trgt_t* i_target, uint32_t* i_fifoRequest)
l_addr = SBE_FIFO_UPFIFO_SIG_EOT;
l_data = FSB_UPFIFO_SIG_EOT;
- l_rc = putfsi(*i_target, l_addr, l_data);
+ l_rc = putfsi(i_target, l_addr, l_data);
if(l_rc != SUCCESS)
{
TRAC_ERR("writeRequest: failed to putfsi to addr 0x%08x", l_addr);
}
- TRAC_IMP("Exit writeRequest");
-
return l_rc;
}
@@ -205,8 +197,6 @@ uint32_t readResponse(SCOM_Trgt_t* i_target,
uint32_t l_rc = SUCCESS;
uint32_t l_readBuffer[READ_BUFFER_SIZE];
- TRAC_IMP("Enter readResponse");
-
// EOT is expected before the response buffer is full. Room for
// the PCBPIB status or FFDC is included, but is only returned
// if there is an error. The last received word has the distance
@@ -261,7 +251,7 @@ uint32_t readResponse(SCOM_Trgt_t* i_target,
}
// Read next word
- l_rc = getfsi(*i_target, SBE_FIFO_DNFIFO_DATA_OUT, &l_lastWord);
+ l_rc = getfsi(i_target, SBE_FIFO_DNFIFO_DATA_OUT, &l_lastWord);
if(l_rc != SUCCESS)
{
return l_rc;
@@ -299,7 +289,7 @@ uint32_t readResponse(SCOM_Trgt_t* i_target,
// Notify SBE that EOT has been received
uint32_t l_eotSig = FSB_UPFIFO_SIG_EOT;
- l_rc = putfsi(*i_target, SBE_FIFO_DNFIFO_ACK_EOT, l_eotSig);
+ l_rc = putfsi(i_target, SBE_FIFO_DNFIFO_ACK_EOT, l_eotSig);
if(l_rc != SUCCESS)
{
return l_rc;
@@ -340,7 +330,6 @@ uint32_t readResponse(SCOM_Trgt_t* i_target,
l_rc = FAIL;
}
- TRAC_IMP("Exit readResponse");
return l_rc;
}
@@ -358,8 +347,6 @@ uint32_t performFifoChipOp(SCOM_Trgt_t* i_target,
{
uint32_t l_rc = SUCCESS;
- TRAC_IMP("Enter performFifoChipOp");
-
l_rc = writeRequest(i_target, i_fifoRequest);
if(l_rc != SUCCESS)
{
@@ -371,8 +358,6 @@ uint32_t performFifoChipOp(SCOM_Trgt_t* i_target,
i_fifoResponse,
i_responseSize);
- TRAC_IMP("Exit performFifoChioOp");
-
return l_rc;
}
@@ -386,8 +371,6 @@ int32_t putFifoScom(SCOM_Trgt_t* i_target, uint64_t i_addr, uint64_t i_data)
{
uint32_t l_rc = SUCCESS;
- TRAC_IMP("Enter putFifoScom");
-
struct fifoPutScomRequest l_fifoRequest;
struct fifoPutScomResponse l_fifoResponse;
@@ -403,8 +386,6 @@ int32_t putFifoScom(SCOM_Trgt_t* i_target, uint64_t i_addr, uint64_t i_data)
(uint32_t*)&l_fifoResponse,
sizeof(struct fifoPutScomResponse));
- TRAC_IMP("Exit putFifoScom");
-
return l_rc;
}
@@ -418,8 +399,6 @@ int32_t getFifoScom(SCOM_Trgt_t* i_target, uint64_t i_addr, uint64_t* o_data)
{
uint32_t l_rc = SUCCESS;
- TRAC_IMP("Enter getFifoScom");
-
struct fifoGetScomRequest l_fifoRequest;
struct fifoGetScomResponse l_fifoResponse;
@@ -437,7 +416,5 @@ int32_t getFifoScom(SCOM_Trgt_t* i_target, uint64_t i_addr, uint64_t* o_data)
//Always return data even if there is an error
*o_data = l_fifoResponse.data;
- TRAC_IMP("Exit getFifoScom");
-
return l_rc;
}
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