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| author | William Bryan <wilbryan@us.ibm.com> | 2017-01-16 14:34:53 -0600 |
|---|---|---|
| committer | William A. Bryan <wilbryan@us.ibm.com> | 2017-02-15 18:50:20 -0500 |
| commit | 61ebd774170f72a53a838944f6d3204c87638694 (patch) | |
| tree | 2933c7a03f5f564509f7c69f07d0e449219edb47 /src/occ_gpe0 | |
| parent | 6ff7b2615b6eb6c19f64babf7a724923c12c34b3 (diff) | |
| download | talos-occ-61ebd774170f72a53a838944f6d3204c87638694.tar.gz talos-occ-61ebd774170f72a53a838944f6d3204c87638694.zip | |
Changes For P9 Enablement
Change-Id: I37e8174bcc6e99f602a66cff077ef41ad889b19c
RTC:165351
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34949
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Diffstat (limited to 'src/occ_gpe0')
| -rw-r--r-- | src/occ_gpe0/apss_init.c | 29 | ||||
| -rw-r--r-- | src/occ_gpe0/apss_read.c | 2 | ||||
| -rw-r--r-- | src/occ_gpe0/gpe0_main.c | 4 |
3 files changed, 4 insertions, 31 deletions
diff --git a/src/occ_gpe0/apss_init.c b/src/occ_gpe0/apss_init.c index 678dad3..702393a 100644 --- a/src/occ_gpe0/apss_init.c +++ b/src/occ_gpe0/apss_init.c @@ -5,7 +5,7 @@ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -183,30 +183,6 @@ void apss_init_gpio(ipc_msg_t* cmd, void* arg) gpe_set_ffdc(&(args->error), SPIPSS_P2S_WDATA_REG, rc, regValue); break; } - // Start SPI transaction - rc = apss_start_spi_command(args, 0); - if (rc) - { - PK_TRACE("apss_init_gpio: SPI command start failed. rc = 0x%08x", rc); - //FFDC already added. - break; - } - - //-------------------- - // Interrupt (APSS cmd 0x6xxx) - regValue = args->config0.interrupt; - regValue = regValue << 48; - regValue |= 0x6000000000000000; - regValue |= (port << 56); - - rc = putscom_abs(SPIPSS_P2S_WDATA_REG, regValue); - if (rc) - { - PK_TRACE("apss_init_gpio: SPIPSS_P2S_WDATA_REG putscom failed. value:0x%X. rc = 0x%08x", - regValue, rc); - gpe_set_ffdc(&(args->error), SPIPSS_P2S_WDATA_REG, rc, regValue); - break; - } // Start SPI transaction if (port == 0) @@ -355,9 +331,6 @@ void apss_init_mode(ipc_msg_t* cmd, void* arg) gpe_set_ffdc(&(args->error), SPIPSS_P2S_COMMAND_REG, rc, 0x8000000000000000); } - //Wait 20usec for apss becoming ready to send out the frame of composite mode - busy_wait(20); - }while(0); // send back a response diff --git a/src/occ_gpe0/apss_read.c b/src/occ_gpe0/apss_read.c index 9ffd334..df33bfa 100644 --- a/src/occ_gpe0/apss_read.c +++ b/src/occ_gpe0/apss_read.c @@ -5,7 +5,7 @@ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ diff --git a/src/occ_gpe0/gpe0_main.c b/src/occ_gpe0/gpe0_main.c index 5cb0174..da7640b 100644 --- a/src/occ_gpe0/gpe0_main.c +++ b/src/occ_gpe0/gpe0_main.c @@ -5,7 +5,7 @@ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -34,7 +34,7 @@ #include "ipc_ping.h" #include "gpe_export.h" -#define KERNEL_STACK_SIZE 256 +#define KERNEL_STACK_SIZE 512 #define MAIN_THREAD_STACK_SIZE 512 uint8_t G_kernel_stack[KERNEL_STACK_SIZE]; |
