diff options
author | Prachi Gupta <pragupta@us.ibm.com> | 2017-07-16 09:53:32 -0500 |
---|---|---|
committer | William A. Bryan <wilbryan@us.ibm.com> | 2017-07-21 16:26:29 -0400 |
commit | cbedccff001c94de84fdc01d1ea8a38a8264598e (patch) | |
tree | e9b1ebae6fa2d95d4a9c0aea586888431d21ce7f /src/occ_gpe0/firdata | |
parent | f301809e56b82fe61260a15f437183976db9ef75 (diff) | |
download | talos-occ-cbedccff001c94de84fdc01d1ea8a38a8264598e.tar.gz talos-occ-cbedccff001c94de84fdc01d1ea8a38a8264598e.zip |
rt_xstop_analysis: compile all of firdata on gpe0
Change-Id: I804cdf63879a2b80c9e14149e45ee665240c4a88
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43244
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-by: ILYA SMIRNOV <ismirno@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Diffstat (limited to 'src/occ_gpe0/firdata')
-rw-r--r-- | src/occ_gpe0/firdata/ast_mboxdd.c | 10 | ||||
-rw-r--r-- | src/occ_gpe0/firdata/ecc.c | 26 | ||||
-rw-r--r-- | src/occ_gpe0/firdata/ecc.h | 4 | ||||
-rw-r--r-- | src/occ_gpe0/firdata/firData.c | 52 | ||||
-rw-r--r-- | src/occ_gpe0/firdata/fir_data_collect.c | 112 | ||||
-rw-r--r-- | src/occ_gpe0/firdata/fir_data_collect.h | 20 | ||||
-rw-r--r-- | src/occ_gpe0/firdata/lpc.c | 5 | ||||
-rw-r--r-- | src/occ_gpe0/firdata/lpc.h | 5 | ||||
-rw-r--r-- | src/occ_gpe0/firdata/native.c | 43 | ||||
-rw-r--r-- | src/occ_gpe0/firdata/native.h | 15 | ||||
-rw-r--r-- | src/occ_gpe0/firdata/pnor_mboxdd.c | 16 | ||||
-rw-r--r-- | src/occ_gpe0/firdata/pnor_mboxdd.h | 10 | ||||
-rw-r--r-- | src/occ_gpe0/firdata/pnor_util.c | 8 | ||||
-rw-r--r-- | src/occ_gpe0/firdata/sbe_fifo.c | 1 | ||||
-rw-r--r-- | src/occ_gpe0/firdata/sbe_fifo.h | 2 | ||||
-rw-r--r-- | src/occ_gpe0/firdata/scom_util.c | 92 |
16 files changed, 105 insertions, 316 deletions
diff --git a/src/occ_gpe0/firdata/ast_mboxdd.c b/src/occ_gpe0/firdata/ast_mboxdd.c index 064bcca..2e98af8 100644 --- a/src/occ_gpe0/firdata/ast_mboxdd.c +++ b/src/occ_gpe0/firdata/ast_mboxdd.c @@ -41,7 +41,7 @@ errorHndl_t writeRegSIO(uint8_t i_regAddr, uint8_t i_data) errorHndl_t l_err = NO_ERROR; do { - size_t reg_size = sizeof(uint8_t); + uint32_t reg_size = sizeof(uint8_t); /* Write out the register address */ l_err = lpc_write( LPC_TRANS_IO, SIO_ADDR_REG_2E, @@ -65,7 +65,7 @@ errorHndl_t readRegSIO(uint8_t i_regAddr, uint8_t* o_data) errorHndl_t l_err = NO_ERROR; do { - size_t reg_size = sizeof(uint8_t); + uint32_t reg_size = sizeof(uint8_t); /* Write out the register address */ l_err = lpc_write( LPC_TRANS_IO, SIO_ADDR_REG_2E, @@ -86,7 +86,7 @@ errorHndl_t readRegSIO(uint8_t i_regAddr, uint8_t* o_data) errorHndl_t mboxOut(uint64_t i_addr, uint8_t i_byte) { - size_t len = sizeof(i_byte); + uint32_t len = sizeof(i_byte); return lpc_write( LPC_TRANS_IO, i_addr + MBOX_IO_BASE, @@ -96,7 +96,7 @@ errorHndl_t mboxOut(uint64_t i_addr, uint8_t i_byte) errorHndl_t mboxIn(uint64_t i_addr, uint8_t *o_byte) { - size_t len = sizeof(uint8_t); + uint32_t len = sizeof(uint8_t); return lpc_read( LPC_TRANS_IO, i_addr + MBOX_IO_BASE, @@ -247,7 +247,7 @@ errorHndl_t initializeMbox(void) do { - size_t reg_size = sizeof(uint8_t); + uint32_t reg_size = sizeof(uint8_t); //First need to unlock SIO registers /* Send SuperIO password - send A5 twice to offset 0x2E */ diff --git a/src/occ_gpe0/firdata/ecc.c b/src/occ_gpe0/firdata/ecc.c index 6696678..8e54af4 100644 --- a/src/occ_gpe0/firdata/ecc.c +++ b/src/occ_gpe0/firdata/ecc.c @@ -23,10 +23,6 @@ /* */ /* IBM_PROLOG_END_TAG */ -/*#include <stdio.h> */ -#include <endian.h> -#include <assert.h> - #include <native.h> #include <ecc.h> @@ -127,7 +123,7 @@ static uint8_t syndromeMatrix[] = { uint8_t parity_check( uint64_t i_data ) { int ones = 0; - size_t x; + uint32_t x; for( x=0; x<(sizeof(i_data)*8); x++ ) { if( i_data & (0x8000000000000000ull >> x) ) @@ -203,13 +199,16 @@ uint8_t correctECC(uint64_t* io_data, uint8_t* io_ecc) } void injectECC(const uint8_t* i_src, - size_t i_srcSz, + uint32_t i_srcSz, uint8_t* o_dst) { - assert(0 == (i_srcSz % sizeof(uint64_t))); + if (0 != (i_srcSz % sizeof(uint64_t))) + { + return; + } - size_t i = 0; - size_t o = 0; + uint32_t i = 0; + uint32_t o = 0; for(i = 0, o = 0; i < i_srcSz; i += sizeof(uint64_t), o += sizeof(uint64_t) + sizeof(uint8_t)) @@ -226,13 +225,16 @@ void injectECC(const uint8_t* i_src, } eccStatus removeECC(uint8_t* io_src, - uint8_t* o_dst, size_t i_dstSz) + uint8_t* o_dst, uint32_t i_dstSz) { - assert(0 == (i_dstSz % sizeof(uint64_t))); + if (0 != (i_dstSz % sizeof(uint64_t))) + { + return -1; + } eccStatus rc = ECC_CLEAN; - size_t i = 0, o = 0; + uint32_t i = 0, o = 0; for(i = 0, o = 0; o < i_dstSz; i += sizeof(uint64_t) + sizeof(uint8_t), o += sizeof(uint64_t)) diff --git a/src/occ_gpe0/firdata/ecc.h b/src/occ_gpe0/firdata/ecc.h index 12ffe4e..166df69 100644 --- a/src/occ_gpe0/firdata/ecc.h +++ b/src/occ_gpe0/firdata/ecc.h @@ -58,7 +58,7 @@ typedef uint8_t eccBitfields; * * @note i_srcSz must be a multiple of 8 bytes. */ -void injectECC(const uint8_t* i_src, size_t i_srcSz, +void injectECC(const uint8_t* i_src, uint32_t i_srcSz, uint8_t* o_dst); /** Remove ECC from a data stream. @@ -70,7 +70,7 @@ void injectECC(const uint8_t* i_src, size_t i_srcSz, * @note i_dstSz must be a multiple of 8 bytes. */ eccStatus removeECC(uint8_t* io_src, - uint8_t* o_dst, size_t i_dstSz); + uint8_t* o_dst, uint32_t i_dstSz); #endif diff --git a/src/occ_gpe0/firdata/firData.c b/src/occ_gpe0/firdata/firData.c index 299f92b..f124ad3 100644 --- a/src/occ_gpe0/firdata/firData.c +++ b/src/occ_gpe0/firdata/firData.c @@ -141,9 +141,9 @@ bool FirData_addRegToPnor( FirData_t * io_fd, PNOR_Trgt_t * io_pTrgt, rc = SCOM_getScom( i_sTrgt, i_addr, &(reg.val) ); if ( SUCCESS != rc ) { - TRAC_ERR( "[FirData_addRegToPnor] t=%d p=%d u=%d rc=%d " - "addr=0x%08x val=0x%08x%08x", i_sTrgt.type, - i_sTrgt.procPos, i_sTrgt.procUnitPos, rc, i_addr, + TRAC_ERR( "[FirData_addRegToPnor] t=%d p=%d u=%d rc=%d ", + i_sTrgt.type, i_sTrgt.procPos, i_sTrgt.procUnitPos, rc); + TRAC_ERR( "addr=0x%08x val=0x%08x%08x",i_addr, (uint32_t)(reg.val >> 32), (uint32_t)reg.val ); if ( io_pTrgt->scomErrs < PNOR_Trgt_MAX_SCOM_ERRORS ) @@ -680,7 +680,7 @@ bool FirData_addIdRegsToPnor( FirData_t * io_fd, PNOR_Trgt_t * io_pTrgt, for ( i = 0; i < cnt; i++ ) { #ifdef DEBUG_PRD_CHKSTOP_ANALYSIS - TRAC_INFO(" addIdRegsToPnor In/Array: chipType:%X::%X trgType:%X::%X" + TRAC_IMP(" addIdRegsToPnor In/Array: chipType:%X::%X trgType:%X::%X" " regType:%X::%X ecLevel %X::%X", i_chipStruct->chipType, l_ecAddrtPtr->chipType, t, l_ecAddrtPtr->trgtType, @@ -736,9 +736,8 @@ bool FirData_addTrgtToPnor( FirData_t * io_fd, SCOM_Trgt_t i_sTrgt, *o_noAttn = false; /* Must be false if there are no global regs. */ - TRAC_IMP( "FIRDATA: t=%d p=%d u=%d FSI=0x%08x isM=%c", i_sTrgt.type, - i_sTrgt.procPos, i_sTrgt.procUnitPos, i_sTrgt.fsiBaseAddr, - i_sTrgt.isMaster ? 'T' : 'F' ); + TRAC_IMP( "FIRDATA: t=%d p=%d u=%d FSI=0x%08x", i_sTrgt.type, + i_sTrgt.procPos, i_sTrgt.procUnitPos, (uint32_t)i_sTrgt.fsiBaseAddr); do { @@ -812,7 +811,7 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd ) uint8_t *l_bytePtr = io_fd->hBuf + sizeof(HOMER_Data_t) + pad; HOMER_Chip_t *l_chipPtr = NULL; - TRAC_INFO("AddTgtsMain:numChips:%d", io_fd->hData->chipCount); + TRAC_IMP("AddTgtsMain:numChips:%d", (uint32_t)io_fd->hData->chipCount); /* Iterate ALL CHIPs */ for ( p = 0; p < io_fd->hData->chipCount; p++ ) @@ -823,7 +822,7 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd ) fsi = l_chipPtr->fsiBaseAddr; p = l_chipPtr->chipPos; - TRAC_INFO( " AddTgtsMain:ChipType:%d ChipNumber:%d", + TRAC_IMP( " AddTgtsMain:ChipType:%d ChipNumber:%d", l_chipPtr->chipType, p ); /* Is this a PROC or Centaur chip ? */ @@ -908,13 +907,13 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd ) l_bytePtr += sizeof(HOMER_ChipCumulus_t); } /* else if cumulus */ - TRAC_INFO( " Masks XBUS:%X OBUS:%X EC:%X EQ:%X EX:%X CAPP:%X PEC:%X PHB:%X", - l_existBits.xbusMask, l_existBits.obusMask, l_existBits.ecMask, - l_existBits.eqMask, l_existBits.exMask, l_existBits.cappMask, - l_existBits.pecMask, l_existBits.phbMask ); - TRAC_INFO( " Masks MCBIST:%X MCS:%X MCA:%X", - l_existBits.mcbist_mc_Mask, l_existBits.mcs_mi_Mask, - l_existBits.mca_dmi_Mask ); +// TRAC_IMP("Masks XBUS:%X OBUS:%X EC:%X EQ:%X EX:%X CAPP:%X PEC:%X PHB:%X", +// (uint32_t)l_existBits.xbusMask, (uint32_t)l_existBits.obusMask, (uint32_t)l_existBits.ecMask, +// (uint32_t)l_existBits.eqMask, (uint32_t)l_existBits.exMask, (uint32_t)l_existBits.cappMask, +// (uint32_t)l_existBits.pecMask, (uint32_t)l_existBits.phbMask); +// TRAC_IMP("Masks MCBIST:%X MCS:%X MCA:%X", +// (uint32_t)l_existBits.mcbist_mc_Mask, (uint32_t) l_existBits.mcs_mi_Mask, +// (uint32_t)l_existBits.mca_dmi_Mask); /* Add this PROC to the PNOR. */ sTrgt = SCOM_Trgt_getTrgt(TRGT_PROC, p, 0, fsi, isM); @@ -1148,7 +1147,7 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd ) { /* unexpected chip type */ TRAC_ERR( "addTrgtsToPnor saw invalid chip:0x%X", - l_chipPtr->chipType ); + (uint32_t)l_chipPtr->chipType ); break; } /* end if centaur chip type */ @@ -1184,15 +1183,15 @@ int32_t FirData_init( FirData_t * io_fd, int32_t rc = SUCCESS; - size_t sz_hData = sizeof(HOMER_Data_t); - size_t sz_pnoNoEcc = 0; - size_t sz_u32 = sizeof(uint32_t); - size_t sz_u64 = sizeof(uint64_t); + uint32_t sz_hData = sizeof(HOMER_Data_t); + uint32_t sz_pnoNoEcc = 0; + uint32_t sz_u32 = sizeof(uint32_t); + uint32_t sz_u64 = sizeof(uint64_t); bool full = false; uint32_t x[TRGT_MAX][REG_MAX]; - size_t curIdx = 0; + uint32_t curIdx = 0; uint32_t t = TRGT_FIRST; @@ -1264,7 +1263,7 @@ int32_t FirData_init( FirData_t * io_fd, if ( io_fd->maxHBufSize - sz_hData < curIdx ) { TRAC_ERR( FUNC"HOMER list size %d is larger than HOMER data " - "buffer %d", curIdx, io_fd->maxHBufSize - sz_hData ); + "buffer %d", (uint32_t)curIdx, (uint32_t)(io_fd->maxHBufSize - sz_hData )); rc = FAIL; break; } @@ -1302,7 +1301,7 @@ int32_t FirData_init( FirData_t * io_fd, } else { - TRAC_ERR(FUNC"Chiptype is invalid %X ", l_chiptPtr->chipType); + TRAC_ERR(FUNC"Chiptype is invalid %X ", (uint32_t)l_chiptPtr->chipType); rc = FAIL; break; } @@ -1378,8 +1377,9 @@ int32_t FirData_captureCsFirData( uint8_t * i_hBuf, uint32_t i_hBufSize, if ( SUCCESS != rc ) { - TRAC_ERR( FUNC"Failed: i_hBuf=%p, i_hBufSize=0x%08x, i_pBuf=%p, " - "i_pBufSize=%08x", i_hBuf, i_hBufSize, i_pBuf, i_pBufSize ); + TRAC_ERR( FUNC"Failed: i_hBuf=%08x, i_hBufSize=0x%08x, i_pBuf=%08x, " + "i_pBufSize=%08x", (uint32_t)i_hBuf, (uint32_t)i_hBufSize, + (uint32_t)i_pBuf, (uint32_t)i_pBufSize ); } return rc; diff --git a/src/occ_gpe0/firdata/fir_data_collect.c b/src/occ_gpe0/firdata/fir_data_collect.c index a2af34f..d4e1b5e 100644 --- a/src/occ_gpe0/firdata/fir_data_collect.c +++ b/src/occ_gpe0/firdata/fir_data_collect.c @@ -25,18 +25,12 @@ #include <fir_data_collect.h> -#include <scom.h> -#include <occ_service_codes.h> -#include <errl.h> #include "tpc_firmware_registers.h" #include "tpc_register_addresses.h" -#include <trac.h> -#include <homer.h> #include <firData.h> +#include <gpe_export.h> -FIR_HEAP_BUFFER(uint8_t G_fir_heap[FIR_HEAP_SECTION_SIZE]); -FIR_PARMS_BUFFER(uint8_t G_fir_data_parms[FIR_PARMS_SECTION_SIZE]); -uint32_t G_fir_master = FIR_OCC_NOT_FIR_MASTER; +extern gpe_shared_data_t * G_gpe_shared_data; /* * Function Specification @@ -53,10 +47,11 @@ void fir_data_collect(void) int32_t l_rc = 0; // Homer data section and size - uint8_t *l_hBuf = (uint8_t*) FIR_PARMS_SECTION_BASE_ADDRESS; + uint8_t *l_hBuf = (uint8_t*) G_gpe_shared_data->fir_params_buffer_ptr; uint32_t l_hBufSize = HOMER_FIR_PARM_SIZE; + // PNOR working buffer in SRAM and size - uint8_t *l_pBuf = (uint8_t*) FIR_HEAP_SECTION_BASE_ADDRESS; + uint8_t *l_pBuf = (uint8_t*) G_gpe_shared_data->fir_heap_buffer_ptr; uint32_t l_pBufSize = FIR_HEAP_SECTION_SIZE; l_rc = FirData_captureCsFirData(l_hBuf, @@ -67,100 +62,3 @@ void fir_data_collect(void) // Trace the rc only, error logs cannot be collected in this state TRAC_IMP("Checkstop FIR data capture completed with rc=%d", l_rc); } - - -/* - * Function Specification - * - * Name: pnor_access_ok - * - * Description: Determines if it is ok for this OCC to access the PNOR. - * - * End Function Specification - */ -// TODO: This code is not allowed currently, as it relies on performing scom operations. -#if 0 -bool pnor_access_allowed(void) -{ - /* BMC ownership of the PNOR is indicated by bit 18 in TPC_GP0 */ - int l_rc = 0; - tpc_gp0_t l_tp_gp0_read; - bool l_access_allowed = FALSE; - - l_tp_gp0_read.words.high_order = 0x00000000; - l_tp_gp0_read.words.low_order = 0x00000000; - - l_rc = getscom_ffdc(TPC_GP0, (uint64_t *)&l_tp_gp0_read, NULL); - - if (l_rc == 0) - { - if ((l_tp_gp0_read.words.high_order & TPC_GP0_BIT18_PNOR_OWNER_MASK) == 0) - { - TRAC_INFO("PNOR access allowed at this time"); - l_access_allowed = TRUE; - } - else - { - TRAC_INFO("PNOR access NOT allowed at this time, tpc_gp0.hi = 0x%08x", - l_tp_gp0_read.words.high_order); - - /* @ - * @errortype - * @moduleid FIR_DATA_MID - * @reasoncode INTERNAL_FAILURE - * @userdata1 TPC_GP0 high word - * @userdata4 ERC_PNOR_OWNERSHIP_NOT_AVAILABLE - * @devdesc PNOR access not allowed at this time. - */ - errlHndl_t l_errl = createErrl( - FIR_DATA_MID, /*ModId */ - INTERNAL_FAILURE, /*Reasoncode */ - ERC_PNOR_OWNERSHIP_NOT_AVAILABLE, /*Extended reasoncode */ - ERRL_SEV_INFORMATIONAL, /*Severity */ - NULL, /*Trace Buf */ - DEFAULT_TRACE_SIZE, /*Trace Size */ - l_tp_gp0_read.words.high_order, /*Userdata1 */ - 0 /*Userdata2 */ - ); - - /* Commit log */ - commitErrl(&l_errl); - } - } - else - { - /* getscom failure */ - TRAC_ERR("TPC_GP0 getscom failure rc = 0x%08x", -l_rc ); - - /* @ - * @errortype - * @moduleid FIR_DATA_MID - * @reasoncode INTERNAL_HW_FAILURE - * @userdata1 getscom failure rc - * @userdata4 ERC_GETSCOM_TPC_GP0_FAILURE - * @devdesc Failure determining PNOR ownership. Cannot read TPC_GP0. - */ - errlHndl_t l_errl = createErrl( - FIR_DATA_MID, /*ModId */ - INTERNAL_HW_FAILURE, /*Reasoncode */ - ERC_GETSCOM_TPC_GP0_FAILURE, /*Extended reasoncode */ - ERRL_SEV_PREDICTIVE, /*Severity */ - NULL, /*Trace Buf */ - DEFAULT_TRACE_SIZE, /*Trace Size */ - l_rc, /*Userdata1 */ - 0 /*Userdata2 */ - ); - - /* Callout firmware */ - addCalloutToErrl(l_errl, - ERRL_CALLOUT_TYPE_COMPONENT_ID, - ERRL_COMPONENT_ID_FIRMWARE, - ERRL_CALLOUT_PRIORITY_HIGH); - - /* Commit log */ - commitErrl(&l_errl); - } - - return l_access_allowed; -} -#endif diff --git a/src/occ_gpe0/firdata/fir_data_collect.h b/src/occ_gpe0/firdata/fir_data_collect.h index c313956..1ac0844 100644 --- a/src/occ_gpe0/firdata/fir_data_collect.h +++ b/src/occ_gpe0/firdata/fir_data_collect.h @@ -29,28 +29,8 @@ #include <common_types.h> -/* This size has to agree with the size _FIR_PARMS_SECTION_SIZE defined in the */ -/* OCC linker command file. */ -#define FIR_PARMS_SECTION_SIZE 0x1000 -// This size has to agree with the size _FIR_HEAP_SECTION_SIZE defined in the -// OCC linker command file. -#define FIR_HEAP_SECTION_SIZE 0x3000 - -enum fir_master -{ - FIR_OCC_NOT_FIR_MASTER = 0x00000000, - FIR_OCC_IS_FIR_MASTER = 0x00000001 -}; - -extern uint8_t G_fir_data_parms[FIR_PARMS_SECTION_SIZE]; -extern uint8_t G_fir_heap[FIR_HEAP_SECTION_SIZE]; -extern uint32_t G_fir_master; - -#define OCC_SET_FIR_MASTER(_fm_t) G_fir_master = _fm_t -#define OCC_IS_FIR_MASTER() (G_fir_master == FIR_OCC_IS_FIR_MASTER) ? TRUE : FALSE #define TPC_GP0_BIT18_PNOR_OWNER_MASK 0x00002000 void fir_data_collect(void); -bool pnor_access_allowed(void); #endif /* _FIR_DATA_COLLECT_H */ diff --git a/src/occ_gpe0/firdata/lpc.c b/src/occ_gpe0/firdata/lpc.c index ffe2b48..6544c44 100644 --- a/src/occ_gpe0/firdata/lpc.c +++ b/src/occ_gpe0/firdata/lpc.c @@ -25,7 +25,6 @@ #include <native.h> #include <lpc.h> -#include <trac_interface.h> #include <scom_util.h> #define LPCHC_FW_SPACE 0xF0000000 /**< LPC Host Controller FW Space */ @@ -198,7 +197,7 @@ errorHndl_t pollComplete(CommandReg_t* i_ctrl, errorHndl_t lpc_read( LpcTransType i_type, uint32_t i_addr, uint8_t* o_data, - size_t i_size ) + uint32_t i_size ) { errorHndl_t l_err = NO_ERROR; int32_t l_addr = 0; @@ -299,7 +298,7 @@ errorHndl_t lpc_read( LpcTransType i_type, errorHndl_t lpc_write( LpcTransType i_type, uint32_t i_addr, uint8_t* i_data, - size_t i_size ) + uint32_t i_size ) { errorHndl_t l_err = NO_ERROR; uint32_t l_addr = 0; diff --git a/src/occ_gpe0/firdata/lpc.h b/src/occ_gpe0/firdata/lpc.h index 177deda..23dbe43 100644 --- a/src/occ_gpe0/firdata/lpc.h +++ b/src/occ_gpe0/firdata/lpc.h @@ -27,7 +27,6 @@ #define _LPC_H #include <native.h> -#include <errl.h> /** * @enum LPC::TransType @@ -41,12 +40,12 @@ typedef enum { errorHndl_t lpc_read( LpcTransType i_type, uint32_t i_addr, uint8_t* o_data, - size_t i_size ); + uint32_t i_size ); errorHndl_t lpc_write( LpcTransType i_type, uint32_t i_addr, uint8_t* i_data, - size_t i_size ); + uint32_t i_size ); uint32_t checkAddr(LpcTransType i_type, uint32_t i_addr); diff --git a/src/occ_gpe0/firdata/native.c b/src/occ_gpe0/firdata/native.c index d214468..0a57867 100644 --- a/src/occ_gpe0/firdata/native.c +++ b/src/occ_gpe0/firdata/native.c @@ -24,12 +24,12 @@ /* IBM_PROLOG_END_TAG */ #include <native.h> -#include <scom.h> -#include <trac.h> +#include <scom_trgt.h> +#include <scom_util.h> -void sleep( SsxInterval i_nanoseconds ) +void sleep( PkInterval i_nanoseconds ) { - ssx_sleep(SSX_NANOSECONDS(i_nanoseconds)); + pk_sleep(PK_NANOSECONDS(i_nanoseconds)); } int TRACE_XSCOM=0; @@ -37,21 +37,23 @@ int TRACE_XSCOM=0; int32_t xscom_read( uint32_t i_address, uint64_t * o_data ) { int32_t rc = SUCCESS; - *o_data = 0; - rc = getscom_ffdc( i_address, o_data, NULL ); + //P9 SCOM logic requires a target. However, if we're here, then it doesn't + //matter which target we pass in, so long as isMaster is true. This will + //allow to take the branch of code that schedules GPE scom job. See + //src/occ_405/firdata/scom_util.c for more info. + SCOM_Trgt_t l_tempTarget; + l_tempTarget.type = TRGT_PROC; + l_tempTarget.isMaster = TRUE; + l_tempTarget.procUnitPos = 0; + + rc = SCOM_getScom(l_tempTarget, i_address, o_data); if ( SUCCESS != rc ) { TRAC_ERR( "SCOM error in xscom_read wrapper, rc=%d", rc ); } - if ( TRACE_XSCOM ) - { - TRACFCOMP( "xscom_read(%08X)=%08X%08X", i_address, - (uint32_t)(*o_data>>32), (uint32_t)(*o_data) ); - } - return rc; } @@ -59,18 +61,21 @@ int32_t xscom_write( uint32_t i_address, uint64_t i_data ) { int32_t rc = SUCCESS; - rc = putscom_ffdc( i_address, i_data, NULL ); + //P9 SCOM logic requires a target. However, if we're here, then it doesn't + //matter which target we pass in, so long as isMaster is true. This will + //allow to take the branch of code that schedules GPE scom job. See + //src/occ_405/firdata/scom_util.c for more info. + SCOM_Trgt_t l_tempTarget; + l_tempTarget.type = TRGT_PROC; + l_tempTarget.isMaster = TRUE; + l_tempTarget.procUnitPos = 0; + + rc = SCOM_putScom(l_tempTarget, i_address, i_data); if ( SUCCESS != rc ) { TRAC_ERR( "SCOM error in xscom_write wrapper, rc=%d", rc ); } - if ( TRACE_XSCOM ) - { - TRACFCOMP( "xscom_write(%08X)=%08X%08X", i_address, - (uint32_t)(i_data>>32), (uint32_t)i_data); - } - return rc; } diff --git a/src/occ_gpe0/firdata/native.h b/src/occ_gpe0/firdata/native.h index dd0daa7..195905d 100644 --- a/src/occ_gpe0/firdata/native.h +++ b/src/occ_gpe0/firdata/native.h @@ -28,32 +28,27 @@ #define _NATIVE_H #include <common_types.h> -#include <trac.h> #ifdef __cplusplus extern "C" { #endif -#include "ssx.h" +#include "pk.h" #ifdef __cplusplus } #endif -#ifndef NO_TRAC_STRINGS - #ifdef FIRD_DEBUG #define TRACDCOMP(frmt,args...) DBG_PRINT(frmt,##args) #else #define TRACDCOMP(frmt,args...) #endif // FIRD_DEBUG -#define TRACFCOMP(frmt,args...) TRACE(&g_des_array[INF_TRACE_DESCRIPTOR],INFO_MRK frmt,##args) - -#else // NO_TRAC_STRINGS - #define TRACDCOMP(frmt,args...) #define TRACFCOMP(frmt,args...) -#endif // NO_TRAC_STRINGS +#define TRAC_IMP(frmt,args...) PK_TRACE(frmt,##args) +#define TRAC_ERR(frmt,args...) PK_TRACE(frmt,##args) +#define TRAC_INF(frmt,args...) PK_TRACE(frmt,##args) typedef uint32_t errorHndl_t; @@ -92,7 +87,7 @@ int32_t xscom_read( uint32_t i_address, uint64_t * o_data ); int32_t xscom_write( uint32_t i_address, uint64_t i_data ); /* Sleep */ -void sleep( SsxInterval i_nanoseconds ); +void sleep( PkInterval i_nanoseconds ); #endif diff --git a/src/occ_gpe0/firdata/pnor_mboxdd.c b/src/occ_gpe0/firdata/pnor_mboxdd.c index 463e950..19aaf5d 100644 --- a/src/occ_gpe0/firdata/pnor_mboxdd.c +++ b/src/occ_gpe0/firdata/pnor_mboxdd.c @@ -115,7 +115,7 @@ errorHndl_t hwInit(pnorMbox_t* i_pnorMbox) errorHndl_t readFlash(pnorMbox_t* i_pnorMbox, uint32_t i_addr, - size_t i_size, + uint32_t i_size, void* o_data) { errorHndl_t l_err = NO_ERROR; @@ -132,7 +132,7 @@ errorHndl_t readFlash(pnorMbox_t* i_pnorMbox, while (i_size) { uint32_t l_lpcAddr; - size_t l_chunkLen; + uint32_t l_chunkLen; l_err = adjustMboxWindow(i_pnorMbox, false, @@ -172,7 +172,7 @@ errorHndl_t readFlash(pnorMbox_t* i_pnorMbox, errorHndl_t writeFlash(pnorMbox_t* i_pnorMbox, uint32_t i_addr, - size_t i_size, + uint32_t i_size, void* i_data) { errorHndl_t l_err = NO_ERROR; @@ -192,7 +192,7 @@ errorHndl_t writeFlash(pnorMbox_t* i_pnorMbox, while (i_size) { uint32_t l_lpcAddr; - size_t l_chunkLen; + uint32_t l_chunkLen; l_err = adjustMboxWindow(i_pnorMbox, true, @@ -257,8 +257,8 @@ errorHndl_t writeFlash(pnorMbox_t* i_pnorMbox, errorHndl_t adjustMboxWindow(pnorMbox_t* i_pnorMbox, bool i_isWrite, uint32_t i_reqAddr, - size_t i_reqSize, uint32_t *o_lpcAddr, - size_t *o_chunkLen) + uint32_t i_reqSize, uint32_t *o_lpcAddr, + uint32_t *o_chunkLen) { errorHndl_t l_err = NO_ERROR; uint32_t l_pos, l_wSize, l_reqSize; @@ -277,7 +277,7 @@ errorHndl_t adjustMboxWindow(pnorMbox_t* i_pnorMbox, (i_pnorMbox->iv_curWindowWrite || !i_isWrite) && i_reqAddr >= i_pnorMbox->iv_curWindowOffset && i_reqAddr < l_wEnd) { - size_t l_gap = (l_wEnd - i_reqAddr); + uint32_t l_gap = (l_wEnd - i_reqAddr); *o_lpcAddr = i_pnorMbox->iv_curWindowLpcOffset + (i_reqAddr - i_pnorMbox->iv_curWindowOffset); @@ -365,7 +365,7 @@ errorHndl_t adjustMboxWindow(pnorMbox_t* i_pnorMbox, return l_err; } -errorHndl_t writeDirty(pnorMbox_t* i_pnorMbox, uint32_t i_addr, size_t i_size) +errorHndl_t writeDirty(pnorMbox_t* i_pnorMbox, uint32_t i_addr, uint32_t i_size) { /* To pass a correct "size" for both protocol versions, we * calculate the block-aligned start and end. diff --git a/src/occ_gpe0/firdata/pnor_mboxdd.h b/src/occ_gpe0/firdata/pnor_mboxdd.h index ab8f05d..6cba61d 100644 --- a/src/occ_gpe0/firdata/pnor_mboxdd.h +++ b/src/occ_gpe0/firdata/pnor_mboxdd.h @@ -79,7 +79,7 @@ errorHndl_t hwInit(pnorMbox_t* i_pnorMbox); */ errorHndl_t readFlash(pnorMbox_t* i_pnorMbox, uint32_t i_addr, - size_t i_size, + uint32_t i_size, void* o_data); /** @@ -93,7 +93,7 @@ errorHndl_t readFlash(pnorMbox_t* i_pnorMbox, */ errorHndl_t writeFlash(pnorMbox_t* i_pnorMbox, uint32_t i_addr, - size_t i_size, + uint32_t i_size, void* i_data); /** @@ -111,9 +111,9 @@ errorHndl_t writeFlash(pnorMbox_t* i_pnorMbox, errorHndl_t adjustMboxWindow(pnorMbox_t* i_pnorMbox, bool i_isWrite, uint32_t i_reqAddr, - size_t i_reqSize, + uint32_t i_reqSize, uint32_t *o_lpcAddr, - size_t *o_chunkLen); + uint32_t *o_chunkLen); /** * @brief Mark a range dirty in a write window @@ -123,7 +123,7 @@ errorHndl_t adjustMboxWindow(pnorMbox_t* i_pnorMbox, * * @return Error from operation */ -errorHndl_t writeDirty(pnorMbox_t* i_pnorMbox, uint32_t i_addr, size_t i_size); +errorHndl_t writeDirty(pnorMbox_t* i_pnorMbox, uint32_t i_addr, uint32_t i_size); /** * @brief Flush all pending dirty data to the flash diff --git a/src/occ_gpe0/firdata/pnor_util.c b/src/occ_gpe0/firdata/pnor_util.c index 2c48179..45c650a 100644 --- a/src/occ_gpe0/firdata/pnor_util.c +++ b/src/occ_gpe0/firdata/pnor_util.c @@ -41,7 +41,7 @@ pnorMbox_t* g_pnorMbox; /* Cache to queue up PNOR writes */ uint8_t g_write_cache[PAGE_PROGRAM_BYTES]; /* Current position of data inside write cache */ -size_t g_write_cache_index = 0; +uint32_t g_write_cache_index = 0; /** * @brief Write 8 bytes of data into PNOR starting @@ -67,10 +67,10 @@ int32_t pnor_write_8B( uint64_t i_data ) a big chunk of data to write. This is more efficient and avoids handling the write boundary of the PP command internally. */ -// size_t cpsz = 9; +// uint32_t cpsz = 9; uint8_t data8[8]; - size_t cpsz = 8; + uint32_t cpsz = 8; if( (g_write_cache_index + cpsz) > PAGE_PROGRAM_BYTES ) { @@ -166,7 +166,7 @@ int32_t PNOR_writeFirData( HOMER_PnorInfo_t i_pnorInfo, uint32_t idx = 0; uint64_t dataChunk = 0; - size_t sz_dataChunk = sizeof(uint64_t); + uint32_t sz_dataChunk = sizeof(uint64_t); /* Add PNOR data 8 bytes at a time. */ for ( idx = 0; idx < i_bufSize; idx += sz_dataChunk ) diff --git a/src/occ_gpe0/firdata/sbe_fifo.c b/src/occ_gpe0/firdata/sbe_fifo.c index 9a2099a..d53834a 100644 --- a/src/occ_gpe0/firdata/sbe_fifo.c +++ b/src/occ_gpe0/firdata/sbe_fifo.c @@ -23,7 +23,6 @@ /* */ /* IBM_PROLOG_END_TAG */ #include "sbe_fifo.h" -#include <trac.h> #include <fsi.h> #include <native.h> diff --git a/src/occ_gpe0/firdata/sbe_fifo.h b/src/occ_gpe0/firdata/sbe_fifo.h index 4194471..193039a 100644 --- a/src/occ_gpe0/firdata/sbe_fifo.h +++ b/src/occ_gpe0/firdata/sbe_fifo.h @@ -66,7 +66,7 @@ struct statusHeader struct ffdc_struct { const void* ptr; - size_t size; + uint32_t size; }; struct fifoPutScomRequest diff --git a/src/occ_gpe0/firdata/scom_util.c b/src/occ_gpe0/firdata/scom_util.c index 7709017..491c213 100644 --- a/src/occ_gpe0/firdata/scom_util.c +++ b/src/occ_gpe0/firdata/scom_util.c @@ -26,16 +26,12 @@ /* Support for SCOM operations */ #include <fsi.h> #include <native.h> -#include <occhw_async.h> -#include "occ_common.h" #include "gpe_export.h" #include <scom_util.h> #include "scom_addr_util.h" #include <sbe_fifo.h> bool G_request_created = FALSE; -GPE_BUFFER(ipc_scom_op_t G_scom_op); -GpeRequest G_request; enum { /*FSI addresses are byte offsets, so need to multiply by 4 @@ -359,50 +355,8 @@ int32_t getscomraw( SCOM_Trgt_t i_chip, uint32_t i_addr, uint64_t * o_val ) { return getFifoScom(&i_chip, i_addr, o_val); } - - if(!G_request_created) //Only need to create request once - { - l_rc = gpe_request_create(&G_request, //Request - &G_async_gpe_queue0, //Queue - IPC_ST_SCOM_OPERATION, //Function ID - &G_scom_op, //GPE arguments - SSX_SECONDS(5), //Timeout - NULL, //Callback function - NULL, //Callback args - ASYNC_REQUEST_BLOCKING); //Options - if(l_rc) - { - TRAC_ERR("getscomraw: failed to create gpe request, rc=0x%08X", l_rc); - return l_rc; - } - else - { - G_request_created = TRUE; - } - } - - //Pack in the request data - G_scom_op.read = TRUE; - G_scom_op.addr = i_addr; - - l_rc = gpe_request_schedule(&G_request); - if(l_rc) - { - TRAC_ERR("getscomraw: failed to schedule gpe request, rc=0x%08X", l_rc); - return l_rc; - } - - //Since it's a blocking request, it should be completed by the time we - //get here. If it's not, then a timeout has occurred. - if(G_request.request.completion_state == ASYNC_REQUEST_STATE_COMPLETE) - { - *o_val = G_scom_op.data; - } - else - { - *o_val = 0; - l_rc = FAIL; - } + *o_val = 0; + l_rc = FAIL; return l_rc; } @@ -423,48 +377,6 @@ int32_t putscomraw( SCOM_Trgt_t i_chip, uint32_t i_addr, uint64_t i_val ) { return putFifoScom(&i_chip, i_addr, i_val); } - - if(!G_request_created) //Only need to create request once - { - l_rc = gpe_request_create(&G_request, //Request - &G_async_gpe_queue0, //Queue - IPC_ST_SCOM_OPERATION, //Function ID - &G_scom_op, //GPE arguments - SSX_SECONDS(5), //Timeout - NULL, //Callback function - NULL, //Callback args - ASYNC_REQUEST_BLOCKING); //Options - if(l_rc) - { - TRAC_ERR("putscomraw gpe request create failed, rc = 0x%08x", l_rc); - return l_rc; - } - else - { - G_request_created = TRUE; - } - } - - //Pack in the request data - G_scom_op.read = FALSE; - G_scom_op.addr = i_addr; - G_scom_op.data = i_val; - - l_rc = gpe_request_schedule(&G_request); - if(l_rc) - { - TRAC_ERR("putscomraw gpe request schedule failed, rc=0x%08X", l_rc); - return l_rc; - } - - //It's a blocking request, so if the request hasn't been completed by this - //time, then a timeout has occurred. - if(G_request.request.completion_state != ASYNC_REQUEST_STATE_COMPLETE) - { - TRAC_ERR("putscomraw gpe request failed to complete, rc = 0x%08x", l_rc); - l_rc = FAIL; - } - return l_rc; } |