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authorWael El-Essawy <welessa@us.ibm.com>2015-10-15 17:14:00 -0500
committerFadi Kassem <fmkassem@us.ibm.com>2015-10-23 10:05:28 -0500
commit52da94bc4351afea3eb8c9d420c1223a3f60e0eb (patch)
tree54c6a3ea154725053895439c49beba3ed313b164 /src/occ_gpe0/apss_init.c
parentec0926884623af9fcfef5cbb9ce2de56fa252344 (diff)
downloadtalos-occ-52da94bc4351afea3eb8c9d420c1223a3f60e0eb.tar.gz
talos-occ-52da94bc4351afea3eb8c9d420c1223a3f60e0eb.zip
Implement busy wait and remove TOD access
1. Implement busy_wait() as an alternative to pk_sleep when APSS code runs in interrupt handlers. 2. Remove the TOD scom register access from the code, since it is not supported in simics yet. 3. Modify the calls to putscom_abs to take in register values rather than a pointer to register values, to be compatible with the new putscom code. 4. Eliminate code that endlessly triggers OCC and other GPEs, and add instead a counter with the number of ticks (250 usec) since last reset. Change-Id: I48414137434dfdc3cc4c038643536c1250fccbf2 RTC: 131177 RTC: 139105 RTC: 137703 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21269 Tested-by: FSP CI Jenkins Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com>
Diffstat (limited to 'src/occ_gpe0/apss_init.c')
-rw-r--r--src/occ_gpe0/apss_init.c28
1 files changed, 14 insertions, 14 deletions
diff --git a/src/occ_gpe0/apss_init.c b/src/occ_gpe0/apss_init.c
index ea40cbf..39aeb79 100644
--- a/src/occ_gpe0/apss_init.c
+++ b/src/occ_gpe0/apss_init.c
@@ -22,7 +22,7 @@ uint32_t apss_start_spi_command(initGpioArgs_t * args, uint8_t i_noWait)
uint64_t regValue = 0x8000000000000000;
// Start SPI transaction
- rc = putscom_abs(SPIPSS_P2S_COMMAND_REG, &regValue);
+ rc = putscom_abs(SPIPSS_P2S_COMMAND_REG, regValue);
if (rc)
{
PK_TRACE("apss_start_spi_command: SPIPSS_P2S_COMMAND_REG putscom failed. rc = 0x%08x",
@@ -32,7 +32,7 @@ uint32_t apss_start_spi_command(initGpioArgs_t * args, uint8_t i_noWait)
else
{
- pk_sleep(PK_MICROSECONDS(5));
+ busy_wait(5);
if (!i_noWait)
{
@@ -85,7 +85,7 @@ void apss_init_gpio(ipc_msg_t* cmd, void* arg)
// Setup the control regs
// frame_size=16, out_count=16, in_delay1=never, in_count2=16
regValue = 0x410FC00004000000;
- rc = putscom_abs(SPIPSS_P2S_CTRL_REG0, &regValue);
+ rc = putscom_abs(SPIPSS_P2S_CTRL_REG0, regValue);
if (rc)
{
PK_TRACE("apss_init_gpio: SPIPSS_P2S_CTRL_REG0 putscom failed. rc = 0x%08x", rc);
@@ -94,7 +94,7 @@ void apss_init_gpio(ipc_msg_t* cmd, void* arg)
}
// bridge_enable, clock_divider=7, 2 frames
regValue = 0x8090400000000000;
- rc = putscom_abs(SPIPSS_P2S_CTRL_REG1, &regValue);
+ rc = putscom_abs(SPIPSS_P2S_CTRL_REG1, regValue);
if (rc)
{
PK_TRACE("apss_init_gpio: SPIPSS_P2S_CTRL_REG1 putscom failed. rc = 0x%08x", rc);
@@ -103,7 +103,7 @@ void apss_init_gpio(ipc_msg_t* cmd, void* arg)
}
// inter_frame_delay=50 (5usec)
regValue = 0x0019000000000000;
- rc = putscom_abs(SPIPSS_P2S_CTRL_REG2, &regValue);
+ rc = putscom_abs(SPIPSS_P2S_CTRL_REG2, regValue);
if (rc)
{
PK_TRACE("apss_init_gpio: SPIPSS_P2S_CTRL_REG2 putscom failed. rc = 0x%08x", rc);
@@ -122,7 +122,7 @@ void apss_init_gpio(ipc_msg_t* cmd, void* arg)
regValue |= 0x4000000000000000;
regValue |= (port << 56);
- rc = putscom_abs(SPIPSS_P2S_WDATA_REG, &regValue);
+ rc = putscom_abs(SPIPSS_P2S_WDATA_REG, regValue);
if (rc)
{
PK_TRACE("apss_init_gpio: SPIPSS_P2S_WDATA_REG putscom failed. value:0x%X. rc = 0x%08x",
@@ -147,7 +147,7 @@ void apss_init_gpio(ipc_msg_t* cmd, void* arg)
regValue |= 0x5000000000000000;
regValue |= (port << 56);
- rc = putscom_abs(SPIPSS_P2S_WDATA_REG, &regValue);
+ rc = putscom_abs(SPIPSS_P2S_WDATA_REG, regValue);
if (rc)
{
PK_TRACE("apss_init_gpio: SPIPSS_P2S_WDATA_REG putscom failed. value:0x%X. rc = 0x%08x",
@@ -171,7 +171,7 @@ void apss_init_gpio(ipc_msg_t* cmd, void* arg)
regValue |= 0x6000000000000000;
regValue |= (port << 56);
- rc = putscom_abs(SPIPSS_P2S_WDATA_REG, &regValue);
+ rc = putscom_abs(SPIPSS_P2S_WDATA_REG, regValue);
if (rc)
{
PK_TRACE("apss_init_gpio: SPIPSS_P2S_WDATA_REG putscom failed. value:0x%X. rc = 0x%08x",
@@ -254,7 +254,7 @@ void apss_init_mode(ipc_msg_t* cmd, void* arg)
// Setup the control regs
// frame_size=16, out_count1=16, in_delay1=never, in_count2=16
regValue = 0x4100000000000000;
- rc = putscom_abs(SPIPSS_P2S_CTRL_REG0, &regValue);
+ rc = putscom_abs(SPIPSS_P2S_CTRL_REG0, regValue);
if (rc)
{
PK_TRACE("apss_init_mode: SPIPSS_P2S_CTRL_REG0 putscom failed. rc = 0x%08x", rc);
@@ -264,7 +264,7 @@ void apss_init_mode(ipc_msg_t* cmd, void* arg)
// bridge_enable, clock_divider=7, 1 frames
regValue = 0x8090000000000000;
- rc = putscom_abs(SPIPSS_P2S_CTRL_REG1, &regValue);
+ rc = putscom_abs(SPIPSS_P2S_CTRL_REG1, regValue);
if (rc)
{
PK_TRACE("apss_init_mode: SPIPSS_P2S_CTRL_REG1 putscom failed. rc = 0x%08x", rc);
@@ -273,7 +273,7 @@ void apss_init_mode(ipc_msg_t* cmd, void* arg)
}
// inter_frame_delay=25 (2.5usec)
regValue = 0x0019000000000000;
- rc = putscom_abs(SPIPSS_P2S_CTRL_REG2, &regValue);
+ rc = putscom_abs(SPIPSS_P2S_CTRL_REG2, regValue);
if (rc)
{
PK_TRACE("apss_init_mode: SPIPSS_P2S_CTRL_REG2 putscom failed. rc = 0x%08x", rc);
@@ -306,7 +306,7 @@ void apss_init_mode(ipc_msg_t* cmd, void* arg)
break;
}
- rc = putscom_abs(SPIPSS_P2S_WDATA_REG, &regValue);
+ rc = putscom_abs(SPIPSS_P2S_WDATA_REG, regValue);
if (rc)
{
PK_TRACE("apss_init_mode: SPIPSS_P2S_WDATA_REG putscom to set MODE failed. value:0x%X. rc = 0x%08x",
@@ -317,7 +317,7 @@ void apss_init_mode(ipc_msg_t* cmd, void* arg)
regValue = 0x8000000000000000;
// Start SPI transaction
- rc = putscom_abs(SPIPSS_P2S_COMMAND_REG, &regValue);
+ rc = putscom_abs(SPIPSS_P2S_COMMAND_REG, regValue);
if (rc)
{
PK_TRACE("apss_init_mode: SPIPSS_P2S_COMMAND_REG putscom failed. rc = 0x%08x",
@@ -326,7 +326,7 @@ void apss_init_mode(ipc_msg_t* cmd, void* arg)
}
//Wait 20usec for apss becoming ready to send out the frame of composite mode
- pk_sleep(PK_MICROSECONDS(20));;
+ busy_wait(20);
}while(0);
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