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authorWilliam Bryan <wilbryan@us.ibm.com>2017-01-16 14:34:53 -0600
committerWilliam A. Bryan <wilbryan@us.ibm.com>2017-02-15 18:50:20 -0500
commit61ebd774170f72a53a838944f6d3204c87638694 (patch)
tree2933c7a03f5f564509f7c69f07d0e449219edb47 /src/occ_405
parent6ff7b2615b6eb6c19f64babf7a724923c12c34b3 (diff)
downloadtalos-occ-61ebd774170f72a53a838944f6d3204c87638694.tar.gz
talos-occ-61ebd774170f72a53a838944f6d3204c87638694.zip
Changes For P9 Enablement
Change-Id: I37e8174bcc6e99f602a66cff077ef41ad889b19c RTC:165351 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34949 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Diffstat (limited to 'src/occ_405')
-rw-r--r--src/occ_405/amec/amec_sensors_fw.c24
-rw-r--r--src/occ_405/dcom/dcomMasterTx.c11
-rw-r--r--src/occ_405/dcom/dcomSlaveRx.c2
-rwxr-xr-xsrc/occ_405/pss/apss.c20
-rwxr-xr-xsrc/occ_405/ssx_app_cfg.h3
-rwxr-xr-xsrc/occ_405/thread/threadSch.c4
-rwxr-xr-xsrc/occ_405/timer/timer.c7
7 files changed, 48 insertions, 23 deletions
diff --git a/src/occ_405/amec/amec_sensors_fw.c b/src/occ_405/amec/amec_sensors_fw.c
index 07b3f5d..2854b8b 100644
--- a/src/occ_405/amec/amec_sensors_fw.c
+++ b/src/occ_405/amec/amec_sensors_fw.c
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2011,2015 */
+/* Contributors Listed Below - COPYRIGHT 2011,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -200,18 +200,20 @@ void amec_update_fw_sensors(void)
}
else if(L_consec_trace_count < MAX_CONSEC_TRACE)
{
- gpe_gpenxiramdbg_t xsr_sprg0;
- gpe_gpenxiramedr_t ir_edr;
- gpe_gpenxidbgpro_t iar_xsr;
+ gpe_gpenxiramdbg_t xsr_sprg0 = {0};
+ gpe_gpenxiramedr_t ir_edr = {0};
+ gpe_gpenxidbgpro_t iar_xsr = {0};
// Reset will eventually be requested due to not having power measurement
// data after X ticks, but add some additional FFDC to the trace that
// will tell us what GPE job is currently executing.
if(!l_gpe0_idle)
{
- xsr_sprg0.value = in64(GPE_GPE0XIRAMDBG);
- ir_edr.value = in64(GPE_GPE0XIRAMEDR);
- iar_xsr.value = in64(GPE_GPE0XIDBGPRO);
+// TODO: Will need to figure out how to get this debug info. Currently causes a machine check
+// when we try to read them.
+// xsr_sprg0.value = in64(GPE_GPE0XIRAMDBG);
+// ir_edr.value = in64(GPE_GPE0XIRAMEDR);
+// iar_xsr.value = in64(GPE_GPE0XIDBGPRO);
TRAC_ERR("GPE0 programs did not complete within one tick. "
"XSR[0x%08x] IAR[0x%08x] IR[0x%08x] EDR[0x%08x]",
iar_xsr.fields.xsr, iar_xsr.fields.iar,
@@ -221,9 +223,11 @@ void amec_update_fw_sensors(void)
}
if(!l_gpe1_idle)
{
- xsr_sprg0.value = in64(GPE_GPE1XIRAMDBG);
- ir_edr.value = in64(GPE_GPE1XIRAMEDR);
- iar_xsr.value = in64(GPE_GPE1XIDBGPRO);
+// TODO: Will need to figure out how to get this debug info. Currently causes a machine check
+// when we try to read them.
+// xsr_sprg0.value = in64(GPE_GPE1XIRAMDBG);
+// ir_edr.value = in64(GPE_GPE1XIRAMEDR);
+// iar_xsr.value = in64(GPE_GPE1XIDBGPRO);
TRAC_ERR("GPE1 programs did not complete within one tick. "
"XSR[0x%08x] IAR[0x%08x] IR[0x%08x] EDR[0x%08x]",
iar_xsr.fields.xsr, iar_xsr.fields.iar,
diff --git a/src/occ_405/dcom/dcomMasterTx.c b/src/occ_405/dcom/dcomMasterTx.c
index de88369..44205a5 100644
--- a/src/occ_405/dcom/dcomMasterTx.c
+++ b/src/occ_405/dcom/dcomMasterTx.c
@@ -80,6 +80,7 @@ uint32_t dcom_build_slv_inbox(void)
uint32_t l_slv_idx = 0;
static uint8_t L_seq = 0xFF;
+ static bool L_traced = FALSE;
L_seq++;
@@ -87,7 +88,15 @@ uint32_t dcom_build_slv_inbox(void)
// interrupt context.
if(G_pbax_rc)
{
- TRAC_INFO("PBAX Send Failure in transimitting multicast doorbell - RC[%08X], packet[%d]", G_pbax_rc, G_pbax_packet);
+ if (!L_traced)
+ {
+ TRAC_INFO("PBAX Send Failure in transimitting multicast doorbell - RC[%08X], packet[%d]", G_pbax_rc, G_pbax_packet);
+ L_traced = TRUE;
+ }
+ }
+ else
+ {
+ L_traced = FALSE;
}
diff --git a/src/occ_405/dcom/dcomSlaveRx.c b/src/occ_405/dcom/dcomSlaveRx.c
index b4bbde8..bff8c09 100644
--- a/src/occ_405/dcom/dcomSlaveRx.c
+++ b/src/occ_405/dcom/dcomSlaveRx.c
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2011,2016 */
+/* Contributors Listed Below - COPYRIGHT 2011,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
diff --git a/src/occ_405/pss/apss.c b/src/occ_405/pss/apss.c
index e979477..76d813c 100755
--- a/src/occ_405/pss/apss.c
+++ b/src/occ_405/pss/apss.c
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2011,2016 */
+/* Contributors Listed Below - COPYRIGHT 2011,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -47,7 +47,7 @@ const apssGpioConfigStruct_t G_gpio_config[2] = { {0x00, 0xFF, 0x00}, {0x00, 0xF
// G_apss_mode_config: system parms needed to select correct mode command options
// Configure streaming of: APSS Mode, 16 ADCs, 2 GPIOs
-const apssModeConfigStruct_t G_apss_mode_config = { APSS_MODE_COMPOSITE, 16, 2 };
+const apssModeConfigStruct_t G_apss_mode_config = { APSS_MODE_AUTO2, 16, 2 };
// Power Measurements (read from APSS every RealTime loop)
apssPwrMeasStruct_t G_apss_pwr_meas = { {0} };
@@ -60,7 +60,7 @@ uint64_t G_gpe_apss_time_end;
// Flag for requesting APSS recovery when OCC detects all zeroes or data out of sync
bool G_apss_recovery_requested = FALSE;
-
+bool G_apss_data_traced = FALSE;
GPE_BUFFER(apss_start_args_t G_gpe_start_pwr_meas_read_args);
GPE_BUFFER(apss_continue_args_t G_gpe_continue_pwr_meas_read_args);
GPE_BUFFER(apss_complete_args_t G_gpe_complete_pwr_meas_read_args);
@@ -152,10 +152,13 @@ void do_apss_recovery(void)
uint64_t l_spi_adc_reset;
uint64_t l_spi_adc_wdata;
-
- INTR_TRAC_ERR("detected invalid power data[%08x%08x]",
+ if (!G_apss_data_traced)
+ {
+ INTR_TRAC_ERR("detected invalid power data[%08x%08x]",
(uint32_t)(G_gpe_continue_pwr_meas_read_args.meas_data[0] >> 32),
(uint32_t)(G_gpe_continue_pwr_meas_read_args.meas_data[0] & 0x00000000ffffffffull));
+ G_apss_data_traced = TRUE;
+ }
do
{
@@ -344,7 +347,8 @@ void task_apss_start_pwr_meas(struct task *i_self)
if(G_apss_recovery_requested)
{
// Do recovery then wait until next tick to do anything more.
- do_apss_recovery();
+// TODO: RTC: 163275 Cannot SCOM from the 405. Move to GPE.
+// do_apss_recovery();
break;
}
@@ -674,6 +678,10 @@ void reformat_meas_data()
G_apss_recovery_requested = TRUE;
break;
}
+ else
+ {
+ G_apss_data_traced = FALSE;
+ }
// Decrement up/down fail counter for backup on success.
if(G_backup_fail_count)
diff --git a/src/occ_405/ssx_app_cfg.h b/src/occ_405/ssx_app_cfg.h
index e6978c0..cf9c47a 100755
--- a/src/occ_405/ssx_app_cfg.h
+++ b/src/occ_405/ssx_app_cfg.h
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -153,6 +153,7 @@ do { \
#endif
// Default initializations for validation that affect SSX and library code
+#define PROCESSOR_EC_LEVEL
#ifndef SIMICS_ENVIRONMENT
#define SIMICS_ENVIRONMENT 0
diff --git a/src/occ_405/thread/threadSch.c b/src/occ_405/thread/threadSch.c
index b768935..025ff4c 100755
--- a/src/occ_405/thread/threadSch.c
+++ b/src/occ_405/thread/threadSch.c
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2011,2016 */
+/* Contributors Listed Below - COPYRIGHT 2011,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -142,7 +142,7 @@ void initThreadScheduler(void)
(void *)0,
(SsxAddress)dcomThreadStack,
THREAD_STACK_SIZE,
- THREAD_PRIORITY_6);
+ THREAD_PRIORITY_4);
// Create the thread scheduler timer
l_timerRc = ssx_timer_create(&G_threadSchTimer, threadSwapcallback, 0);
diff --git a/src/occ_405/timer/timer.c b/src/occ_405/timer/timer.c
index 7893497..d314ae6 100755
--- a/src/occ_405/timer/timer.c
+++ b/src/occ_405/timer/timer.c
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2011,2016 */
+/* Contributors Listed Below - COPYRIGHT 2011,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -255,7 +255,10 @@ void task_poke_watchdogs(struct task * i_self)
//@TODO: remove when PGPE code is integrated, RTC: 163934
if(!G_simics_environment) // PGPE Beacon is not implemented in simics
{
+// TODO: RTC: 163934 Enable this when PGPE beacon is enabled.
+#if 0
check_pgpe_beacon();
+#endif
}
}
@@ -472,6 +475,7 @@ void check_pgpe_beacon(void)
static bool L_pgpe_beacon_unchanged_4ms = false; // pgpe beacon unchanged once (4ms)
static bool L_error_logged = false; // trace and error log only once
errlHndl_t l_err = NULL; // Error handler
+
do
{
// return PGPE Beacon
@@ -503,7 +507,6 @@ void check_pgpe_beacon(void)
// Second time beacon unchanged (8ms), log timeout error
TRAC_ERR("Error PGPE Beacon didn't change for 8 ms: %d",
pgpe_beacon);
-
/*
* @errortype
* @moduleid POKE_WD_TIMERS
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