Merge latest hcode headers into OCC

Change-Id: I1365d14bee48c287fcfd0faab8ba8a1a517e5bcb
RTC: 169886
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38107
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>

11 files changed, 43 insertions, 41 deletions

diff --git a/src/occ_405/amec/amec_freq.c b/src/occ_405/amec/amec_freq.c
index 6b33d1e..06f3e64 100755
--- a/src/occ_405/amec/amec_freq.c
+++ b/src/occ_405/amec/amec_freq.c
@@ -533,18 +533,18 @@ void amec_slv_freq_smh(void)
     uint8_t     quad = 0;       // loop through quads
     uint8_t     core_num = 0;   // core ID
     uint8_t     core_idx = 0;   // loop through cores within each quad
-    Pstate      pmax[MAX_QUADS] = {0}; // max pstate (min frequency) within each quad
+    Pstate      pmax[MAXIMUM_QUADS] = {0}; // max pstate (min frequency) within each quad
     Pstate      pmax_chip = 0;  // highest Pstate (lowest frequency) across all quads
-    bool        l_atLeast1Core[MAX_QUADS] = {FALSE};  // at least 1 core present in quad
-    static bool L_mfg_set_trace[MAX_QUADS] = {FALSE};
-    static bool L_mfg_clear_trace[MAX_QUADS] = {FALSE};
+    bool        l_atLeast1Core[MAXIMUM_QUADS] = {FALSE};  // at least 1 core present in quad
+    static bool L_mfg_set_trace[MAXIMUM_QUADS] = {FALSE};
+    static bool L_mfg_clear_trace[MAXIMUM_QUADS] = {FALSE};
 
     /*------------------------------------------------------------------------*/
     /*  Code                                                                  */
     /*------------------------------------------------------------------------*/
 
     // loop through all quads, get f_requests, translate to pstates and determine pmax across chip
-    for (quad = 0; quad < MAX_QUADS; quad++)
+    for (quad = 0; quad < MAXIMUM_QUADS; quad++)
     {
         for (core_idx=0; core_idx<NUM_CORES_PER_QUAD; core_idx++)  // loop thru all cores in quad
         {
@@ -566,7 +566,7 @@ void amec_slv_freq_smh(void)
     }
 
     // check for mfg quad Pstate request and set Pstate for each quad
-    for (quad = 0; quad < MAX_QUADS; quad++)
+    for (quad = 0; quad < MAXIMUM_QUADS; quad++)
     {
         // set quad with no cores present to lowest frequency for the chip
         if(l_atLeast1Core[quad] == FALSE)
diff --git a/src/occ_405/amec/amec_parm_table.c b/src/occ_405/amec/amec_parm_table.c
index 73291ad..9328e19 100755
--- a/src/occ_405/amec/amec_parm_table.c
+++ b/src/occ_405/amec/amec_parm_table.c
@@ -155,16 +155,16 @@ amec_parm_t g_amec_parm_list[] = {
     AMEC_PARM_UINT16(PARM_VDD_STEP_FROM_START, "vdd_stp_frm_strt", &g_amec_sys.wof.vdd_step_from_start),
     AMEC_PARM_UINT16(PARM_VDN_STEP_FROM_START, "vdn_stp_frm_strt", &g_amec_sys.wof.vdn_step_from_start),
     AMEC_PARM_UINT8(PARM_QUAD_STEP_FROM_START, "quadStpFrmStrt", &g_amec_sys.wof.quad_step_from_start),
-    AMEC_PARM_UINT32_ARRAY(PARM_V_CORE, "v_core_100uV", &g_amec_sys.wof.v_core_100uV, MAX_QUADS),
+    AMEC_PARM_UINT32_ARRAY(PARM_V_CORE, "v_core_100uV", &g_amec_sys.wof.v_core_100uV, MAXIMUM_QUADS),
     AMEC_PARM_UINT32(PARM_CORE_PWR_ON, "core_pwr_on", &g_amec_sys.wof.core_pwr_on),
-    AMEC_PARM_UINT8_ARRAY(PARM_CORES_ON_PER_QUAD, "coreson_per_quad", &g_amec_sys.wof.cores_on_per_quad, MAX_QUADS),
+    AMEC_PARM_UINT8_ARRAY(PARM_CORES_ON_PER_QUAD, "coreson_per_quad", &g_amec_sys.wof.cores_on_per_quad, MAXIMUM_QUADS),
     AMEC_PARM_UINT16(PARM_WOF_DISABLED, "wof_disabled", &g_amec_sys.wof.wof_disabled),
     AMEC_PARM_UINT32(PARM_VOLT_VDD_SENSE, "voltvddsense", &g_amec_sys.wof.voltvddsense_sensor),
     AMEC_PARM_UINT16_ARRAY(PARM_TEMPPROCTHERMC, "tempprocthrmc", &g_amec_sys.wof.tempprocthrmc, MAX_NUM_CORES),
     AMEC_PARM_UINT16(PARM_TEMPNEST, "tempnest_sensor", &g_amec_sys.wof.tempnest_sensor),
-    AMEC_PARM_UINT16_ARRAY(PARM_TEMPQ, "tempq", &g_amec_sys.wof.tempq, MAX_QUADS),
+    AMEC_PARM_UINT16_ARRAY(PARM_TEMPQ, "tempq", &g_amec_sys.wof.tempq, MAXIMUM_QUADS),
     AMEC_PARM_UINT16(PARM_VOLTVDN, "voltvdn_sensor", &g_amec_sys.wof.voltvdn_sensor),
-    AMEC_PARM_UINT8_ARRAY(PARM_QUAD_X_PSTATES, "quad_x_pstates", &g_amec_sys.wof.quad_x_pstates, MAX_QUADS),
+    AMEC_PARM_UINT8_ARRAY(PARM_QUAD_X_PSTATES, "quad_x_pstates", &g_amec_sys.wof.quad_x_pstates, MAXIMUM_QUADS),
     AMEC_PARM_UINT8(PARM_IVRM_STATES, "quad_ivrm_states", &g_amec_sys.wof.quad_ivrm_states),
     AMEC_PARM_UINT32(PARM_IDC_VDD, "idc_vdd", &g_amec_sys.wof.idc_vdd),
     AMEC_PARM_UINT32(PARM_IDC_VDN, "idc_vdn", &g_amec_sys.wof.idc_vdn),
@@ -187,12 +187,12 @@ amec_parm_t g_amec_parm_list[] = {
     AMEC_PARM_UINT8(PARM_VOLTAGE_IDX, "voltage_idx", &g_amec_sys.wof.voltage_idx),
     AMEC_PARM_UINT32(PARM_ALL_CORES_OFF_ISO, "allcores_off_iso", &g_amec_sys.wof.all_cores_off_iso),
     AMEC_PARM_UINT32(PARM_ALL_CACHES_ON_ISO, "allcaches_on_iso", &g_amec_sys.wof.all_caches_on_iso),
-    AMEC_PARM_UINT16_ARRAY(PARM_QUAD_GOOD_CORES_ONLY, "quad_good_cores", &g_amec_sys.wof.quad_good_cores_only, MAX_QUADS),
-    AMEC_PARM_UINT16_ARRAY(PARM_QUAD_ON_CORES, "quad_on_cores", &g_amec_sys.wof.quad_on_cores, MAX_QUADS),
-    AMEC_PARM_UINT16_ARRAY(PARM_QUAD_BAD_OFF_CORES,"quadBadOffCores", &g_amec_sys.wof.quad_on_cores, MAX_QUADS),
+    AMEC_PARM_UINT16_ARRAY(PARM_QUAD_GOOD_CORES_ONLY, "quad_good_cores", &g_amec_sys.wof.quad_good_cores_only, MAXIMUM_QUADS),
+    AMEC_PARM_UINT16_ARRAY(PARM_QUAD_ON_CORES, "quad_on_cores", &g_amec_sys.wof.quad_on_cores, MAXIMUM_QUADS),
+    AMEC_PARM_UINT16_ARRAY(PARM_QUAD_BAD_OFF_CORES,"quadBadOffCores", &g_amec_sys.wof.quad_on_cores, MAXIMUM_QUADS),
     AMEC_PARM_UINT32(PARM_NEST_MULT, "nest_mult", &g_amec_sys.wof.nest_mult),
     AMEC_PARM_UINT32_ARRAY(PARM_CORE_MULT, "core_mult", &g_amec_sys.wof.core_mult, MAX_NUM_CORES),
-    AMEC_PARM_UINT32_ARRAY(PARM_QUAD_MULT, "quad_mult", &g_amec_sys.wof.quad_mult, MAX_QUADS),
+    AMEC_PARM_UINT32_ARRAY(PARM_QUAD_MULT, "quad_mult", &g_amec_sys.wof.quad_mult, MAXIMUM_QUADS),
     AMEC_PARM_INT16(PARM_NEST_DELTA_TEMP, "nest_delta_temp", &g_amec_sys.wof.nest_delta_temp),
     AMEC_PARM_INT16_ARRAY(PARM_CORE_DELTA_TEMP, "core_delta_temp", &g_amec_sys.wof.core_delta_temp, MAX_NUM_CORES),
     AMEC_PARM_INT16_ARRAY(PARM_QUAD_DELTA_TEMP, "quad_delta_temp", &g_amec_sys.wof.quad_delta_temp, MAX_NUM_CORES),
diff --git a/src/occ_405/amec/amec_sys.h b/src/occ_405/amec/amec_sys.h
index 0757466..68fd52a 100755
--- a/src/occ_405/amec/amec_sys.h
+++ b/src/occ_405/amec/amec_sys.h
@@ -438,7 +438,7 @@ typedef struct
   amec_memctl_t  memctl[MAX_NUM_MEM_CONTROLLERS];
   amec_vrm_t     vrm[NUM_PROC_VRMS];
   amec_proc_pwr_votes_t pwr_votes;
-  amec_quad_t    quad[MAX_QUADS];
+  amec_quad_t    quad[MAXIMUM_QUADS];
 
   // Processor Sensors
   sensor_t freqa4ms;
@@ -527,7 +527,7 @@ typedef struct amec_mnfg
     ///memory slewing count
     uint32_t            mem_slew_counter;
     ///Per Quad Pstate request: 0xFF=no request
-    uint8_t             quad_pstate[MAX_QUADS];
+    uint8_t             quad_pstate[MAXIMUM_QUADS];
 } amec_mnfg_t;
 
 //-------------------------------------------------------------
diff --git a/src/occ_405/cmdh/cmdh_mnfg_intf.c b/src/occ_405/cmdh/cmdh_mnfg_intf.c
index a270b76..d6fe0d3 100755
--- a/src/occ_405/cmdh/cmdh_mnfg_intf.c
+++ b/src/occ_405/cmdh/cmdh_mnfg_intf.c
@@ -675,7 +675,7 @@ uint8_t cmdh_mnfg_request_quad_pstate(const cmdh_fsp_cmd_t * i_cmd_ptr,
 
         // Process each quad Pstate request, clip any request to min/max
         // 0xFF has special meaning that OCC is in control
-        for(l_quad = 0; l_quad < MAX_QUADS; l_quad++)
+        for(l_quad = 0; l_quad < MAXIMUM_QUADS; l_quad++)
         {
             l_pstate_request = l_cmd_ptr->quad_pstate_in[l_quad];
             if(l_pstate_request != 0xFF)
diff --git a/src/occ_405/cmdh/cmdh_mnfg_intf.h b/src/occ_405/cmdh/cmdh_mnfg_intf.h
index e96ce0c..d46ce3c 100755
--- a/src/occ_405/cmdh/cmdh_mnfg_intf.h
+++ b/src/occ_405/cmdh/cmdh_mnfg_intf.h
@@ -177,14 +177,14 @@ typedef struct __attribute__ ((packed))
     struct    cmdh_fsp_cmd_header;
     uint8_t   sub_cmd;
     uint8_t   version;
-    uint8_t   quad_pstate_in[MAX_QUADS];
+    uint8_t   quad_pstate_in[MAXIMUM_QUADS];
 }mnfg_quad_pstate_cmd_t;
 
 // Used by OCC firmware to respond to mnfg request quad pstate command
 typedef struct __attribute__ ((packed))
 {
     struct    cmdh_fsp_rsp_header;
-    uint8_t   quad_pstate_out[MAX_QUADS];
+    uint8_t   quad_pstate_out[MAXIMUM_QUADS];
 }mnfg_quad_pstate_rsp_t;
 
 errlHndl_t cmdh_mnfg_test_parse (const cmdh_fsp_cmd_t * i_cmd_ptr,
diff --git a/src/occ_405/occbuildname.c b/src/occ_405/occbuildname.c
index 859144f..d3d243d 100755
--- a/src/occ_405/occbuildname.c
+++ b/src/occ_405/occbuildname.c
@@ -34,6 +34,6 @@ volatile const char G_occ_buildname[16] __attribute__((section(".buildname"))) =
 
 #else
 
-volatile const char G_occ_buildname[16] __attribute__((section(".buildname"))) = /*<BuildName>*/  "op_occ_170322a\0"  /*</BuildName>*/ ;
+volatile const char G_occ_buildname[16] __attribute__((section(".buildname"))) = /*<BuildName>*/  "op_occ_170413a\0"  /*</BuildName>*/ ;
 
 #endif
diff --git a/src/occ_405/pgpe/pgpe_interface.c b/src/occ_405/pgpe/pgpe_interface.c
index bb94efa..0aeee12 100644
--- a/src/occ_405/pgpe/pgpe_interface.c
+++ b/src/occ_405/pgpe/pgpe_interface.c
@@ -585,7 +585,7 @@ int pgpe_set_clip_ranges(Pstate i_pstate)
     Pstate      pmax = i_pstate;
 
     // Set clip bounds
-    for(quad=0; quad<MAX_QUADS; quad++)
+    for(quad=0; quad<MAXIMUM_QUADS; quad++)
     {
         // Minimum pstate
         G_clip_update_parms_ptr->ps_val_clip_min[quad] = pmin;
diff --git a/src/occ_405/proc/proc_data_control.c b/src/occ_405/proc/proc_data_control.c
index 0733e66..a22fd43 100755
--- a/src/occ_405/proc/proc_data_control.c
+++ b/src/occ_405/proc/proc_data_control.c
@@ -109,7 +109,7 @@ void task_core_data_control( task_t * i_task )
 
                 // Only if last clip update sent to PGPE is larger than legacy turbo,
                 // send new clips with legacy turbo values, otherwise, no action needed.
-                for (quad = 0; quad < MAX_QUADS; quad++)
+                for (quad = 0; quad < MAXIMUM_QUADS; quad++)
                 {
                     if(G_clip_update_parms_ptr->ps_val_clip_max[quad] < pclip)
                     {
diff --git a/src/occ_405/state.c b/src/occ_405/state.c
index 36c1ec3..b38b18e 100755
--- a/src/occ_405/state.c
+++ b/src/occ_405/state.c
@@ -590,7 +590,7 @@ errlHndl_t SMGR_observation_to_active()
     Pstate          l_pstate;
 
     // clear mnfg quad pstate request to default OCC to control all quads
-    memset(&g_amec->mnfg_parms.quad_pstate[0], 0xFF, MAX_QUADS);
+    memset(&g_amec->mnfg_parms.quad_pstate[0], 0xFF, MAXIMUM_QUADS);
 
     do
     {
diff --git a/src/occ_405/wof/wof.c b/src/occ_405/wof/wof.c
index 7e3d800..c1ed77b 100644
--- a/src/occ_405/wof/wof.c
+++ b/src/occ_405/wof/wof.c
@@ -587,13 +587,14 @@ void read_shared_sram( void )
 
     // merge the 16-bit power-on field from quad state 0 and the 16-bit power-on
     // field from quad state 1 and save it to amec.
-    g_wof->core_pwr_on =
-                   (((uint32_t)G_quad_state_0.fields.core_poweron_state) << 16)
-                  | ((uint32_t)G_quad_state_1.fields.core_poweron_state);
+    // TODO: core_poweron_state not in new structure
+    //g_wof->core_pwr_on =
+    //               (((uint32_t)G_quad_state_0.fields.core_poweron_state) << 16)
+    //              | ((uint32_t)G_quad_state_1.fields.core_poweron_state);
 
 
     // Clear out current quad pstates
-    memset(g_wof->quad_x_pstates, 0 , MAX_QUADS);
+    memset(g_wof->quad_x_pstates, 0 , MAXIMUM_QUADS);
 
     // Add the quad states to the global quad state array for easy looping.
     g_wof->quad_x_pstates[0] = (uint8_t)G_quad_state_0.fields.quad0_pstate;
@@ -622,7 +623,7 @@ void calculate_core_voltage( void )
     uint32_t l_voltage;
     uint8_t l_quad_mask;
     int l_quad_idx = 0;
-    for(; l_quad_idx < MAX_QUADS; l_quad_idx++)
+    for(; l_quad_idx < MAXIMUM_QUADS; l_quad_idx++)
     {
         // Adjust current mask. (IVRM_STATE_QUAD_MASK = 0x80)
         l_quad_mask = IVRM_STATE_QUAD_MASK >> l_quad_idx;
@@ -731,7 +732,7 @@ void calculate_core_leakage( void )
     // Divide by 6 to get just one quad
     g_wof->idc_quad =
                  G_oppb.iddq.ivdd_all_cores_off_caches_off[l_chip_v_idx] /
-                 MAX_QUADS;
+                 MAXIMUM_QUADS;
 
 
 
@@ -758,7 +759,7 @@ void calculate_core_leakage( void )
               G_oppb.iddq.ivdd_all_good_cores_off_good_caches_on[l_chip_v_idx] -
               g_wof->all_cores_off_iso;
 
-    l_quad_x_cache = g_wof->all_caches_on_iso / MAX_QUADS;
+    l_quad_x_cache = g_wof->all_caches_on_iso / MAXIMUM_QUADS;
 
     // Loop through all Quads and their respective Cores to calculate
     // leakage.
@@ -768,7 +769,7 @@ void calculate_core_leakage( void )
 
 
 
-    for(quad_idx = 0; quad_idx < MAX_QUADS; quad_idx++)
+    for(quad_idx = 0; quad_idx < MAXIMUM_QUADS; quad_idx++)
     {
         if(g_wof->quad_x_pstates[quad_idx] == QUAD_POWERED_OFF)
         {
@@ -935,7 +936,8 @@ void calculate_nest_leakage( void )
     uint32_t nest_mult = calculate_multiplier( nest_delta_temp );
 
     // Save nest leakage to amec structure
-    g_wof->idc_vdn = (G_oppb.iddq.ivdn*nest_mult) >> 10;
+    // TODO: ivdn is now an array and need to handle
+    g_wof->idc_vdn = (G_oppb.iddq.ivdn[0]*nest_mult) >> 10;
 }
 
 
diff --git a/src/occ_405/wof/wof.h b/src/occ_405/wof/wof.h
index ffe3e71..2a680ee 100644
--- a/src/occ_405/wof/wof.h
+++ b/src/occ_405/wof/wof.h
@@ -96,11 +96,11 @@ typedef struct
     // Calculated step from start for quads
     uint8_t quad_step_from_start;
     // Array to hold the core voltages per quad (in 100uV)
-    uint32_t v_core_100uV[MAX_QUADS];
+    uint32_t v_core_100uV[MAXIMUM_QUADS];
     // Bit vector to hold the power on status of all 24 cores
     uint32_t core_pwr_on;
     // Number of cores on per quad
-    uint8_t cores_on_per_quad[MAX_QUADS];
+    uint8_t cores_on_per_quad[MAXIMUM_QUADS];
     // The most recently read value in the sensor VOLTVDDSENSE
     uint32_t voltvddsense_sensor;
     // The most recently read value in the sensor TEMPPROCTHRMCy where y is core num
@@ -108,7 +108,7 @@ typedef struct
     // The most recently read value in the sensor TEMPNEST
     uint16_t tempnest_sensor;
     // The most recently read value in the sensor TEMPQx where x is the quad num
-    uint16_t tempq[MAX_QUADS];
+    uint16_t tempq[MAXIMUM_QUADS];
     // The most recently read value in the sensor CURVDD
     uint16_t curvdd_sensor;
     // The most recently read value in the sensor CURVDN
@@ -116,7 +116,7 @@ typedef struct
     // The most recently read value in the sensor VOLTVDN
     uint16_t voltvdn_sensor;
     // Array to hold the current 1-byte pstate values read from SRAM. 0xFF=off
-    uint8_t  quad_x_pstates[MAX_QUADS];
+    uint8_t  quad_x_pstates[MAXIMUM_QUADS];
     // Bit vector to hold the ivrm states of the quads. 0=BYPASS, 1=REGULATION
     uint8_t  quad_ivrm_states;
     // Contains the estimated core leakage based on temp, voltage, and vpd-leak
@@ -160,17 +160,17 @@ typedef struct
     // Contains the final calculated value of ALL_CACHES_ON_ISO
     uint32_t all_caches_on_iso;
     // Contains good_cores_only (per_quad)
-    uint16_t quad_good_cores_only[MAX_QUADS];
+    uint16_t quad_good_cores_only[MAXIMUM_QUADS];
     // Contains on_cores
-    uint16_t quad_on_cores[MAX_QUADS];
+    uint16_t quad_on_cores[MAXIMUM_QUADS];
     // Contains BAD_OFF_cores
-    uint16_t quad_bad_off_cores[MAX_QUADS];
+    uint16_t quad_bad_off_cores[MAXIMUM_QUADS];
     // Contains the multiplier(m) used in y ~=(T*m)>>10 for nest leak calc
     uint32_t nest_mult;
     // Contains the multiplier(m) used in y ~=(T*m)>>10 for core leak calc 0-23
     uint32_t core_mult[MAX_NUM_CORES];
     // Contains the multiplier(m) used in y ~=(T*m)>>10 for quad leak calc 0-5
-    uint32_t quad_mult[MAX_QUADS];
+    uint32_t quad_mult[MAXIMUM_QUADS];
     // Contains the delta temp used for nest leakage calc (see G_wof_iddq_mult_table)
     // TEMPNEST - tvpd_leak_off
     int16_t nest_delta_temp;
@@ -179,7 +179,7 @@ typedef struct
     int16_t core_delta_temp[MAX_NUM_CORES];
     // Contains the delta temp used for quad leakage calc
     // TEMPQx - tvpd_leak_cache (where x is the quad number)
-    int16_t quad_delta_temp[MAX_QUADS];
+    int16_t quad_delta_temp[MAXIMUM_QUADS];
     // tvpd leak to use when either the core is off, or the entire quad is off
     uint32_t tvpd_leak_off;
     // tvpd leak to use when the core is on