fix rtls and applet address bugs and comment out pmc watchdog register access

In the current OCC phase, many tasks were removed from the global task table
(G_task_table) array, because the OCC code is not ready to schedule them every
tick. A bag was introduced when such entries were commented in the
G_task_table array in the rtes_tables.c file, without removing the
corresponding entries from the corresponding task_id_t enum in the rtls.h
header file.

The result was wrong mapping between the tasks the corresponding function
pointers (func_ptr) entries, and hence, the wrong GPE codes were called
from the OCC via the IPC messages.

A fix was done by eliminating the corresponding task entries from the
task_id_t enum, and remove references to commented out enums,
and hence, the discrepancy between the two structures was resolved.

In addition, the pmc watchdog register, PMC_STATUS_REG @ 0x40010048
used by the OCC for pmc heartbeat on P8 is no longer defined in SIMICS on P9
The code line that accesses this register was commented out, and it should
be later replaced by a new PGPE heartbeat register, when the design is ready.

Also, the initAppletAddr() routine was commented out, since the applet image
header data structure is currently not setup properly in simics.

RTC: 137914
RTC: 135989

Change-Id: I32abf6edfd2536af58b24c97d26eb14902ee6a11
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20975
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Christopher Cain <cjcain@us.ibm.com>
Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com>
Tested-by: Fadi Kassem <fmkassem@us.ibm.com>

1 files changed, 2 insertions, 1 deletions

diff --git a/src/occ_405/timer/timer.c b/src/occ_405/timer/timer.c
index 4f1a7e8..6f435aa 100755
--- a/src/occ_405/timer/timer.c
+++ b/src/occ_405/timer/timer.c
@@ -173,7 +173,8 @@ void task_poke_watchdogs(struct task * i_self)
     // Read the PMC status register on every RTL, this is how the OCC
     // generates a PMC hearbeat.
     pmc_status_reg_t psr;
-    psr.value = in32(PMC_STATUS_REG);
+// TMP: Not Ready yet: PMC => PGPE
+//    psr.value = in32(PMC_STATUS_REG);
 }
 
 // Function Specification