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authorWael El-Essawy <welessa@us.ibm.com>2015-10-06 08:55:31 -0500
committerFadi Kassem <fmkassem@us.ibm.com>2015-10-09 11:06:45 -0500
commit99560f0e46b52c7a432443e7f5832502f1a9e6b2 (patch)
tree9c0d30d11ebe17e37d1eda5508356b3b9b2fb880 /src/occ_405/state.c
parent4cf2e7f9cd54adba2dca1972407bffbfca719b36 (diff)
downloadtalos-occ-99560f0e46b52c7a432443e7f5832502f1a9e6b2.tar.gz
talos-occ-99560f0e46b52c7a432443e7f5832502f1a9e6b2.zip
fix rtls and applet address bugs and comment out pmc watchdog register access
In the current OCC phase, many tasks were removed from the global task table (G_task_table) array, because the OCC code is not ready to schedule them every tick. A bag was introduced when such entries were commented in the G_task_table array in the rtes_tables.c file, without removing the corresponding entries from the corresponding task_id_t enum in the rtls.h header file. The result was wrong mapping between the tasks the corresponding function pointers (func_ptr) entries, and hence, the wrong GPE codes were called from the OCC via the IPC messages. A fix was done by eliminating the corresponding task entries from the task_id_t enum, and remove references to commented out enums, and hence, the discrepancy between the two structures was resolved. In addition, the pmc watchdog register, PMC_STATUS_REG @ 0x40010048 used by the OCC for pmc heartbeat on P8 is no longer defined in SIMICS on P9 The code line that accesses this register was commented out, and it should be later replaced by a new PGPE heartbeat register, when the design is ready. Also, the initAppletAddr() routine was commented out, since the applet image header data structure is currently not setup properly in simics. RTC: 137914 RTC: 135989 Change-Id: I32abf6edfd2536af58b24c97d26eb14902ee6a11 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20975 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher Cain <cjcain@us.ibm.com> Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com> Tested-by: Fadi Kassem <fmkassem@us.ibm.com>
Diffstat (limited to 'src/occ_405/state.c')
-rwxr-xr-xsrc/occ_405/state.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/occ_405/state.c b/src/occ_405/state.c
index b987e91..1e133ad 100755
--- a/src/occ_405/state.c
+++ b/src/occ_405/state.c
@@ -136,9 +136,12 @@ errlHndl_t SMGR_standby_to_observation()
l_error_logged = FALSE; // @at015a
TRAC_IMP("SMGR: Standby to Observation Transition Started");
+// TEMP -- NOT SUPPORTED YET IN PHASE1
+/*
//This flag is set if tmgt sends us at least one data set in the
//mem config data packet. No data sets will be sent for centaur ec less than 2.0
//due to an intermittent hw failure that can occur on those chips.
+
if(G_mem_monitoring_allowed)
{
if(!rtl_task_is_runnable(TASK_ID_CENTAUR_DATA))
@@ -163,7 +166,7 @@ errlHndl_t SMGR_standby_to_observation()
}
}
}
-
+*/
// Set the RTL Flags to indicate which tasks can run
// - Set OBSERVATION b/c we're in OBSERVATION State
rtl_clr_run_mask_deferred(RTL_FLAG_STANDBY);
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