Pstate Infrastructure & Support config data required for active state

- Support all config data required for active state.
- Set 'active ready' bit in poll response when all config data has been received.
- Rewrite & rename proc_gpsm_pstate_initialize() - Delete GPSM, doesn't exist.
- Put in TODO call PGPE to enable pstates this will also be telling PGPE how to
  set PMCR mode register (OCC control pstates or OPAL).
- Initialize globals for fmax, fmin, pmax and mhz_per_pstate with temporary hard
  codes until PGPE is available.
- Call to "proc_pstate_initialize()" moved to state transition to observation
- Cleanup proc_freq2pstate()
- rewrite amec_slv_freq_smh()
  - the calls to proc_set_core_bounds() and proc_set_core_pstate() will be
    replaced with 1 IPC call to the PGPE to set pmin/pmax given all cores
    or set pstate for all given cores.
- Remove all DCM related code.

Change-Id: I449d188b2cffc345afca19717dcbea037f159114
RTC:130224
RTC:150935
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23977
Tested-by: FSP CI Jenkins
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>

1 files changed, 9 insertions, 8 deletions

diff --git a/src/occ_405/state.c b/src/occ_405/state.c
index 5cc0b40..20d711b 100755
--- a/src/occ_405/state.c
+++ b/src/occ_405/state.c
@@ -42,7 +42,6 @@
 #include <fir_data_collect.h>
 #include <dimm.h>
 
-extern proc_gpsm_dcm_sync_occfw_t G_proc_dcm_sync_state;
 extern bool G_mem_monitoring_allowed;
 extern task_t G_task_table[TASK_END];  // Global task table
 
@@ -143,10 +142,14 @@ errlHndl_t SMGR_standby_to_observation()
         rtl_clr_run_mask_deferred(RTL_FLAG_STANDBY);
         rtl_set_run_mask_deferred(RTL_FLAG_OBS);
 
+        // Initialize key freq2pstate Global parameters
+        proc_pstate_initialize();
+
         // Set the actual STATE now that we have finished everything else
         CURRENT_STATE() = OCC_STATE_OBSERVATION;
 
         TRAC_IMP("SMGR: Standby to Observation Transition Completed");
+
     }
     else if(FALSE == l_error_logged)
     {
@@ -223,7 +226,9 @@ errlHndl_t SMGR_observation_to_active()
     int                l_extRc = OCC_NO_EXTENDED_RC;
     int                l_rc = 0;
 
-    // First check to make sure Pstates are enabled. If they aren't, then
+    // Pstates are enabled via an IPC call to PGPE once the OCC reaches the
+    // observation state. We still have to check that the enable_pstates() IPC job
+    // on the PGPE has completed before transitioned to the active state. otherwise,
     // wait TBD seconds in case we are going directly from Standby to Active
     // (pstate init only happens in observation state, so it might not be
     // done yet...must call it in this while loop since it is done in this
@@ -238,8 +243,7 @@ errlHndl_t SMGR_observation_to_active()
     // If we have all data we need to go to active state, but don't have pstates
     // enabled yet...then we will do the aforementioned wait
     if(((DATA_get_present_cnfgdata() & SMGR_VALIDATE_DATA_ACTIVE_MASK) ==
-            SMGR_VALIDATE_DATA_ACTIVE_MASK)
-        && !proc_is_hwpstate_enabled() )
+        SMGR_VALIDATE_DATA_ACTIVE_MASK))
     {
         SsxTimebase start = ssx_timebase_get();
         while( ! proc_is_hwpstate_enabled() )
@@ -249,9 +253,7 @@ errlHndl_t SMGR_observation_to_active()
             {
                 if(FALSE == l_error_logged)
                 {
-                    TRAC_ERR("SMGR: Timeout waiting for Pstates to be enabled, master state=%d, slave state=%d, pmc_mode[%08x], chips_present[%02x], pmc_deconfig[%08x]",
-                            G_proc_dcm_sync_state.sync_state_master,
-                            G_proc_dcm_sync_state.sync_state_slave,
+                    TRAC_ERR("SMGR: Timeout waiting for Pstates to be enabled, pmc_mode[%08x], chips_present[%02x], pmc_deconfig[%08x]",
                             in32(PMC_MODE_REG),
                             G_sysConfigData.is_occ_present,
                             in32(PMC_CORE_DECONFIGURATION_REG));
@@ -259,7 +261,6 @@ errlHndl_t SMGR_observation_to_active()
                 l_extRc = ERC_GENERIC_TIMEOUT;
                 break;
             }
-            proc_gpsm_dcm_sync_enable_pstates_smh();
             ssx_sleep(SSX_MICROSECONDS(500));
         }
         if(proc_is_hwpstate_enabled() && G_sysConfigData.system_type.kvm)