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| author | William Bryan <wilbryan@us.ibm.com> | 2018-01-03 12:30:29 -0600 |
|---|---|---|
| committer | William A. Bryan <wilbryan@us.ibm.com> | 2018-03-27 11:57:42 -0400 |
| commit | bd605ba0a030b3490f0edebd8fb704722b6eab0d (patch) | |
| tree | 34fc7b10f06fef7baf9d101f78b816a6129753d8 /src/occ_405/sensor/sensor_enum.h | |
| parent | c8538f3c894d5f28f688f7a081507c3ef14d6c24 (diff) | |
| download | talos-occ-bd605ba0a030b3490f0edebd8fb704722b6eab0d.tar.gz talos-occ-bd605ba0a030b3490f0edebd8fb704722b6eab0d.zip | |
Memory Throttle Sensors
RTC:131184
Change-Id: I2582a1eb9d599f700182f17047cc95accad03725
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51407
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Diffstat (limited to 'src/occ_405/sensor/sensor_enum.h')
| -rwxr-xr-x | src/occ_405/sensor/sensor_enum.h | 45 |
1 files changed, 19 insertions, 26 deletions
diff --git a/src/occ_405/sensor/sensor_enum.h b/src/occ_405/sensor/sensor_enum.h index 433530e..51439b1 100755 --- a/src/occ_405/sensor/sensor_enum.h +++ b/src/occ_405/sensor/sensor_enum.h @@ -5,7 +5,7 @@ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2011,2017 */ +/* Contributors Listed Below - COPYRIGHT 2011,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -351,31 +351,6 @@ enum e_gsid NUTILC22, NUTILC23, - MSTLC0, - MSTLC1, - MSTLC2, - MSTLC3, - MSTLC4, - MSTLC5, - MSTLC6, - MSTLC7, - MSTLC8, - MSTLC9, - MSTLC10, - MSTLC11, - MSTLC12, - MSTLC13, - MSTLC14, - MSTLC15, - MSTLC16, - MSTLC17, - MSTLC18, - MSTLC19, - MSTLC20, - MSTLC21, - MSTLC22, - MSTLC23, - TEMPC0, TEMPC1, TEMPC2, @@ -497,6 +472,24 @@ enum e_gsid MWRM6, MWRM7, + MEMSPM0, + MEMSPM1, + MEMSPM2, + MEMSPM3, + MEMSPM4, + MEMSPM5, + MEMSPM6, + MEMSPM7, + + MEMSPSTATM0, + MEMSPSTATM1, + MEMSPSTATM2, + MEMSPSTATM3, + MEMSPSTATM4, + MEMSPSTATM5, + MEMSPSTATM6, + MEMSPSTATM7, + MIRCM0, MIRCM1, MIRCM2, |
