Pstates Support in OCC

1. Initialize Pstates global parameters (G_proc_fmax, G_proc_fmin,
G_khz_per_pstate and G_proc_pmin from the OCC Pstate Parameter
Block)

2. When frequency config data packet is received and OCC is NOT
already in Active state:  Send IPC command to PGPE to set pState
clips to be wide open from min frequency to turbo
First verify min/max frequency from TMGT is within what
PGPE allows saved in G_proc_fmax and G_proc_fmin if not
within bounds trace and clip to G_proc_fmax/fmin)

3. Transition to active state:  Send IPC command to PGPE to start
pState protocol (give correct data for OCC vs OPAL in control of
Pstates) and if OPAL system update OPAL shared memory with Pstate
information.

4. amec_slv_freq_smh():  Send IPC command to PGPE to set requested
pState (PowerVM) or set clips (OPAL).

5. Address all the TODO/TEMP/#if 0 in amec_freq.c  either remove
or add RTC# for when it will be addressed

Change-Id: Ic323321b8c66945732a6b7345ad85d6f41a62edd
RTC: 130201
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33704
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>

3 files changed, 28 insertions, 28 deletions

diff --git a/src/occ_405/rtls/rtls.h b/src/occ_405/rtls/rtls.h
index 6da6825..8babaab 100755
--- a/src/occ_405/rtls/rtls.h
+++ b/src/occ_405/rtls/rtls.h
@@ -53,11 +53,11 @@ typedef enum {
     TASK_ID_DCOM_TX_OUTBX,
     TASK_ID_MISC_405_CHECKS,       // Miscellaneous checks to be done by 405
     TASK_ID_DCOM_PARSE_FW_MSG,
-    TASK_ID_AMEC_SLAVE,             // AMEC SMH tasks
-    TASK_ID_AMEC_MASTER,            // AMEC SMH tasks
-//    TASK_ID_CORE_DATA_CONTROL,    // TODO RTC: 163365
+    TASK_ID_AMEC_SLAVE,            // AMEC SMH tasks
+    TASK_ID_AMEC_MASTER,           // AMEC SMH tasks
+    TASK_ID_CORE_DATA_CONTROL,
 //    TASK_ID_GPU_SM,                 // GPU State Machine TODO RTC: 133824
-    TASK_ID_DIMM_SM,                // DIMM State Machine
+    TASK_ID_DIMM_SM,               // DIMM State Machine
     TASK_ID_MEMORY_CONTROL,        // Memory (centaur/dimm) control task
     TASK_ID_NEST_DTS,
     TASK_END  // This must always be the last enum in this list,
diff --git a/src/occ_405/rtls/rtls_service_codes.h b/src/occ_405/rtls/rtls_service_codes.h
index 5aab728..44f20d8 100755
--- a/src/occ_405/rtls/rtls_service_codes.h
+++ b/src/occ_405/rtls/rtls_service_codes.h
@@ -30,12 +30,13 @@
 
 enum rtlsModuleId
 {
-    RTLS_OCB_INIT_MOD           = RTLS_COMP_ID | 0x00,
-    RTLS_DO_TICK_MOD            = RTLS_COMP_ID | 0x01,
-    RTLS_START_TASK_MOD         = RTLS_COMP_ID | 0x02,
-    RTLS_STOP_TASK_MOD          = RTLS_COMP_ID | 0x03,
-    RTLS_TASK_RUNABLE_MOD       = RTLS_COMP_ID | 0x04,
-    RTLS_SET_TASK_DATA_MOD      = RTLS_COMP_ID | 0x05,
+    RTLS_OCB_INIT_MOD                 = RTLS_COMP_ID | 0x00,
+    RTLS_DO_TICK_MOD                  = RTLS_COMP_ID | 0x01,
+    RTLS_START_TASK_MOD               = RTLS_COMP_ID | 0x02,
+    RTLS_STOP_TASK_MOD                = RTLS_COMP_ID | 0x03,
+    RTLS_TASK_RUNABLE_MOD             = RTLS_COMP_ID | 0x04,
+    RTLS_SET_TASK_DATA_MOD            = RTLS_COMP_ID | 0x05,
+    RTLS_TASK_CORE_DATA_CONTROL_MOD   = RTLS_COMP_ID | 0x06,
 };
 
 #endif /* #ifndef _RTLS_SERVICE_CODES_H_ */
diff --git a/src/occ_405/rtls/rtls_tables.c b/src/occ_405/rtls/rtls_tables.c
index b7b1a4c..fdcce40 100755
--- a/src/occ_405/rtls/rtls_tables.c
+++ b/src/occ_405/rtls/rtls_tables.c
@@ -113,8 +113,7 @@ task_t G_task_table[TASK_END] = {
     { FLAGS_DCOM_PARSE_OCC_FW_MSG, task_dcom_parse_occfwmsg,       NULL },  // TASK_ID_DCOM_PARSE_FW_MSG
     { FLAGS_AMEC_SLAVE,            task_amec_slave,                NULL },  // TASK_ID_AMEC_SLAVE
     { FLAGS_AMEC_MASTER,           task_amec_master,               NULL },  // TASK_ID_AMEC_MASTER
-// TODO RTC: 163365 - /proc/ and /pss/ "TODO" cleanup
-//    { FLAGS_CORE_DATA_CONTROL,     task_core_data_control,         NULL },  // TASK_ID_CORE_DATA_CONTROL
+    { FLAGS_CORE_DATA_CONTROL,     task_core_data_control,         NULL },  // TASK_ID_CORE_DATA_CONTROL
 // TODO RTC: 133824 - New GPU interface via main memory and SMBUS
 //    { FLAGS_GPU_SM,                task_gpu_sm,                    NULL },  // TASK_ID_GPU_SM
     { FLAGS_MEMORY_DATA,           task_dimm_sm,                   NULL },  // TASK_ID_DIMM_SM
@@ -130,7 +129,7 @@ const uint8_t G_tick0_seq[] = {
                                 TASK_ID_CORE_DATA_HIGH,
                                 TASK_ID_APSS_DONE,
                                 TASK_ID_MEMORY_CONTROL,
-                                //TASK_ID_CORE_DATA_CONTROL,
+                                TASK_ID_CORE_DATA_CONTROL,
                                 TASK_ID_DCOM_WAIT_4_MSTR,
                                 TASK_ID_DCOM_RX_INBX,
                                 TASK_ID_DCOM_RX_OUTBX,
@@ -149,7 +148,7 @@ const uint8_t G_tick1_seq[] = {
                                 TASK_ID_APSS_CONT,
                                 TASK_ID_APSS_DONE,
                                 TASK_ID_MEMORY_CONTROL,
-                                //TASK_ID_CORE_DATA_CONTROL,
+                                TASK_ID_CORE_DATA_CONTROL,
                                 TASK_ID_DCOM_WAIT_4_MSTR,
                                 TASK_ID_DCOM_RX_INBX,
                                 TASK_ID_DCOM_RX_OUTBX,
@@ -170,7 +169,7 @@ const uint8_t G_tick2_seq[] = {
                                 TASK_ID_CORE_DATA_HIGH,
                                 TASK_ID_APSS_DONE,
                                 TASK_ID_MEMORY_CONTROL,
-                                //TASK_ID_CORE_DATA_CONTROL,
+                                TASK_ID_CORE_DATA_CONTROL,
                                 TASK_ID_DCOM_WAIT_4_MSTR,
                                 TASK_ID_DCOM_RX_INBX,
                                 TASK_ID_DCOM_RX_OUTBX,
@@ -190,7 +189,7 @@ const uint8_t G_tick3_seq[] = {
                                 TASK_ID_CORE_DATA_HIGH,
                                 TASK_ID_APSS_DONE,
                                 TASK_ID_MEMORY_CONTROL,
-                                //TASK_ID_CORE_DATA_CONTROL,
+                                TASK_ID_CORE_DATA_CONTROL,
                                 TASK_ID_DCOM_WAIT_4_MSTR,
                                 TASK_ID_DCOM_RX_INBX,
                                 TASK_ID_DCOM_RX_OUTBX,
@@ -210,7 +209,7 @@ const uint8_t G_tick4_seq[] = {
                                 TASK_ID_CORE_DATA_HIGH,
                                 TASK_ID_APSS_DONE,
                                 TASK_ID_MEMORY_CONTROL,
-                                //TASK_ID_CORE_DATA_CONTROL,
+                                TASK_ID_CORE_DATA_CONTROL,
                                 TASK_ID_DCOM_WAIT_4_MSTR,
                                 TASK_ID_DCOM_RX_INBX,
                                 TASK_ID_DCOM_RX_OUTBX,
@@ -229,7 +228,7 @@ const uint8_t G_tick5_seq[] = {
                                 TASK_ID_APSS_CONT,
                                 TASK_ID_APSS_DONE,
                                 TASK_ID_MEMORY_CONTROL,
-                                //TASK_ID_CORE_DATA_CONTROL,
+                                TASK_ID_CORE_DATA_CONTROL,
                                 TASK_ID_DCOM_WAIT_4_MSTR,
                                 TASK_ID_DCOM_RX_INBX,
                                 TASK_ID_DCOM_RX_OUTBX,
@@ -249,7 +248,7 @@ const uint8_t G_tick6_seq[] = {
                                 TASK_ID_CORE_DATA_HIGH,
                                 TASK_ID_APSS_DONE,
                                 TASK_ID_MEMORY_CONTROL,
-                                //TASK_ID_CORE_DATA_CONTROL,
+                                TASK_ID_CORE_DATA_CONTROL,
                                 TASK_ID_DCOM_WAIT_4_MSTR,
                                 TASK_ID_DCOM_RX_INBX,
                                 TASK_ID_DCOM_RX_OUTBX,
@@ -268,7 +267,7 @@ const uint8_t G_tick7_seq[] = {
                                 TASK_ID_CORE_DATA_HIGH,
                                 TASK_ID_APSS_DONE,
                                 TASK_ID_MEMORY_CONTROL,
-                                //TASK_ID_CORE_DATA_CONTROL,
+                                TASK_ID_CORE_DATA_CONTROL,
                                 TASK_ID_DCOM_WAIT_4_MSTR,
                                 TASK_ID_DCOM_RX_INBX,
                                 TASK_ID_DCOM_RX_OUTBX,
@@ -288,7 +287,7 @@ const uint8_t G_tick8_seq[] = {
                                 TASK_ID_CORE_DATA_HIGH,
                                 TASK_ID_APSS_DONE,
                                 TASK_ID_MEMORY_CONTROL,
-                                //TASK_ID_CORE_DATA_CONTROL,
+                                TASK_ID_CORE_DATA_CONTROL,
                                 TASK_ID_DCOM_WAIT_4_MSTR,
                                 TASK_ID_DCOM_RX_INBX,
                                 TASK_ID_DCOM_RX_OUTBX,
@@ -307,7 +306,7 @@ const uint8_t G_tick9_seq[] = {
                                 TASK_ID_APSS_CONT,
                                 TASK_ID_APSS_DONE,
                                 TASK_ID_MEMORY_CONTROL,
-                                //TASK_ID_CORE_DATA_CONTROL,
+                                TASK_ID_CORE_DATA_CONTROL,
                                 TASK_ID_DCOM_WAIT_4_MSTR,
                                 TASK_ID_DCOM_RX_INBX,
                                 TASK_ID_DCOM_RX_OUTBX,
@@ -328,7 +327,7 @@ const uint8_t G_tick10_seq[] = {
                                 TASK_ID_CORE_DATA_HIGH,
                                 TASK_ID_APSS_DONE,
                                 TASK_ID_MEMORY_CONTROL,
-                                //TASK_ID_CORE_DATA_CONTROL,
+                                TASK_ID_CORE_DATA_CONTROL,
                                 TASK_ID_DCOM_WAIT_4_MSTR,
                                 TASK_ID_DCOM_RX_INBX,
                                 TASK_ID_DCOM_RX_OUTBX,
@@ -347,7 +346,7 @@ const uint8_t G_tick11_seq[] = {
                                 TASK_ID_CORE_DATA_HIGH,
                                 TASK_ID_APSS_DONE,
                                 TASK_ID_MEMORY_CONTROL,
-                                //TASK_ID_CORE_DATA_CONTROL,
+                                TASK_ID_CORE_DATA_CONTROL,
                                 TASK_ID_DCOM_WAIT_4_MSTR,
                                 TASK_ID_DCOM_RX_INBX,
                                 TASK_ID_DCOM_RX_OUTBX,
@@ -367,7 +366,7 @@ const uint8_t G_tick12_seq[] = {
                                 TASK_ID_CORE_DATA_HIGH,
                                 TASK_ID_APSS_DONE,
                                 TASK_ID_MEMORY_CONTROL,
-                                //TASK_ID_CORE_DATA_CONTROL,
+                                TASK_ID_CORE_DATA_CONTROL,
                                 TASK_ID_DCOM_WAIT_4_MSTR,
                                 TASK_ID_DCOM_RX_INBX,
                                 TASK_ID_DCOM_RX_OUTBX,
@@ -386,7 +385,7 @@ const uint8_t G_tick13_seq[] = {
                                 TASK_ID_APSS_CONT,
                                 TASK_ID_APSS_DONE,
                                 TASK_ID_MEMORY_CONTROL,
-                                //TASK_ID_CORE_DATA_CONTROL,
+                                TASK_ID_CORE_DATA_CONTROL,
                                 TASK_ID_DCOM_WAIT_4_MSTR,
                                 TASK_ID_DCOM_RX_INBX,
                                 TASK_ID_DCOM_RX_OUTBX,
@@ -406,7 +405,7 @@ const uint8_t G_tick14_seq[] = {
                                 TASK_ID_CORE_DATA_HIGH,
                                 TASK_ID_APSS_DONE,
                                 TASK_ID_MEMORY_CONTROL,
-                                //TASK_ID_CORE_DATA_CONTROL,
+                                TASK_ID_CORE_DATA_CONTROL,
                                 TASK_ID_DCOM_WAIT_4_MSTR,
                                 TASK_ID_DCOM_RX_INBX,
                                 TASK_ID_DCOM_RX_OUTBX,
@@ -425,7 +424,7 @@ const uint8_t G_tick15_seq[] = {
                                 TASK_ID_CORE_DATA_HIGH,
                                 TASK_ID_APSS_DONE,
                                 TASK_ID_MEMORY_CONTROL,
-                                //TASK_ID_CORE_DATA_CONTROL,
+                                TASK_ID_CORE_DATA_CONTROL,
                                 TASK_ID_DCOM_WAIT_4_MSTR,
                                 TASK_ID_DCOM_RX_INBX,
                                 TASK_ID_DCOM_RX_OUTBX,