Fix Ping Pong and HOMER addresses, usign new P9 pba_region default value.

The new P9 pba_region field in the PBA_MODE register is now 0b10
contrary to the P8 pba_region setting of 0b00.

Addresses have been corrected for Ping Pong communications,
HOMER Host Data, Sapphire Table, and HTMGT send and receive Buffers.

Replaced Sapphire legacy term with OPAL.

Defined COMMON_BASE_ADDRESS, and offset addresses relative to it.

modified HOMER_HD_OFFSET, OCC_HTMGT_CMD_OFFSET_HOMER,
OCC_HTMGT_RSP_OFFSET_HOMER, and OPAL_OFFSET_HOMER according
to new P9 specifications.

Change-Id: Ib233181c4ad1837b57c45144d1256b87799dc5bc
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24085
Tested-by: FSP CI Jenkins
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>

3 files changed, 55 insertions, 55 deletions

diff --git a/src/occ_405/proc/proc_data_control.c b/src/occ_405/proc/proc_data_control.c
index 9f55d91..c68b422 100755
--- a/src/occ_405/proc/proc_data_control.c
+++ b/src/occ_405/proc/proc_data_control.c
@@ -220,12 +220,12 @@ void task_core_data_control( task_t * i_task )
         G_core_data_control_parms.config = (uint64_t) (((uint64_t) G_present_hw_cores) << 32);
         if(G_sysConfigData.system_type.kvm)
         {
-            //Set the chiplet bounds (pmax/pmin) only on sapphire
+            //Set the chiplet bounds (pmax/pmin) only on opal
             G_core_data_control_parms.select = GPE_SET_PSTATES_PMBR;
         }
         else
         {
-            //Set the chiplet pstate request on non-sapphire systems
+            //Set the chiplet pstate request on non-opal systems
             G_core_data_control_parms.select = GPE_SET_PSTATES_PMCR;
         }
 
diff --git a/src/occ_405/proc/proc_pstate.c b/src/occ_405/proc/proc_pstate.c
index a52132a..1d4d65e 100755
--- a/src/occ_405/proc/proc_pstate.c
+++ b/src/occ_405/proc/proc_pstate.c
@@ -38,6 +38,7 @@
 #include "proc_data.h"
 #include "proc_pstate.h"
 #include "scom.h"
+#include "homer.h"
 
 // GPSM DCM Synchronization States
 typedef enum
@@ -74,8 +75,8 @@ int8_t   G_proc_gpst_pmax = 0;
 // Remembers if we are a DCM, for DCOM's sake
 bool G_isDcm      = FALSE;
 
-// Used for Sapphire
-DMA_BUFFER( sapphire_table_t G_sapphire_table ) = {{0}};
+// Used for OPAL
+DMA_BUFFER( opal_table_t G_opal_table ) = {{0}};
 
 //KVM throttle reason coming from the frequency voting box.
 extern uint8_t G_amec_kvm_throt_reason;
@@ -571,11 +572,11 @@ void proc_pstate_kvm_setup()
         TRAC_IMP("pmin clip pstate = %d, pmax clip pstate = %d", prbr.fields.pmin_rail, prbr.fields.pmax_rail);
         out32(PMC_RAIL_BOUNDS_REGISTER, prbr.value);
 
-        // Initialize the sapphire table in SRAM (sets valid bit)
-        populate_pstate_to_sapphire_tbl();
+        // Initialize the opal table in SRAM (sets valid bit)
+        populate_pstate_to_opal_tbl();
 
         // copy sram image into mainstore HOMER
-        populate_sapphire_tbl_to_mem();
+        populate_opal_tbl_to_mem();
         TRAC_IMP("proc_pstate_kvm_setup: RUNNING IN KVM MODE");
     }while(0);
 
@@ -919,46 +920,46 @@ void proc_gpsm_dcm_sync_enable_pstates_smh(void)
 
 // Function Specification
 //
-// Name:  populate_pstate_to_sapphire_tbl
+// Name:  populate_pstate_to_opal_tbl
 //
 // Description:
 //
 // End Function Specification
-void populate_pstate_to_sapphire_tbl()
+void populate_pstate_to_opal_tbl()
 {
     uint8_t i = 0;
     GlobalPstateTable * l_gpst_ptr = NULL;
 
-    memset(&G_sapphire_table, 0, sizeof(sapphire_table_t));
+    memset(&G_opal_table, 0, sizeof(opal_table_t));
 
     l_gpst_ptr = gpsm_gpst();
     const int8_t l_pmax = (int8_t) l_gpst_ptr->pmin + l_gpst_ptr->entries - 1;
-    G_sapphire_table.config.valid = 1; // default 0x01
-    G_sapphire_table.config.version = 1; // default 0x01
-    G_sapphire_table.config.throttle = NO_THROTTLE; // default 0x00
-    G_sapphire_table.config.pmin = gpst_pmin(&G_global_pstate_table)+1; //Per David Du, we must use pmin+1 to avoid gpsa hang
-    G_sapphire_table.config.pnominal = (int8_t)proc_freq2pstate(G_sysConfigData.sys_mode_freq.table[OCC_MODE_NOMINAL]);
-    G_sapphire_table.config.pmax = gpst_pmax(&G_global_pstate_table);
-    const uint16_t l_entries = G_sapphire_table.config.pmax - G_sapphire_table.config.pmin + 1;
+    G_opal_table.config.valid = 1; // default 0x01
+    G_opal_table.config.version = 1; // default 0x01
+    G_opal_table.config.throttle = NO_THROTTLE; // default 0x00
+    G_opal_table.config.pmin = gpst_pmin(&G_global_pstate_table)+1; //Per David Du, we must use pmin+1 to avoid gpsa hang
+    G_opal_table.config.pnominal = (int8_t)proc_freq2pstate(G_sysConfigData.sys_mode_freq.table[OCC_MODE_NOMINAL]);
+    G_opal_table.config.pmax = gpst_pmax(&G_global_pstate_table);
+    const uint16_t l_entries = G_opal_table.config.pmax - G_opal_table.config.pmin + 1;
     const uint8_t l_idx = l_gpst_ptr->entries-1;
 
     for (i = 0; i < l_entries; i++)
     {
-        G_sapphire_table.data[i].pstate = (int8_t) l_pmax - i;
-        G_sapphire_table.data[i].flag = 0; // default 0x00
+        G_opal_table.data[i].pstate = (int8_t) l_pmax - i;
+        G_opal_table.data[i].flag = 0; // default 0x00
         if (i < l_gpst_ptr->entries)
         {
-            G_sapphire_table.data[i].evid_vdd = l_gpst_ptr->pstate[i].fields.evid_vdd;
-            G_sapphire_table.data[i].evid_vcs = l_gpst_ptr->pstate[i].fields.evid_vcs;
+            G_opal_table.data[i].evid_vdd = l_gpst_ptr->pstate[i].fields.evid_vdd;
+            G_opal_table.data[i].evid_vcs = l_gpst_ptr->pstate[i].fields.evid_vcs;
         }
         else
         {
             // leave the VDD & VCS Vids the same as the "Pstate Table Pmin"
-            G_sapphire_table.data[i].evid_vdd = l_gpst_ptr->pstate[l_idx].fields.evid_vdd;
-            G_sapphire_table.data[i].evid_vcs = l_gpst_ptr->pstate[l_idx].fields.evid_vcs;
+            G_opal_table.data[i].evid_vdd = l_gpst_ptr->pstate[l_idx].fields.evid_vdd;
+            G_opal_table.data[i].evid_vcs = l_gpst_ptr->pstate[l_idx].fields.evid_vcs;
         }
         // extrapolate the frequency
-        G_sapphire_table.data[i].freq_khz = l_gpst_ptr->pstate0_frequency_khz + (G_sapphire_table.data[i].pstate * l_gpst_ptr->frequency_step_khz);
+        G_opal_table.data[i].freq_khz = l_gpst_ptr->pstate0_frequency_khz + (G_opal_table.data[i].pstate * l_gpst_ptr->frequency_step_khz);
     }
 }
 
@@ -966,12 +967,12 @@ void populate_pstate_to_sapphire_tbl()
 
 // Function Specification
 //
-// Name:  populate_sapphire_tbl_to_mem
+// Name:  populate_opal_tbl_to_mem
 //
 // Description:
 //
 // End Function Specification
-void populate_sapphire_tbl_to_mem()
+void populate_opal_tbl_to_mem()
 {
     int l_ssxrc = SSX_OK;
     uint32_t l_reasonCode = 0;
@@ -979,14 +980,13 @@ void populate_sapphire_tbl_to_mem()
 
     do
     {
-#define SAPPHIRE_OFFSET_IN_HOMER 0x001F8000
         BceRequest pba_copy;
         // Set up copy request
         l_ssxrc = bce_request_create(&pba_copy,                          // block copy object
                                      &G_pba_bcue_queue,                  // sram to mainstore copy engine
-                                     SAPPHIRE_OFFSET_IN_HOMER,           // mainstore address
-                                     (uint32_t) &G_sapphire_table,       // sram starting address
-                                     (size_t) sizeof(G_sapphire_table),  // size of copy
+                                     OPAL_ADDRESS_HOMER,             // mainstore address
+                                     (uint32_t) &G_opal_table,       // sram starting address
+                                     (size_t) sizeof(G_opal_table),  // size of copy
                                      SSX_WAIT_FOREVER,                   // no timeout
                                      NULL,                               // call back
                                      NULL,                               // call back arguments
@@ -995,7 +995,7 @@ void populate_sapphire_tbl_to_mem()
 
         if(l_ssxrc != SSX_OK)
         {
-            TRAC_ERR("populate_sapphire_tbl_to_mem: PBA request create failure rc=[%08X]", -l_ssxrc);
+            TRAC_ERR("populate_opal_tbl_to_mem: PBA request create failure rc=[%08X]", -l_ssxrc);
             /*
              * @errortype
              * @moduleid    MAIN_STATE_TRANSITION_MID
@@ -1014,7 +1014,7 @@ void populate_sapphire_tbl_to_mem()
 
         if(l_ssxrc != SSX_OK)
         {
-            TRAC_ERR("populate_sapphire_tbl_to_mem: PBA request schedule failure rc=[%08X]", -l_ssxrc);
+            TRAC_ERR("populate_opal_tbl_to_mem: PBA request schedule failure rc=[%08X]", -l_ssxrc);
             /*
              * @errortype
              * @moduleid    MAIN_STATE_TRANSITION_MID
@@ -1052,13 +1052,13 @@ void populate_sapphire_tbl_to_mem()
 
 // Function Specification
 //
-// Name: proc_check_for_sapphire_updates
+// Name: proc_check_for_opal_updates
 //
-// Description: Checks if the sapphire table needs an update
+// Description: Checks if the opal table needs an update
 //              and updates if necessary.
 //
 // End Function Specification
-void proc_check_for_sapphire_updates()
+void proc_check_for_opal_updates()
 {
     uint8_t l_latest_throttle_reason;
 
@@ -1073,12 +1073,12 @@ void proc_check_for_sapphire_updates()
     }
 
     //If the throttle reason changed, update it in the HOMER
-    if(G_sapphire_table.config.throttle != l_latest_throttle_reason)
+    if(G_opal_table.config.throttle != l_latest_throttle_reason)
     {
-        TRAC_INFO("proc_check_for_sapphire_updates: throttle reason changed to %d", l_latest_throttle_reason);
-        G_sapphire_table.config.throttle = l_latest_throttle_reason;
-        G_sapphire_table.config.version = 1; // default 0x01
-        G_sapphire_table.config.valid = 1; //default 0x01
-        populate_sapphire_tbl_to_mem();
+        TRAC_INFO("proc_check_for_opal_updates: throttle reason changed to %d", l_latest_throttle_reason);
+        G_opal_table.config.throttle = l_latest_throttle_reason;
+        G_opal_table.config.version = 1; // default 0x01
+        G_opal_table.config.valid = 1; //default 0x01
+        populate_opal_tbl_to_mem();
     }
 }
diff --git a/src/occ_405/proc/proc_pstate.h b/src/occ_405/proc/proc_pstate.h
index b8be793..8ca02ea 100755
--- a/src/occ_405/proc/proc_pstate.h
+++ b/src/occ_405/proc/proc_pstate.h
@@ -59,7 +59,7 @@ typedef struct __attribute__ ((packed))
     int8_t               pnominal;
     int8_t               pmax;
     uint16_t             spare;
-} sapphire_config_t;
+} opal_config_t;
 
 typedef struct __attribute__ ((packed))
 {
@@ -68,17 +68,17 @@ typedef struct __attribute__ ((packed))
     uint8_t              evid_vdd;
     uint8_t              evid_vcs;
     uint32_t             freq_khz;
-} sapphire_data_t; 
+} opal_data_t;
 
 #define PSTATE_ENTRY_NUMBER 256
 // This size must be a multiple of 128
 typedef struct __attribute__ ((packed))
 {
-    sapphire_config_t    config;
+    opal_config_t        config;
     uint64_t             reserved;
-    sapphire_data_t      data[PSTATE_ENTRY_NUMBER];
+    opal_data_t          data[PSTATE_ENTRY_NUMBER];
     uint8_t              pad[112];
-} sapphire_table_t __attribute__ ((aligned (128)));
+} opal_table_t __attribute__ ((aligned (128)));
 
 enum {
     NO_THROTTLE = 0x00,
@@ -89,11 +89,11 @@ enum {
     OCC_RESET = 0x05,
 }; 
 
-//extern GlobalPstateTable G_global_pstate_table; 
+//extern GlobalPstateTable G_global_pstate_table;
 
-extern uint32_t    G_mhz_per_pstate;            
+extern uint32_t    G_mhz_per_pstate;
 
-extern sapphire_table_t G_sapphire_table;       
+extern opal_table_t G_opal_table;
 
 // Initialize PState Table
 // TEMP -- PstateSuperStructure no longer exists
@@ -122,12 +122,12 @@ inline bool proc_is_dcm();
 // Helper function to determine if we are in HW Pstate mode
 inline bool proc_is_hwpstate_enabled(void);
 
-// Copy pstate data to sapphire table
-void populate_pstate_to_sapphire_tbl();
+// Copy pstate data to opal table
+void populate_pstate_to_opal_tbl();
 
-// Copy sapphire table to mainstore memory at SAPPHIRE_OFFSET_IN_HOMER
-void populate_sapphire_tbl_to_mem(); 
+// Copy opal table to mainstore memory at OPAL_OFFSET_HOMER
+void populate_opal_tbl_to_mem();
 
-// Check if sapphire table needs update
-void proc_check_for_sapphire_updates();
+// Check if opal table needs update
+void proc_check_for_opal_updates();
 #endif