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| author | William Bryan <wilbryan@us.ibm.com> | 2016-04-26 21:20:00 -0500 |
|---|---|---|
| committer | William A. Bryan <wilbryan@us.ibm.com> | 2016-08-26 16:44:47 -0400 |
| commit | c184079818cd001b5fd7664ca974ee721c576522 (patch) | |
| tree | ac70f716a10c24d6ef63b7d9b4a46af8b1fe74cc /src/occ_405/occ_sys_config.h | |
| parent | 9600645dd82bfde4f5bc71ddc578bdab914efa14 (diff) | |
| download | talos-occ-c184079818cd001b5fd7664ca974ee721c576522.tar.gz talos-occ-c184079818cd001b5fd7664ca974ee721c576522.zip | |
EMPATH Sensor Counters
RTC:148388
Change-Id: Iae66cd0a73032fa908eb96a149d4163397c2e275
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27781
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Diffstat (limited to 'src/occ_405/occ_sys_config.h')
| -rwxr-xr-x | src/occ_405/occ_sys_config.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/occ_405/occ_sys_config.h b/src/occ_405/occ_sys_config.h index ec5e9aa..ae52556 100755 --- a/src/occ_405/occ_sys_config.h +++ b/src/occ_405/occ_sys_config.h @@ -1,11 +1,11 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: src/occ/occ_sys_config.h $ */ +/* $Source: src/occ_405/occ_sys_config.h $ */ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2011,2015 */ +/* Contributors Listed Below - COPYRIGHT 2011,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -39,7 +39,7 @@ #define MAX_NUM_OCC 4 #define MAX_NUM_NODES 4 #define MAX_NUM_CORES 24 -#define MAX_THREADS_PER_CORE 8 +#define MAX_THREADS_PER_CORE 4 #define MAX_NUM_CHIP_MODULES 4 #define MAX_NUM_POWER_SUPPLIES 4 #define MAX_NUM_MEM_CONTROLLERS 8 @@ -55,8 +55,8 @@ #define UPPER_LIMIT_PROC_FREQ_MHZ 6000 -//Number of samples per second for performance-related algorithms (e.g. UTIL2MSP0Cy) -#define AMEC_DPS_SAMPLING_RATE 500 +//Number of samples per second for performance-related algorithms (e.g. UTIL4MSP0Cy) +#define AMEC_DPS_SAMPLING_RATE 250 //Time interval for averaging utilization and frequency (IPS algorithm) #define AMEC_IPS_AVRG_INTERVAL 3 |
