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| author | mbroyles <mbroyles@us.ibm.com> | 2017-08-06 19:08:00 -0500 |
|---|---|---|
| committer | William A. Bryan <wilbryan@us.ibm.com> | 2017-08-14 15:18:26 -0400 |
| commit | 8a335d83ed938f05f95ca1cfdbbb5292053ed51f (patch) | |
| tree | bd2b38c6df596f3d3bf9f70f8a54a8a205e4e2e1 /src/occ_405/occ_service_codes.h | |
| parent | 71b5f68da8b725f9c5251261b41fd824e652e491 (diff) | |
| download | talos-occ-8a335d83ed938f05f95ca1cfdbbb5292053ed51f.tar.gz talos-occ-8a335d83ed938f05f95ca1cfdbbb5292053ed51f.zip | |
Initial 405 GPU support
Change-Id: I6e957ca1aa643d257274e99957df5b15ac8c889b
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44254
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Diffstat (limited to 'src/occ_405/occ_service_codes.h')
| -rw-r--r-- | src/occ_405/occ_service_codes.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/src/occ_405/occ_service_codes.h b/src/occ_405/occ_service_codes.h index b036921..310e76a 100644 --- a/src/occ_405/occ_service_codes.h +++ b/src/occ_405/occ_service_codes.h @@ -86,6 +86,14 @@ enum occReasonCode PCAP_THROTTLE_POWER_LIMIT = 0x61, /// Firmware Failure: equivalent to assertion failures INTERNAL_FW_FAILURE = 0xA0, + + /// Error with GPU tasks + GPU_FAILURE = 0xA1, + /// GPU core reached error threshold + GPU_ERROR_TEMP = 0xA2, + /// GPU memory reached error threshold + GPU_MEMORY_ERROR_TEMP = 0xA3, + /// Failure within the OCC Complex of the processor INTERNAL_HW_FAILURE = 0xB0, /// OCC GPE halted due to checkstop @@ -135,6 +143,7 @@ enum occReasonCode INVALID_FREQUENCY = 0xDE, WOF_RE_ENABLED = 0xDF, + // NOTE: 0xE0 - 0xEF can NOT be used these are reserved for critical // OCC errors. (H)TMGT will be looking for 0xEy ERRL_RC in cmd response RC // and create an OCC error log with OCC component ID and 0xEy RC if found @@ -272,6 +281,16 @@ enum occExtReasonCode ERC_SMGR_NO_VALID_MODE_TRANSITION_CALL = 0x00E0, ERC_SMGR_NO_VALID_STATE_TRANSITION_CALL = 0x00E1, + ERC_GPU_COMPLETE_FAILURE = 0x00F0, + ERC_GPU_SCHEDULE_FAILURE = 0x00F1, + ERC_GPU_RESET_FAILURE = 0x00F2, + ERC_GPU_RESET_TIMEOUT = 0x00F3, + ERC_GPU_READ_TEMP_TIMEOUT = 0x00F4, + ERC_GPU_READ_MEM_TEMP_TIMEOUT = 0x00F5, + ERC_GPU_READ_MEM_TEMP_CAPABLE_FAILURE = 0x00F6, + ERC_GPU_INVALID_GPU_OPERATION = 0x00F7, + ERC_GPU_NO_GPE_SUPPORT = 0x00FF, + ERC_STATE_FROM_ALL_TO_STB_FAILURE = 0x0123, ERC_STATE_FROM_ACT_TO_CHR_FAILURE = 0x0124, ERC_STATE_FROM_CHR_TO_ACT_FAILURE = 0x0125, |
