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author | Chris Cain <cjcain@us.ibm.com> | 2017-01-10 14:32:13 -0600 |
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committer | Christopher J. Cain <cjcain@us.ibm.com> | 2017-01-18 18:40:21 -0500 |
commit | 6089fe0e7580b1c5030d1f380b1bc91c293e8bb9 (patch) | |
tree | 274c7e5e0c6a3214fd4c792266fbe8a396fa23d8 /src/occ_405/main.c | |
parent | 4141b5f5fef2ba4b444aabbda1677e7f583cd4e8 (diff) | |
download | talos-occ-6089fe0e7580b1c5030d1f380b1bc91c293e8bb9.tar.gz talos-occ-6089fe0e7580b1c5030d1f380b1bc91c293e8bb9.zip |
AVS Bus divider, loadline and misc changes
- validate CRC in cmd response
- read current / voltage on alternating ticks (commands on both bus for each tick)
- calculate chip power (with loadline) and power for each tick
- update divider value for bus speed
- add error history counters and add them to logs
Change-Id: I33bce916dc2dffef6a6d616633a5f1266d7baa7e
RTC: 163992
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34947
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Diffstat (limited to 'src/occ_405/main.c')
-rwxr-xr-x | src/occ_405/main.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/src/occ_405/main.c b/src/occ_405/main.c index 7023233..fdbe9f3 100755 --- a/src/occ_405/main.c +++ b/src/occ_405/main.c @@ -110,6 +110,9 @@ bool G_fir_collection_required = FALSE; // Global flag indicating we are running on Simics bool G_simics_environment = FALSE; +// Nest frequency in MHz +uint32_t G_nest_frequency_mhz; + extern uint8_t g_trac_inf_buffer[]; extern uint8_t g_trac_imp_buffer[]; extern uint8_t g_trac_err_buffer[]; @@ -1261,14 +1264,14 @@ int main(int argc, char **argv) // all HOMER versions. uint32_t l_tb_freq_hz = 0; l_homerrc2 = homer_hd_map_read_unmap(HOMER_NEST_FREQ, - &l_tb_freq_hz, + &G_nest_frequency_mhz, &l_ssxrc2); if ((HOMER_SUCCESS == l_homerrc2) || (HOMER_SSX_UNMAP_ERR == l_homerrc2)) { // Data is in Mhz upon return and needs to be converted to Hz and then // quartered. - l_tb_freq_hz = (l_tb_freq_hz * 1000000)/4; + l_tb_freq_hz = G_nest_frequency_mhz * (1000000 / 4); // @TODO: this parameter should be passsed to all the GPEs/CMEs/etc // Can be stored in GPE accessible SRAM areas. @@ -1277,6 +1280,7 @@ int main(int argc, char **argv) else { l_tb_freq_hz = PPC405_TIMEBASE_HZ; + G_nest_frequency_mhz = (l_tb_freq_hz * 4) / 1000000; } CHECKPOINT(SSX_STARTING); |