diff options
| author | Chris Cain <cjcain@us.ibm.com> | 2017-04-27 19:12:54 -0500 |
|---|---|---|
| committer | Christopher J. Cain <cjcain@us.ibm.com> | 2017-04-28 15:49:55 -0400 |
| commit | 43b9907f1a84be57f678de6f496c3f7d05c0c40b (patch) | |
| tree | 61156b671ec757981331bd7f96cdd329b8336d4f /src/occ_405/main.c | |
| parent | eb9cdf57261295ee7c4c745acce6e15653bfa857 (diff) | |
| download | talos-occ-43b9907f1a84be57f678de6f496c3f7d05c0c40b.tar.gz talos-occ-43b9907f1a84be57f678de6f496c3f7d05c0c40b.zip | |
Add PBAX queue error handling and throttle of APSS failure traces
Change-Id: I3ee189b1088ff48ab9743233c1a05072730699b9
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39790
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Diffstat (limited to 'src/occ_405/main.c')
| -rwxr-xr-x | src/occ_405/main.c | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/src/occ_405/main.c b/src/occ_405/main.c index 2b8affc..10baabe 100755 --- a/src/occ_405/main.c +++ b/src/occ_405/main.c @@ -952,17 +952,17 @@ bool read_ppmr_header(void) * * End Function Specification */ -bool read_oppb_params(const OCCPstateParmBlock* oppb_offset) +bool read_oppb_params() { int l_ssxrc = SSX_OK; uint32_t l_reasonCode = 0; uint32_t l_extReasonCode = OCC_NO_EXTENDED_RC; uint32_t userdata1 = 0; uint32_t userdata2 = 0; + const uint32_t oppb_address = PPMR_ADDRESS_HOMER + G_ppmr_header.oppb_offset; - MAIN_TRAC_INFO("read_oppb_params(0x%08X)", PPMR_ADDRESS_HOMER + oppb_offset); - create_tlb_entry(((uint32_t)PPMR_ADDRESS_HOMER + (uint32_t)oppb_offset), - sizeof(OCCPstateParmBlock)); + MAIN_TRAC_INFO("read_oppb_params(0x%08X)", oppb_address); + create_tlb_entry(oppb_address, sizeof(OCCPstateParmBlock)); do{ // use block copy engine to read the OPPB header @@ -971,8 +971,7 @@ bool read_oppb_params(const OCCPstateParmBlock* oppb_offset) // Set up a copy request l_ssxrc = bce_request_create(&pba_copy, // block copy object &G_pba_bcde_queue, // mainstore to sram copy engine - (uint32_t)PPMR_ADDRESS_HOMER + - (uint32_t)oppb_offset, // mainstore address + oppb_address, // mainstore address (uint32_t) &G_oppb, // sram starting address (size_t) sizeof(OCCPstateParmBlock), // size of copy SSX_WAIT_FOREVER, // no timeout @@ -1122,7 +1121,7 @@ void read_hcode_headers() CHECKPOINT(PPMR_IMAGE_HEADER_READ); // Read OCC pstates parameter block - if (read_oppb_params((OCCPstateParmBlock*)G_ppmr_header.oppb_offset) == FALSE) break; + if (read_oppb_params() == FALSE) break; CHECKPOINT(OPPB_IMAGE_HEADER_READ); // Read PGPE header file, extract OCC/PGPE Shared SRAM address and size, |
