Merge latest hcode headers into OCC

Change-Id: I1365d14bee48c287fcfd0faab8ba8a1a517e5bcb
RTC: 169886
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38107
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>

3 files changed, 16 insertions, 16 deletions

diff --git a/src/occ_405/amec/amec_freq.c b/src/occ_405/amec/amec_freq.c
index 6b33d1e..06f3e64 100755
--- a/src/occ_405/amec/amec_freq.c
+++ b/src/occ_405/amec/amec_freq.c
@@ -533,18 +533,18 @@ void amec_slv_freq_smh(void)
     uint8_t     quad = 0;       // loop through quads
     uint8_t     core_num = 0;   // core ID
     uint8_t     core_idx = 0;   // loop through cores within each quad
-    Pstate      pmax[MAX_QUADS] = {0}; // max pstate (min frequency) within each quad
+    Pstate      pmax[MAXIMUM_QUADS] = {0}; // max pstate (min frequency) within each quad
     Pstate      pmax_chip = 0;  // highest Pstate (lowest frequency) across all quads
-    bool        l_atLeast1Core[MAX_QUADS] = {FALSE};  // at least 1 core present in quad
-    static bool L_mfg_set_trace[MAX_QUADS] = {FALSE};
-    static bool L_mfg_clear_trace[MAX_QUADS] = {FALSE};
+    bool        l_atLeast1Core[MAXIMUM_QUADS] = {FALSE};  // at least 1 core present in quad
+    static bool L_mfg_set_trace[MAXIMUM_QUADS] = {FALSE};
+    static bool L_mfg_clear_trace[MAXIMUM_QUADS] = {FALSE};
 
     /*------------------------------------------------------------------------*/
     /*  Code                                                                  */
     /*------------------------------------------------------------------------*/
 
     // loop through all quads, get f_requests, translate to pstates and determine pmax across chip
-    for (quad = 0; quad < MAX_QUADS; quad++)
+    for (quad = 0; quad < MAXIMUM_QUADS; quad++)
     {
         for (core_idx=0; core_idx<NUM_CORES_PER_QUAD; core_idx++)  // loop thru all cores in quad
         {
@@ -566,7 +566,7 @@ void amec_slv_freq_smh(void)
     }
 
     // check for mfg quad Pstate request and set Pstate for each quad
-    for (quad = 0; quad < MAX_QUADS; quad++)
+    for (quad = 0; quad < MAXIMUM_QUADS; quad++)
     {
         // set quad with no cores present to lowest frequency for the chip
         if(l_atLeast1Core[quad] == FALSE)
diff --git a/src/occ_405/amec/amec_parm_table.c b/src/occ_405/amec/amec_parm_table.c
index 73291ad..9328e19 100755
--- a/src/occ_405/amec/amec_parm_table.c
+++ b/src/occ_405/amec/amec_parm_table.c
@@ -155,16 +155,16 @@ amec_parm_t g_amec_parm_list[] = {
     AMEC_PARM_UINT16(PARM_VDD_STEP_FROM_START, "vdd_stp_frm_strt", &g_amec_sys.wof.vdd_step_from_start),
     AMEC_PARM_UINT16(PARM_VDN_STEP_FROM_START, "vdn_stp_frm_strt", &g_amec_sys.wof.vdn_step_from_start),
     AMEC_PARM_UINT8(PARM_QUAD_STEP_FROM_START, "quadStpFrmStrt", &g_amec_sys.wof.quad_step_from_start),
-    AMEC_PARM_UINT32_ARRAY(PARM_V_CORE, "v_core_100uV", &g_amec_sys.wof.v_core_100uV, MAX_QUADS),
+    AMEC_PARM_UINT32_ARRAY(PARM_V_CORE, "v_core_100uV", &g_amec_sys.wof.v_core_100uV, MAXIMUM_QUADS),
     AMEC_PARM_UINT32(PARM_CORE_PWR_ON, "core_pwr_on", &g_amec_sys.wof.core_pwr_on),
-    AMEC_PARM_UINT8_ARRAY(PARM_CORES_ON_PER_QUAD, "coreson_per_quad", &g_amec_sys.wof.cores_on_per_quad, MAX_QUADS),
+    AMEC_PARM_UINT8_ARRAY(PARM_CORES_ON_PER_QUAD, "coreson_per_quad", &g_amec_sys.wof.cores_on_per_quad, MAXIMUM_QUADS),
     AMEC_PARM_UINT16(PARM_WOF_DISABLED, "wof_disabled", &g_amec_sys.wof.wof_disabled),
     AMEC_PARM_UINT32(PARM_VOLT_VDD_SENSE, "voltvddsense", &g_amec_sys.wof.voltvddsense_sensor),
     AMEC_PARM_UINT16_ARRAY(PARM_TEMPPROCTHERMC, "tempprocthrmc", &g_amec_sys.wof.tempprocthrmc, MAX_NUM_CORES),
     AMEC_PARM_UINT16(PARM_TEMPNEST, "tempnest_sensor", &g_amec_sys.wof.tempnest_sensor),
-    AMEC_PARM_UINT16_ARRAY(PARM_TEMPQ, "tempq", &g_amec_sys.wof.tempq, MAX_QUADS),
+    AMEC_PARM_UINT16_ARRAY(PARM_TEMPQ, "tempq", &g_amec_sys.wof.tempq, MAXIMUM_QUADS),
     AMEC_PARM_UINT16(PARM_VOLTVDN, "voltvdn_sensor", &g_amec_sys.wof.voltvdn_sensor),
-    AMEC_PARM_UINT8_ARRAY(PARM_QUAD_X_PSTATES, "quad_x_pstates", &g_amec_sys.wof.quad_x_pstates, MAX_QUADS),
+    AMEC_PARM_UINT8_ARRAY(PARM_QUAD_X_PSTATES, "quad_x_pstates", &g_amec_sys.wof.quad_x_pstates, MAXIMUM_QUADS),
     AMEC_PARM_UINT8(PARM_IVRM_STATES, "quad_ivrm_states", &g_amec_sys.wof.quad_ivrm_states),
     AMEC_PARM_UINT32(PARM_IDC_VDD, "idc_vdd", &g_amec_sys.wof.idc_vdd),
     AMEC_PARM_UINT32(PARM_IDC_VDN, "idc_vdn", &g_amec_sys.wof.idc_vdn),
@@ -187,12 +187,12 @@ amec_parm_t g_amec_parm_list[] = {
     AMEC_PARM_UINT8(PARM_VOLTAGE_IDX, "voltage_idx", &g_amec_sys.wof.voltage_idx),
     AMEC_PARM_UINT32(PARM_ALL_CORES_OFF_ISO, "allcores_off_iso", &g_amec_sys.wof.all_cores_off_iso),
     AMEC_PARM_UINT32(PARM_ALL_CACHES_ON_ISO, "allcaches_on_iso", &g_amec_sys.wof.all_caches_on_iso),
-    AMEC_PARM_UINT16_ARRAY(PARM_QUAD_GOOD_CORES_ONLY, "quad_good_cores", &g_amec_sys.wof.quad_good_cores_only, MAX_QUADS),
-    AMEC_PARM_UINT16_ARRAY(PARM_QUAD_ON_CORES, "quad_on_cores", &g_amec_sys.wof.quad_on_cores, MAX_QUADS),
-    AMEC_PARM_UINT16_ARRAY(PARM_QUAD_BAD_OFF_CORES,"quadBadOffCores", &g_amec_sys.wof.quad_on_cores, MAX_QUADS),
+    AMEC_PARM_UINT16_ARRAY(PARM_QUAD_GOOD_CORES_ONLY, "quad_good_cores", &g_amec_sys.wof.quad_good_cores_only, MAXIMUM_QUADS),
+    AMEC_PARM_UINT16_ARRAY(PARM_QUAD_ON_CORES, "quad_on_cores", &g_amec_sys.wof.quad_on_cores, MAXIMUM_QUADS),
+    AMEC_PARM_UINT16_ARRAY(PARM_QUAD_BAD_OFF_CORES,"quadBadOffCores", &g_amec_sys.wof.quad_on_cores, MAXIMUM_QUADS),
     AMEC_PARM_UINT32(PARM_NEST_MULT, "nest_mult", &g_amec_sys.wof.nest_mult),
     AMEC_PARM_UINT32_ARRAY(PARM_CORE_MULT, "core_mult", &g_amec_sys.wof.core_mult, MAX_NUM_CORES),
-    AMEC_PARM_UINT32_ARRAY(PARM_QUAD_MULT, "quad_mult", &g_amec_sys.wof.quad_mult, MAX_QUADS),
+    AMEC_PARM_UINT32_ARRAY(PARM_QUAD_MULT, "quad_mult", &g_amec_sys.wof.quad_mult, MAXIMUM_QUADS),
     AMEC_PARM_INT16(PARM_NEST_DELTA_TEMP, "nest_delta_temp", &g_amec_sys.wof.nest_delta_temp),
     AMEC_PARM_INT16_ARRAY(PARM_CORE_DELTA_TEMP, "core_delta_temp", &g_amec_sys.wof.core_delta_temp, MAX_NUM_CORES),
     AMEC_PARM_INT16_ARRAY(PARM_QUAD_DELTA_TEMP, "quad_delta_temp", &g_amec_sys.wof.quad_delta_temp, MAX_NUM_CORES),
diff --git a/src/occ_405/amec/amec_sys.h b/src/occ_405/amec/amec_sys.h
index 0757466..68fd52a 100755
--- a/src/occ_405/amec/amec_sys.h
+++ b/src/occ_405/amec/amec_sys.h
@@ -438,7 +438,7 @@ typedef struct
   amec_memctl_t  memctl[MAX_NUM_MEM_CONTROLLERS];
   amec_vrm_t     vrm[NUM_PROC_VRMS];
   amec_proc_pwr_votes_t pwr_votes;
-  amec_quad_t    quad[MAX_QUADS];
+  amec_quad_t    quad[MAXIMUM_QUADS];
 
   // Processor Sensors
   sensor_t freqa4ms;
@@ -527,7 +527,7 @@ typedef struct amec_mnfg
     ///memory slewing count
     uint32_t            mem_slew_counter;
     ///Per Quad Pstate request: 0xFF=no request
-    uint8_t             quad_pstate[MAX_QUADS];
+    uint8_t             quad_pstate[MAXIMUM_QUADS];
 } amec_mnfg_t;
 
 //-------------------------------------------------------------