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authorWael El-Essawy <welessa@us.ibm.com>2017-03-22 10:30:48 -0500
committerWael El-Essawy <welessa@us.ibm.com>2017-05-10 13:53:16 -0400
commitcf2258322bb72a2cd868f8eaef25e9a665077f4f (patch)
treef7a9b13ef36943246377ff623ed917fa4fd08ada /src/occ_405/amec
parentff3b5a1c08389bf766de21adcd033e3c7b86af87 (diff)
downloadtalos-occ-cf2258322bb72a2cd868f8eaef25e9a665077f4f.tar.gz
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Memory Power Control when entering and exiting IPS (Idle Power Save)
memory power control settings for IPS/default modes - as defined by memory config data packet version 0x21 - are applied to memory power control registers of all configured ports whenever the OCC enters/exits IPS, respectively. Change-Id: I56514bb8cbab80c6d4877edc74db96f3b011e523 RTC: 165546 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38294 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
Diffstat (limited to 'src/occ_405/amec')
-rw-r--r--src/occ_405/amec/amec_init.c3
-rwxr-xr-xsrc/occ_405/amec/amec_master_smh.c2
-rwxr-xr-xsrc/occ_405/amec/amec_slave_smh.c4
-rwxr-xr-xsrc/occ_405/amec/amec_sys.h3
4 files changed, 11 insertions, 1 deletions
diff --git a/src/occ_405/amec/amec_init.c b/src/occ_405/amec/amec_init.c
index eb08409..7343c2f 100644
--- a/src/occ_405/amec/amec_init.c
+++ b/src/occ_405/amec/amec_init.c
@@ -348,6 +348,9 @@ void amec_init_gamec_struct(void)
// g_amec->ptr_probe250us[6] = g_amec->ptr_probe250us[6]+2; // Point to low 16 bits of testscom1
// g_amec->ptr_probe250us[7] = &g_amec->task_centaur_data_count;
+ // Initialize the current_mem_pwr_ctl to indicate that memory power control is not supported
+ // update memory control registers only if new ips/default memory power control is different
+ g_amec->sys.current_mem_pwr_ctl = MEM_PWR_CTL_NO_SUPPORT;
}
// Function Specification
diff --git a/src/occ_405/amec/amec_master_smh.c b/src/occ_405/amec/amec_master_smh.c
index f00498f..0b024ec 100755
--- a/src/occ_405/amec/amec_master_smh.c
+++ b/src/occ_405/amec/amec_master_smh.c
@@ -561,7 +561,7 @@ void amec_mst_ips_main(void)
// Reset the following parameters
g_amec->mst_ips_parms.active = 0;
G_ips_entry_count = 0;
- g_amec->mst_ips_parms.freq_request = g_amec->sys.fmax;
+ g_amec->mst_ips_parms.freq_request = 0; // No IPS Frequency request when IPS is disabled
break;
}
diff --git a/src/occ_405/amec/amec_slave_smh.c b/src/occ_405/amec/amec_slave_smh.c
index b2e37d7..abdede7 100755
--- a/src/occ_405/amec/amec_slave_smh.c
+++ b/src/occ_405/amec/amec_slave_smh.c
@@ -58,6 +58,7 @@
#include <occhw_async.h>
#include <wof.h>
#include <pgpe_interface.h>
+#include <memory_power_control.h>
//*************************************************************************/
// Externs
@@ -347,6 +348,9 @@ void amec_slv_common_tasks_post(void)
// Call amec_power_control
amec_power_control();
+ // Apply memory power control, if needed.
+ amec_mem_power_control();
+
// Call the OCC slave's processor voting box
amec_slv_proc_voting_box();
diff --git a/src/occ_405/amec/amec_sys.h b/src/occ_405/amec/amec_sys.h
index 5759f11..66d1b84 100755
--- a/src/occ_405/amec/amec_sys.h
+++ b/src/occ_405/amec/amec_sys.h
@@ -389,6 +389,9 @@ typedef struct
// Memory Throttle Sent Last time to DIMM Throttle Register
dimm_n_value_t current_dimm_n_values[NUM_NIMBUS_MC_PAIRS][MAX_NUM_MCU_PORTS];
+
+ // Current Memory Power Control values (applied last through GPE1)
+ uint8_t current_mem_pwr_ctl;
} amec_systemwide_t;
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