diff options
author | Wael El-Essawy <welessa@us.ibm.com> | 2016-04-27 14:38:10 -0500 |
---|---|---|
committer | Wael El-Essawy <welessa@us.ibm.com> | 2016-05-03 18:23:13 -0400 |
commit | 8a7f3c6739f022df1c128b9d5a479e7abfac0ec1 (patch) | |
tree | dcecbff7b4739d6fd53566d7eab0848a4e36f6cf /src/include | |
parent | 0773d5a096886bd01a25ae28480a54b213179899 (diff) | |
download | talos-occ-8a7f3c6739f022df1c128b9d5a479e7abfac0ec1.tar.gz talos-occ-8a7f3c6739f022df1c128b9d5a479e7abfac0ec1.zip |
Empath counters collection PPE code
Change-Id: Ic17691020a66dffd92e9a685616092043ff05476
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23976
Tested-by: FSP CI Jenkins
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
Diffstat (limited to 'src/include')
-rw-r--r-- | src/include/core_data.h | 93 | ||||
-rw-r--r-- | src/include/p9_config.h | 76 |
2 files changed, 63 insertions, 106 deletions
diff --git a/src/include/core_data.h b/src/include/core_data.h index 3a8ce66..96455e8 100644 --- a/src/include/core_data.h +++ b/src/include/core_data.h @@ -7,7 +7,7 @@ /* */ /* EKB Project */ /* */ -/* COPYRIGHT 2015 */ +/* COPYRIGHT 2015,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -35,7 +35,38 @@ #include <stdint.h> #define THERM_DTS_RESULT 0x00050000 - +#define PC_OCC_SPRC 0x00010A82 +#define PC_OCC_SPRD 0x00010A83 +#define TOD_VALUE_REG 0x00040020 + +#define CORE_RAW_CYCLES 0x200 +#define CORE_RUN_CYCLES 0x208 +#define CORE_WORKRATE_BUSY 0x210 +#define CORE_WORKRATE_FINISH 0x218 +#define CORE_MEM_HIER_A_LATENCY 0x220 +#define CORE_MEM_HIER_B_LATENCY 0x228 +#define CORE_MEM_HIER_C_ACCESS 0x230 +#define THREAD0_RUN_CYCLES 0x238 +#define THREAD0_INST_DISP_UTIL 0x240 +#define THREAD0_INST_COMP_UTIL 0x248 +#define THREAD0_MEM_HIER_C_ACCESS 0x250 +#define THREAD1_RUN_CYCLES 0x258 +#define THREAD1_INST_DISP_UTIL 0x260 +#define THREAD1_INST_COMP_UTIL 0x268 +#define THREAD1_MEM_HEIR_C_ACCESS 0x270 +#define THREAD2_RUN_CYCLES 0x278 +#define THREAD2_INST_DISP_UTIL 0x280 +#define THREAD2_INST_COMP_UTIL 0x288 +#define THREAD2_MEM_HEIR_C_ACCESS 0x290 +#define THREAD3_RUN_CYCLES 0x298 +#define THREAD3_INST_DISP_UTIL 0x2A0 +#define THREAD3_INST_COMP_UTIL 0x2A8 +#define THREAD3_MEM_HEIR_C_ACCESS 0x2B0 +#define IFU_THROTTLE_BLOCK_FETCH 0x2B8 +#define IFU_THROTTLE_ACTIVE 0x2C0 +#define VOLT_DROOP_THROTTLE_ACTIVE 0x2C8 + +#define EMPATH_CORE_THREADS 4 typedef union dts_sensor_result_reg { @@ -49,47 +80,35 @@ typedef union dts_sensor_result_reg } dts_sensor_result_reg_t; -typedef struct //40 bytes +typedef struct { - uint32_t unused; uint32_t tod_2mhz; - uint32_t dispatch; - uint32_t completion; - uint32_t freq_sens_busy; - uint32_t freq_sens_finish; - uint32_t run_cycles; - uint32_t raw_cycles; - uint32_t mem_a; // not used in P8 - uint32_t mem_b; // not used in P8 -} CoreDataEmpath; - + uint32_t raw_cycles; // 0x200 + uint32_t run_cycles; // 0x208 + uint32_t freq_sens_busy; // 0x210 Core workrate busy counter + uint32_t freq_sens_finish; // 0x218 Core workrate finish counter + uint32_t mem_latency_a; + uint32_t mem_latency_b; + uint32_t mem_access_c; -// \todo (RTC 137031) : should seriously question the need for this -typedef struct //24 bytes -{ - uint32_t raw_cycles; - uint32_t tod_2mhz; - uint32_t count[4]; // research prototype use -} CoreDataPerPartitionMemory; +} CoreDataEmpath; typedef struct { - uint32_t raw_cycles; - uint32_t tod_2mhz; uint32_t ifu_throttle; - uint32_t isu_throttle; + //uint32_t isu_throttle; // No longer exists uint32_t ifu_active; uint32_t undefined; -} CoreDataThrottle; // not used in P8 + uint32_t v_droop; // new for p9 +} CoreDataThrottle; typedef struct { - uint32_t raw_cycles; // used in P8 - uint32_t tod_2mhz; - uint32_t run_cycles; // used in P8 + uint32_t run_cycles; + uint32_t dispatch; // new for p9 uint32_t completion; - uint32_t mem_a; - uint32_t mem_b; + uint32_t mem_c; // was mem_a + // uint32_t mem_b; // No longer exists in p9 } CoreDataPerThread; typedef union sensor_result @@ -107,8 +126,6 @@ typedef union sensor_result typedef struct { - uint32_t unused; - uint32_t tod_2mhz; sensor_result_t core[2]; sensor_result_t cache; sensor_result_t reserved; @@ -118,13 +135,12 @@ typedef struct // // The instance of this data object must be 8 byte aligned // -typedef struct +typedef struct // 120 { - CoreDataEmpath empath; //40 - CoreDataPerPartitionMemory per_partition_memory; //24 - CoreDataThrottle throttle; //24 - CoreDataPerThread per_thread[8]; //24 * 8 - CoreDataDts dts; //16 + CoreDataEmpath empath; //32 + CoreDataThrottle throttle; //16 + CoreDataPerThread per_thread[EMPATH_CORE_THREADS]; // 64 + CoreDataDts dts; //8 } CoreData; #ifdef __cplusplus @@ -144,4 +160,3 @@ uint32_t get_core_data(uint32_t i_core, CoreData* o_data); }; #endif #endif /* __GPE_CORE_DATA_H__ */ - diff --git a/src/include/p9_config.h b/src/include/p9_config.h index 0e259a0..1136008 100644 --- a/src/include/p9_config.h +++ b/src/include/p9_config.h @@ -1,25 +1,19 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: src/include/p9_config.h $ */ +/* $Source: chips/p9/procedures/lib/pm/p9_config.h $ */ /* */ -/* OpenPOWER OnChipController Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2015 */ -/* [+] International Business Machines Corp. */ +/* IBM CONFIDENTIAL */ /* */ +/* EKB Project */ /* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ +/* COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ /* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ /* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ /* */ /* IBM_PROLOG_END_TAG */ @@ -38,60 +32,8 @@ #include <stdint.h> -// TODO is any of the "Config" needed in P9? -// -/// A bitmask defining a chip configuration -/// -/// Since we are using the conventional big-endian notation, any use of these -/// bitmasks requires that the data being tested is of this type - otherwise -/// the masks won't work. -/// -/// Layout: -/// -/// Bits 0:15 - Core chiplet 0..15 is configured -/// Bits 16:23 - MCS 0..7 is configured -/// Bits 24:31 - Centaur 0..7 is configured - -typedef uint64_t ChipConfig; -typedef uint16_t ChipConfigCores; -typedef uint8_t ChipConfigMcs; -typedef uint8_t ChipConfigCentaur; - - -/// Convert a ChipConfig into a mask suitable for use as the 32-bit chiplet -/// mask argument of a PORE wakeup program. - -static inline uint32_t -pore_exe_mask(ChipConfig config) -{ - return (uint32_t)((config >> 32) & 0xffff0000); -} - -/// Left justify and mask core chiplet configuration into a uint32_t - -static inline uint32_t -left_justify_core_config(ChipConfig config) -{ - return (uint32_t)((config >> 32) & 0xffff0000); -} - -/// Left justify and mask MCS configuration into a uint32_t - -static inline uint32_t -left_justify_mcs_config(ChipConfig config) -{ - return (uint32_t)((config >> 16) & 0xff000000); -} - -/// Left justify and mask Centaur configuration into a uint32_t - -static inline uint32_t -left_justify_centaur_config(ChipConfig config) -{ - return (uint32_t)((config >> 8) & 0xff000000); -} -/// SCOM address Reanges: +/// SCOM address Ranges: // Cores (EX chiplet): 0x20000000 - 0x37000000 // Caches: 0x10000000 - 0x15000000 // |