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authorAndres Lugo-Reyes <aalugore@us.ibm.com>2017-04-27 13:59:38 -0500
committerMartha Broyles <mbroyles@us.ibm.com>2017-05-17 14:08:29 -0400
commita64c253aa40eb0aba7f3fa6d6ee5f5cec93cc66e (patch)
tree07a1c2e0e0cb2587dc028007ef8fa62b71072e70 /src/include
parent8a7df03ba3d475d51f8507a0424b63868cca7e8a (diff)
downloadtalos-occ-a64c253aa40eb0aba7f3fa6d6ee5f5cec93cc66e.tar.gz
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WOF: Change leakage calculation algorithms
The previous version of the leakage calculations only scaled the final calculated value. This has now been updated to scale all leakage currents as soon as they are read out of the OPPB. Change-Id: I978ddd4e1dd8df615a89c454eeddd8f4f34209b9 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39516 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/p9_pstates_common.h203
-rw-r--r--src/include/p9_pstates_occ.h33
-rw-r--r--src/include/pstate_pgpe_occ_api.h4
3 files changed, 149 insertions, 91 deletions
diff --git a/src/include/p9_pstates_common.h b/src/include/p9_pstates_common.h
index 003021c..d776534 100644
--- a/src/include/p9_pstates_common.h
+++ b/src/include/p9_pstates_common.h
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -267,140 +267,179 @@ typedef struct
//
// WOF Voltage, Frequency Ratio Tables
//
+//VFRT calculation part
+#define SYSTEM_VERSION_FRQUENCY(VFRT) (1000 + (16.67 * VFRT))
+#define SYSTEM_VFRT_VALUE(FREQ) ((FREQ - 1000)/16.67)
-// VFRT Header
-typedef struct
-{
+#define HOMER_VFRT_VALUE(FREQ,BSF) ((BSF - FREQ)/16.67)
+#define HOMER_VERSION_FREQUENCY(VFRT,BSF) (BSF - (16.67 * VFRT))
- /// Magic Number
- /// Set to ASCII "VT"
- uint16_t magic_number;
- /// Indicator
- /// Space for generation tools to be anything unique necessary to ID this
- /// VFRT
- uint16_t indicator;
-
- union
- {
- uint8_t value;
- struct
- {
- uint8_t type : 4;
- uint8_t version : 4;
- } fields;
- } typever;
-
- uint8_t reserved;
-
- union
- {
- uint16_t value;
- struct
- {
-#ifdef _BIG_ENDIAN
- uint16_t reserved: 4;
- uint16_t vdn_id : 4;
- uint16_t vdd_id : 4;
- uint16_t qa_id : 4;
-#else
- uint16_t qa_id : 4;
- uint16_t vdd_id : 4;
- uint16_t vdn_id : 4;
- uint16_t reserved: 4;
-#endif // _BIG_ENDIAN
-
- } fields;
- } ids;
-
-} VFRTHeader_t;
-
-// WOF Tables Header
+//VFRT Header fields
+typedef struct __attribute__((__packed__)) VFRTHeaderLayout
+{
+ // VFRT Magic code "VT"
+ uint16_t magic_number;
-typedef struct
+ uint16_t reserved_1;
+ // 0:System type, 1:Homer type (0:3)
+ // if version 1: VFRT size is 12 row(voltage) X 11 column(freq) of size uint8_t
+ // (4:7)
+ // if version 2: VFRT size is 24 row(Voltage) X 5 column (Freq) of size uint8_t
+ uint8_t type_version;
+ //Reserved
+ uint8_t reserved_2;
+ //Identifies the Vdn assumptions tht went in this VFRT (4:7)
+ uint8_t res_vdnId;
+ //Identifies the Vdd assumptions tht went in this VFRT (0:4)
+ //Identifies the Quad Active assumptions tht went in this VFRT (5:7)
+ uint8_t VddId_QAId;
+} VFRTHeaderLayout_t;// WOF Tables Header
+
+typedef struct __attribute__((__packed__)) WofTablesHeader
{
/// Magic Number
- /// Set to ASCII "VFRT___x" where x is the version of the VFRT structure
- uint64_t magic_number;
+ /// Set to ASCII "WFTH___x" where x is the version of the VFRT structure
+ uint32_t magic_number;
- /// VFRT Size
+ uint32_t reserved_version; // reserved:24b, version:8b
+
+ /// VFRT Block Size
/// Length, in bytes, of a VFRT
- uint8_t vfrt_size;
+ uint16_t vfrt_block_size;
+
+ /// VFRT block header size
+ uint16_t vfrt_block_header_size;
/// VFRT Data Size
/// Length, in bytes, of the data field.
- uint8_t vfrt_data_size;
-
- uint8_t reserved;
+ uint16_t vfrt_data_size;
/// Quad Active Size
/// Total number of Active Quads
uint8_t quads_active_size;
+ /// Core count
+ uint8_t core_count;
+
/// Ceff Vdn Start
- /// CeffVdn value represented by index 0 (in percent)
- uint8_t vdn_start;
+ /// CeffVdn value represented by index 0 (in 0.01%)
+ uint16_t vdn_start;
/// Ceff Vdn Step
- /// CeffVdn step value for each CeffVdn index (in percent)
- uint8_t vdn_step;
+ /// CeffVdn step value for each CeffVdn index (in 0.01%)
+ uint16_t vdn_step;
/// Ceff Vdn Size
/// Number of CeffVdn indexes
- uint8_t vdn_size;
+ uint16_t vdn_size;
/// Ceff Vdd Start
- /// CeffVdd value represented by index 0 (in percent)
- uint8_t vdd_start;
+ /// CeffVdd value represented by index 0 (in 0.01%)
+ uint16_t vdd_start;
/// Ceff Vdd Step
- /// CeffVdd step value for each CeffVdd index (in percent)
- uint8_t vdd_step;
+ /// CeffVdd step value for each CeffVdd index (in 0.01%)
+ uint16_t vdd_step;
/// Ceff Vdd Size
/// Number of CeffVdd indexes
- uint8_t vdd_size;
+ uint16_t vdd_size;
/// Vratio Start
- /// Vratio value represented by index 0 (in percent)
- uint8_t vratio_start;
+ /// Vratio value represented by index 0 (in 0.01%)
+ uint16_t vratio_start;
/// Vratio Step
- /// Vratio step value for each CeffVdd index (in percent)
- uint8_t vratio_step;
+ /// Vratio step value for each CeffVdd index (in 0.01%)
+ uint16_t vratio_step;
/// Vratio Size
/// Number of Vratio indexes
- uint8_t vratio_size;
+ uint16_t vratio_size;
/// Fratio Start
- /// Fratio value represented by index 0 (in percent)
- uint8_t fratio_start;
+ /// Fratio value represented by index 0 (in 0.01%)
+ uint16_t fratio_start;
/// Fratio Step
- /// Fratio step value for each CeffVdd index (in percent)
- uint8_t fratio_step;
+ /// Fratio step value for each CeffVdd index (in 0.01%)
+ uint16_t fratio_step;
/// Fratio Size
/// Number of Fratio indexes
- uint8_t fratio_size;
+ uint16_t fratio_size;
+
+ /// Future usage
+ uint16_t Vdn_percent[8];
+
+ ///Socket Power (in Watts) for the WOF Tables
+ uint16_t socket_power_w;
+
+ ///Nest Frequency (in MHz) used in building the WOF Tables
+ uint16_t nest_frequency_mhz;
+
+ //Core Sort Power Target Frequency (in MHz) – The #V frequency associated
+ //with the sort power target for this table set. This will be either the
+ //Nominal or
+ //Turbo #V frequency
+ uint16_t sort_power_freq_mhz;
+
+ ///Regulator Design Point Capacity (in Amps)
+ uint16_t rdp_capacity;
+
+ ///Up to 8 ASCII characters to be defined by the Table generation team to
+ //back reference table sources
+ uint64_t wof_table_source_tag;
+
+ ///Up to 16 ASCII characters as a Package designator
+ uint64_t package_name;
+
+ uint8_t reserved[6];
} WofTablesHeader_t;
-// VDN
-// Data is provided in 12ths (eg 12 core pairs on a 24 core chip)
-#define VFRT_VRATIO_SIZE 12
+#define CEF_VDN_INDEX 8
+#define CEF_VDD_INDEX 21
+#define ACTIVE_QUADS 6
+
+// Data is provided in 1/24ths granularity with adjustments for integer
+// representation
+#define VFRT_VRATIO_SIZE 24
+
+// 5 steps down from 100% is Fratio_step sizes
+#define VFRT_FRATIO_SIZE 5
-// 100%/10% steps
-#define VFRT_FRATIO_SIZE 10
+//System VFRT layout
+typedef struct __attribute__((__packed__)) HomerSysVFRTLayout
+{
+ VFRTHeaderLayout_t vfrtHeader;
+ uint8_t vfrt_data[VFRT_VRATIO_SIZE][VFRT_FRATIO_SIZE];
+} HomerSysVFRTLayout_t;
+
+
+
+//HOMER VFRT Layout
+typedef struct __attribute__((__packed__)) HomerVFRTLayout
+{
+ VFRTHeaderLayout_t vfrtHeader;
+ uint8_t vfrt_data[VFRT_VRATIO_SIZE][VFRT_FRATIO_SIZE];
+ uint8_t padding[128];
+} HomerVFRTLayout_t;
+
+//HOMER WOF layout
+typedef struct __attribute__((__packed__)) HomerWOFLayout
+{
+ WofTablesHeader_t wof_header_data;
+ HomerVFRTLayout_t homer_vfrt_data[CEF_VDN_INDEX][CEF_VDD_INDEX][ACTIVE_QUADS];
+} HomerWOFLayout_t;
-// Holds a frequency that is 1000MHz + 16.667*VFRT_Circuit_t
typedef uint8_t VFRT_Circuit_t;
-typedef Pstate VFRT_Hcode_t;
+typedef Pstate VFRT_Hcode_t;
diff --git a/src/include/p9_pstates_occ.h b/src/include/p9_pstates_occ.h
index 26b97eb..fb295e7 100644
--- a/src/include/p9_pstates_occ.h
+++ b/src/include/p9_pstates_occ.h
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016 */
+/* Contributors Listed Below - COPYRIGHT 2016,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -98,11 +98,14 @@ typedef struct
/// WOF Iddq Margin (aging factor) in 0.01% units
uint16_t wof_iddq_margin_factor;
- /// Temperature Scale Factor per 10C in 0.01% units
- uint16_t temperature_scale_factor;
+ /// VDD Temperature Scale Factor per 10C in 0.01% units
+ uint16_t vdd_temperature_scale_factor;
+
+ /// VDN Temperature Scale Factor per 10C in 0.01% units
+ uint16_t vdn_temperature_scale_factor;
/// Spare
- uint8_t spare[10];
+ uint8_t spare[8];
/// IVDD ALL Good Cores ON; 6.25mA units
iddq_entry_t ivdd_all_good_cores_on_caches_on[IDDQ_MEASUREMENTS];
@@ -133,11 +136,15 @@ typedef struct
avgtemp_entry_t avgtemp_quad_good_cores_on[MAXIMUM_QUADS][IDDQ_MEASUREMENTS];
/// avgtempN ; 6.25mA units
- avgtemp_entry_t avgtemp_vdn;
+ avgtemp_entry_t avgtemp_vdn[IDDQ_MEASUREMENTS];
/// spare (per MVPD documentation
- uint8_t spare_1[43];
-
+ ///
+ /// NOTE: The MVPD documentation defines 43 spare bytes to lead to a 255B structure. However,
+ /// some consuming code already assumed a 250B structure and the correction of this size was disruptive.
+ /// This is not a problem until the IQ keyword actually defines these bytes at which time a keyword
+ /// version update will be need. Thus, this structure will remain at 250B.
+ uint8_t spare_1[38];
} IddqTable;
@@ -187,6 +194,18 @@ typedef struct
/// Nest frequency in Mhz. This is used by FIT interrupt
uint32_t nest_frequency_mhz;
+
+ //Nest leakage percentage used to calculate the Core leakage
+ uint16_t nest_leakage_percent;
+
+ uint16_t ceff_tdp_vdn;
+
+ // AC tdp vdd turbo
+ uint16_t lac_tdp_vdd_turbo_10ma;
+
+ // AC tdp vdd nominal
+ uint16_t lac_tdp_vdd_nominal_10ma;
+
} __attribute__((aligned(128))) OCCPstateParmBlock;
#ifdef __cplusplus
diff --git a/src/include/pstate_pgpe_occ_api.h b/src/include/pstate_pgpe_occ_api.h
index 6768617..bd70283 100644
--- a/src/include/pstate_pgpe_occ_api.h
+++ b/src/include/pstate_pgpe_occ_api.h
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016 */
+/* Contributors Listed Below - COPYRIGHT 2016,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -138,7 +138,7 @@ typedef struct ipcmsg_wof_vfrt
uint8_t active_quads; // OCC updated with the Active Quads that it
// is using for its Ceff calculations
uint8_t pad;
- VFRT_Hcode_t* vfrt_ptr; // Voltage Frequency Ratio Table
+ HomerVFRTLayout_t* homer_vfrt_ptr; // Voltage Frequency Ratio Table
} ipcmsg_wof_vfrt_t;
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