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authorWael El-Essawy <welessa@us.ibm.com>2017-03-22 10:30:48 -0500
committerWael El-Essawy <welessa@us.ibm.com>2017-05-10 13:53:16 -0400
commitcf2258322bb72a2cd868f8eaef25e9a665077f4f (patch)
treef7a9b13ef36943246377ff623ed917fa4fd08ada /src/common/mem_structs.h
parentff3b5a1c08389bf766de21adcd033e3c7b86af87 (diff)
downloadtalos-occ-cf2258322bb72a2cd868f8eaef25e9a665077f4f.tar.gz
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Memory Power Control when entering and exiting IPS (Idle Power Save)
memory power control settings for IPS/default modes - as defined by memory config data packet version 0x21 - are applied to memory power control registers of all configured ports whenever the OCC enters/exits IPS, respectively. Change-Id: I56514bb8cbab80c6d4877edc74db96f3b011e523 RTC: 165546 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38294 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
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+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/dimm_structs.h $ */
+/* */
+/* OpenPOWER OnChipController Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+
+/* This header file is used by both occ_405 and occ_gpe1. */
+/* Contains common structures and globals. */
+
+#ifndef _MEM_STRUCTS_H
+#define _MEM_STRUCTS_H
+
+#include "occ_util.h"
+#include <gpe_export.h>
+#include "gpe_err.h"
+
+// this enum defines memory power control
+typedef enum
+{
+ MEM_PWR_CTL_OFF = 0x00,
+ MEM_PWR_CTL_POWER_DOWN = 0x01,
+ MEM_PWR_CTL_PD_AND_STR = 0x02,
+ MEM_PWR_CTL_PD_AND_STR_CLK_STOP = 0x03,
+ MEM_PWR_CTL_NO_SUPPORT = 0xFF,
+} eMemoryPowerControlSetting;
+
+// memory power control IPC argument
+typedef struct
+{
+ GpeErrorStruct error;
+ uint8_t mem_pwr_ctl;
+ uint8_t port;
+ uint8_t mc;
+} mem_power_control_args_t;
+
+#endif //_MEM_STRUCTS_H
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