Replace Firmware Level with FClip History in error log

-Throttle noisy traces
-Add slave clip history to Call Home log

Change-Id: If498c4c5b7e445d7b1b43fb16a2790f11166e430
CMVC-Prereq: 1045167
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53578
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>

17 files changed, 142 insertions, 73 deletions

diff --git a/src/occ_405/amec/amec_pcap.c b/src/occ_405/amec/amec_pcap.c
index 6d65a89..fc6fd92 100755
--- a/src/occ_405/amec/amec_pcap.c
+++ b/src/occ_405/amec/amec_pcap.c
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER OnChipController Project                                     */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2011,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -29,11 +29,11 @@
 #include "amec_pcap.h"
 #include "amec_sys.h"
 #include "amec_service_codes.h"
+#include "common.h"
 #include <occ_common.h>
 #include <occ_sys_config.h>
 #include <dcom.h>
 #include <trac.h>
-
 //*************************************************************************/
 // Externs
 //*************************************************************************/
@@ -54,7 +54,7 @@
 // Globals
 //*************************************************************************/
 extern PWR_READING_TYPE  G_pwr_reading_type;
-
+extern uint16_t G_allow_trace_flags;
 //Number of ticks to wait before dropping below nominal frequency
 #define PWR_SETTLED_TICKS   4
 //Number of watts power must be below the node power cap before raising
@@ -323,6 +323,8 @@ void amec_pcap_calc(const bool i_oversub_state)
     static uint32_t L_prev_node_pcap = 0;
     static bool L_apss_error_traced = FALSE;
     static uint32_t L_ticks_mem_pwr_available = 0;
+    static bool L_trace_pcap_throttle = true;
+    static bool L_trace_pcap_unthrottle = true;
 
     // Determine the active power cap.  norm_node_pcap is set as lowest
     // between sys (N+1 mode) and user in amec_data_write_pcap()
@@ -388,9 +390,14 @@ void amec_pcap_calc(const bool i_oversub_state)
             {
                 L_ticks_mem_pwr_available++;
 
-                if(L_ticks_mem_pwr_available == UNTHROTTLE_MEMORY_DELAY)
+                if( L_ticks_mem_pwr_available == UNTHROTTLE_MEMORY_DELAY )
                 {
-                    TRAC_IMP("PCAP: Un-Throttling memory");
+                    if( L_trace_pcap_unthrottle ||
+                       (G_allow_trace_flags & ALLOW_MEM_TRACE) )
+                    {
+                        TRAC_IMP("PCAP: Un-Throttling memory");
+                        L_trace_pcap_unthrottle = false;
+                    }
                     g_amec->pcap.active_mem_level = 0;
                     L_ticks_mem_pwr_available = 0;
                     // don't let the proc have any available power this tick
@@ -408,7 +415,12 @@ void amec_pcap_calc(const bool i_oversub_state)
             if( (g_amec->pcap.active_mem_level == 0) &&
                 (g_amec->proc[0].pwr_votes.ppb_fmax == g_amec->sys.fmin) )
             {
-                TRAC_IMP("PCAP: Throttling memory");
+                if( L_trace_pcap_throttle ||
+                   (G_allow_trace_flags & ALLOW_MEM_TRACE) )
+                {
+                    TRAC_IMP("PCAP: Throttling memory");
+                    L_trace_pcap_throttle = false;
+                }
                 g_amec->pcap.active_mem_level = 1;
             }
         }
diff --git a/src/occ_405/common.c b/src/occ_405/common.c
index e7eb6d7..833dba0 100755
--- a/src/occ_405/common.c
+++ b/src/occ_405/common.c
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER OnChipController Project                                     */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2011,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -32,7 +32,7 @@
 
 uint8_t G_host_notifications_pending = 0;
 extern bool G_ipl_time;
-
+extern uint16_t G_allow_trace_flags;
 
 // Function Specification
 //
@@ -158,6 +158,7 @@ void task_misc_405_checks(task_t *i_self)
 bool notify_host(const ext_intr_reason_t i_reason)
 {
     bool notify_success = false;
+    static bool L_first_trace = true;
     //TRAC_INFO("notify_host(0x%02X) called (G_host_notifications_pending=0x%02X)", i_reason, G_host_notifications_pending);
 
     // Use input reason unless there are outstanding notifications pending
@@ -228,7 +229,14 @@ bool notify_host(const ext_intr_reason_t i_reason)
 
             out32(OCB_OCCMISC_OR, new_occmisc.value);
             notify_success = true;
-            TRAC_INFO("notify_host: notification of reason 0x%02X has been sent", notifyReason);
+
+            if( (G_allow_trace_flags & ALLOW_OPAL_TRACE) ||
+                (L_first_trace) )
+            {
+                TRAC_INFO("notify_host: notification of reason 0x%02X has been sent",
+                           notifyReason);
+                L_first_trace = false;
+            }
             G_host_notifications_pending &= ~notifyReason;
         }
         else
diff --git a/src/occ_405/common.h b/src/occ_405/common.h
index 06ab5df..261cf33 100644
--- a/src/occ_405/common.h
+++ b/src/occ_405/common.h
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER OnChipController Project                                     */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -27,6 +27,13 @@
 
 #include <rtls.h>
 
+// Allow Trace Masks
+#define ALLOW_PMCR_TRACE       0x0001
+#define ALLOW_CLIP_TRACE       0x0002
+#define ALLOW_VFRT_TRACE       0x0004
+#define ALLOW_OPAL_TRACE       0x0008
+#define ALLOW_MEM_TRACE        0x0010
+
 // Start of SRAM memory
 #define SRAM_START_ADDRESS_405      0xFFF40000
 
diff --git a/src/occ_405/dcom/dcom.h b/src/occ_405/dcom/dcom.h
index 3798c25..7235b5c 100755
--- a/src/occ_405/dcom/dcom.h
+++ b/src/occ_405/dcom/dcom.h
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER OnChipController Project                                     */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2011,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -103,12 +103,12 @@
 #define DCOM_TRACE_NOT_IDLE_AFTER_CONSEC_TIMES 3
 
 // general defines
-#define TOD_SIZE            6
-#define NUM_TOD_SENSORS     3
-#define SLV_INBOX_RSV_SIZE  150
-#define SLV_MAILBOX_SIZE    32
-#define SLV_OUTBOX_RSV_SIZE 602
-#define DOORBELL_RSV_SIZE   1
+#define TOD_SIZE                 6
+#define NUM_TOD_SENSORS          3
+#define SLV_INBOX_RSV_SIZE       150
+#define SLV_MAILBOX_SIZE         32
+#define SLV_OUTBOX_RSV_SIZE      598
+#define DOORBELL_RSV_SIZE        1
 #define DCOM_MAX_ERRH_ENTRIES    8
 
 #define DCOM_250us_GAP 1
@@ -233,10 +233,13 @@ typedef struct __attribute__ ((packed))
 
     // Error history counts
     error_history_count_t errhCount[DCOM_MAX_ERRH_ENTRIES];      // [374] - 16 bytes
+
+    // Frequency Clip History
+    uint32_t fClipHist;                                          // [390] - 4 bytes
     // Reserved Bytes
     union
     {
-        uint8_t  reserved[SLV_OUTBOX_RSV_SIZE];                  // [390] - 602 bytes
+        uint8_t  reserved[SLV_OUTBOX_RSV_SIZE];                  // [422] - 598 bytes
         struct __attribute__ ((packed))
         {
             uint8_t _reserved_1;
diff --git a/src/occ_405/dcom/dcomSlaveTx.c b/src/occ_405/dcom/dcomSlaveTx.c
index 7abf2b1..37975dc 100755
--- a/src/occ_405/dcom/dcomSlaveTx.c
+++ b/src/occ_405/dcom/dcomSlaveTx.c
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER OnChipController Project                                     */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2011,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -111,6 +111,9 @@ uint32_t dcom_build_slv_outbox(void)
         }
     }
 
+    // Add Frequency Clip history
+    G_dcom_slv_outbox_tx.fClipHist = g_amec->proc[0].chip_f_reason_history;
+
     return l_addr_of_slv_outbox_in_main_mem;
 }
 
diff --git a/src/occ_405/dimm/dimm_control.c b/src/occ_405/dimm/dimm_control.c
index 2b3a43d..6bdb94f 100644
--- a/src/occ_405/dimm/dimm_control.c
+++ b/src/occ_405/dimm/dimm_control.c
@@ -1,11 +1,11 @@
 /* IBM_PROLOG_BEGIN_TAG                                                   */
 /* This is an automatically generated prolog.                             */
 /*                                                                        */
-/* $Source: src/occ/cent/centaur_control.c $                              */
+/* $Source: src/occ_405/dimm/dimm_control.c $                             */
 /*                                                                        */
 /* OpenPOWER OnChipController Project                                     */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2016                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -35,6 +35,7 @@
 #include "state.h"
 #include "amec_sys.h"
 #include "memory.h"
+#include "common.h"
 
 //GPE IPC request and parms for the GPE job used for DIMM modules control.
 //extern GpeRequest G_dimm_control_request;
@@ -52,7 +53,8 @@ extern memory_control_task_t G_memory_control_task;
 //   (0x21, format 0x12)
 extern uint16_t G_configured_mbas;
 
-
+// Bit vector that allows certain traces to run
+extern uint16_t G_allow_trace_flags;
 //////////////////////////
 // Function Specification
 //
@@ -116,17 +118,12 @@ void dimm_update_nlimits(uint8_t mc, uint8_t port)
     /*------------------------------------------------------------------------*/
     /*  Local Variables                                                       */
     /*------------------------------------------------------------------------*/
-    static uint32_t L_trace_throttle_count = 0;
+    static bool L_first_trace = true;
     uint16_t l_port_dimm_maxn = 0, l_slot_dimm_maxn = 0;
 
     /*------------------------------------------------------------------------*/
     /*  Code                                                                  */
     /*------------------------------------------------------------------------*/
-    if (L_trace_throttle_count == 0)
-    {
-        L_trace_throttle_count = G_configured_mbas;
-    }
-
     do
     {
         memory_throttle_t* l_active_limits;
@@ -165,10 +162,8 @@ void dimm_update_nlimits(uint8_t mc, uint8_t port)
             {
                 l_active_limits->max_n_per_mba = l_slot_dimm_maxn;
 
-                //Don't trace all MCAs changing, just trace one they will all
-                //be the same unless there is a different number of DIMMs behind
-                //the MCAs or a mix of DIMM sizes is supported
-                if(L_trace_throttle_count == G_configured_mbas)
+                if( (L_first_trace) ||
+                    (G_allow_trace_flags & ALLOW_MEM_TRACE) )
                 {
                     TRAC_IMP("dimm_update_nlimits: New DIMM slot throttle values: "
                              "MC#|Port:[0x%04x], "
@@ -177,11 +172,10 @@ void dimm_update_nlimits(uint8_t mc, uint8_t port)
                              (uint32_t)( (l_active_limits->max_n_per_mba << 16) |
                                          l_active_limits->min_n_per_mba),
                              l_active_limits->max_n_per_chip);
+                    L_first_trace = false;
                 }
             }
 
-            L_trace_throttle_count &= ~(0x8000 >> ((mc * (MAX_NUM_MCU_PORTS)) + port));
-
         } // NIMBUS_DIMM_THROTTLING_CONFIGURED ?
 
     }while(0);
diff --git a/src/occ_405/errl/errl.c b/src/occ_405/errl/errl.c
index 0ceab4e..d93f71c 100755
--- a/src/occ_405/errl/errl.c
+++ b/src/occ_405/errl/errl.c
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER OnChipController Project                                     */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2011,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -33,6 +33,7 @@
 #include <common.h>
 #include <ocb_firmware_registers.h>
 #include <ocb_register_addresses.h>
+#include <amec_sys.h>
 
 uint32_t    G_occErrSlotBits = 0x000000000;
 uint8_t     G_occErrIdCounter= 0x00;
@@ -67,7 +68,6 @@ uint8_t G_error_history[ERR_HISTORY_SIZE] = {0};
 extern uint8_t G_occ_interrupt_type;
 extern bool G_fir_collection_required;
 
-
 // Function Specification
 //
 // Name:  getErrSlotNumAndErrId
@@ -305,12 +305,12 @@ errlHndl_t createErrl(
         // save off default size
         l_rc->iv_userDetails.iv_entrySize = sizeof( ErrlEntry_t );
 
-        // add trace
-        addTraceToErrl( i_trace, i_traceSz,  l_rc );
-
         // add error history
         addErrHistory( l_rc );
 
+        // add trace
+        addTraceToErrl( i_trace, i_traceSz,  l_rc );
+
         // save off entry Id
         l_rc->iv_entryId = l_id;
 
@@ -338,7 +338,7 @@ errlHndl_t createErrl(
         l_rc->iv_numCallouts = 0;
 
         // save off occ fields
-        l_rc->iv_userDetails.iv_fwLevel = 0;
+        l_rc->iv_userDetails.iv_fclipHistory = g_amec->proc[0].chip_f_reason_history;
         l_rc->iv_userDetails.iv_occId = G_pbax_id.chip_id;
         l_rc->iv_userDetails.iv_occRole = G_occ_role;
         l_rc->iv_userDetails.iv_operatingState = CURRENT_STATE();
diff --git a/src/occ_405/errl/errl.h b/src/occ_405/errl/errl.h
index 042841e..18bc791 100755
--- a/src/occ_405/errl/errl.h
+++ b/src/occ_405/errl/errl.h
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER OnChipController Project                                     */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2011,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -200,7 +200,7 @@ struct ErrlUserDetails
     uint8_t     iv_version;             // User Details Version
     uint8_t     iv_reserved;            // Reserved
     uint16_t    iv_modId;               // Module Id
-    uint32_t    iv_fwLevel;             // Firmware Level
+    uint32_t    iv_fclipHistory;        // Frequency Clip History
     uint64_t    iv_timeStamp;           // Time Stamp
     uint8_t     iv_occId;               // OCC ID
     uint8_t     iv_occRole;             // OCC Role
diff --git a/src/occ_405/errl/test/parser.c b/src/occ_405/errl/test/parser.c
index d5aac62..1b00468 100755
--- a/src/occ_405/errl/test/parser.c
+++ b/src/occ_405/errl/test/parser.c
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER OnChipController Project                                     */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2016                        */
+/* Contributors Listed Below - COPYRIGHT 2011,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -168,7 +168,7 @@ struct ErrlUserDetails
     uint8_t     iv_version;             // User Details Version
     uint8_t     iv_reserved;            // Reserved
     uint16_t    iv_modId;               // Module Id
-    uint32_t    iv_fwLevel;             // Firmware Level
+    uint32_t    iv_fclipHistory;        // Frequency Clip History
     uint64_t    iv_timeStamp;           // Time Stamp
     uint8_t     iv_occId;               // OCC ID
     uint8_t     iv_occRole;             // OCC Role
@@ -251,7 +251,7 @@ main()
     printf(" UserDetails    : \n" );
     printf(" Version        : 0x%02X \n", l_log.iv_userDetails.iv_version );
     printf(" Module Id      : 0x%04X \n", ntohs(l_log.iv_userDetails.iv_modId) );
-    printf(" Firmware Level : 0x%08X \n", l_log.iv_userDetails.iv_fwLevel );
+    printf(" FClip History  : 0x%08X \n", l_log.iv_userDetails.iv_fclipHistory );
     printf(" Time           : 0x%08X \n", l_log.iv_userDetails.iv_timeStamp );
     printf(" OCC ID         : 0x%02X \n", l_log.iv_userDetails.iv_occId );
     printf(" OCC Role       : 0x%02X \n", l_log.iv_userDetails.iv_occRole );
diff --git a/src/occ_405/main.c b/src/occ_405/main.c
index 81cec38..3ab97cd 100755
--- a/src/occ_405/main.c
+++ b/src/occ_405/main.c
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER OnChipController Project                                     */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2011,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -1198,7 +1198,7 @@ void hmon_routine()
 
     //if we are in observation, characterization, or activate state, then monitor the processor
     //and VRM Vdd temperatures for timeout conditions
-    if (IS_OCC_STATE_OBSERVATION() || IS_OCC_STATE_ACTIVE() || IS_OCC_STATE_CHARACTERIZATION())
+    if( (IS_OCC_STATE_OBSERVATION() || IS_OCC_STATE_ACTIVE() || IS_OCC_STATE_CHARACTERIZATION()) && (!SMGR_is_state_transitioning()) )
     {
         amec_health_check_proc_timeout();
         amec_health_check_vrm_vdd_temp_timeout();
@@ -1206,8 +1206,8 @@ void hmon_routine()
 
     //if we are in observation, characterization, or active state with memory temperature data
     // being collected then monitor the temperature collections for overtemp and timeout conditions
-    if((IS_OCC_STATE_OBSERVATION() || IS_OCC_STATE_ACTIVE() || IS_OCC_STATE_CHARACTERIZATION()) &&
-       rtl_task_is_runnable(TASK_ID_DIMM_SM))
+    if( (IS_OCC_STATE_OBSERVATION() || IS_OCC_STATE_ACTIVE() || IS_OCC_STATE_CHARACTERIZATION()) &&
+       (rtl_task_is_runnable(TASK_ID_DIMM_SM)) && (!SMGR_is_state_transitioning()) )
     {
         // For Cumulus systems only, check for centaur timeout and overtemp errors
         if (MEM_TYPE_CUMULUS ==  G_sysConfigData.mem_type)
diff --git a/src/occ_405/occbuildname.c b/src/occ_405/occbuildname.c
index c9ff9f8..73140ee 100755
--- a/src/occ_405/occbuildname.c
+++ b/src/occ_405/occbuildname.c
@@ -34,6 +34,6 @@ volatile const char G_occ_buildname[16] __attribute__((section(".buildname"))) =
 
 #else
 
-volatile const char G_occ_buildname[16] __attribute__((section(".buildname"))) = /*<BuildName>*/  "op_occ_180116a\0"  /*</BuildName>*/ ;
+volatile const char G_occ_buildname[16] __attribute__((section(".buildname"))) = /*<BuildName>*/  "op910_180207a\0"  /*</BuildName>*/ ;
 
 #endif
diff --git a/src/occ_405/pgpe/pgpe_interface.c b/src/occ_405/pgpe/pgpe_interface.c
index 36d740c..991f6cf 100644
--- a/src/occ_405/pgpe/pgpe_interface.c
+++ b/src/occ_405/pgpe/pgpe_interface.c
@@ -51,7 +51,7 @@ extern uint32_t G_present_cores;
 
 extern bool G_simics_environment;
 
-extern uint8_t G_allow_trace_flags;
+extern uint16_t G_allow_trace_flags;
 // IPC GPE Requests
 GpeRequest G_clip_update_req;
 GpeRequest G_pmcr_set_req;
@@ -656,7 +656,7 @@ int pgpe_clip_update(void)
                 }
                 else
                 {
-                    if(G_allow_trace_flags & PGPE_ALLOW_CLIP_TRACE)
+                    if(G_allow_trace_flags & ALLOW_CLIP_TRACE)
                     {
                         TRAC_INFO("pgpe_clip_update: Scheduling clip update: min[0x%02X], max[0x%08X%04X]",
                               G_clip_update_parms.ps_val_clip_min[0],
diff --git a/src/occ_405/pgpe/pgpe_shared.h b/src/occ_405/pgpe/pgpe_shared.h
index 3003af4..12a7d73 100644
--- a/src/occ_405/pgpe/pgpe_shared.h
+++ b/src/occ_405/pgpe/pgpe_shared.h
@@ -43,11 +43,6 @@
 #define PGPE_WOF_TBLS_ADDR_OFFSET              0x58
 #define PGPE_WOF_TBLS_LEN_OFFSET               0x5C
 
-// PGPE Command Trace Masks
-#define PGPE_ALLOW_PMCR_TRACE           0x0001
-#define PGPE_ALLOW_CLIP_TRACE           0x0002
-#define PGPE_ALLOW_VFRT_TRACE           0x0004
-
 // This size must be a multiple of 128
 typedef struct __attribute__ ((packed))
 {
diff --git a/src/occ_405/proc/proc_data_control.c b/src/occ_405/proc/proc_data_control.c
index a52cfac..2b793d0 100755
--- a/src/occ_405/proc/proc_data_control.c
+++ b/src/occ_405/proc/proc_data_control.c
@@ -56,7 +56,7 @@ extern GpeRequest G_pmcr_set_req;
 
 extern bool G_state_transition_occuring;     // A state transition is currently going on?
 
-extern uint8_t G_allow_trace_flags;
+extern uint16_t G_allow_trace_flags;
 // a global flag used by task_core_data_control() to indicate
 // that the OCC is ready to transition to observation state
 // (after initiatibg a clip update IPC task if needed)
@@ -123,7 +123,7 @@ void task_core_data_control( task_t * i_task )
                 // pclip of highest quad frequency corresponds to a frequency higher than legacy turbo
                 if(pclip < l_pstate)
                 {
-                    if( G_allow_trace_flags & PGPE_ALLOW_CLIP_TRACE )
+                    if( G_allow_trace_flags & ALLOW_CLIP_TRACE )
                     {
                         TRAC_INFO("task_core_data_control: updating clip max to pstate 0x%02X (from 0x%02X)", l_pstate, pclip);
                     }
@@ -198,7 +198,7 @@ void task_core_data_control( task_t * i_task )
                     {
                         L_last = pstateList;
 
-                        if( G_allow_trace_flags & PGPE_ALLOW_PMCR_TRACE )
+                        if( G_allow_trace_flags & ALLOW_PMCR_TRACE )
                         {
                             TRAC_INFO("task_core_data_control: calling pmcr_set() w/pstates: 0x%08X%04X",
                                  WORD_HIGH(pstateList), WORD_LOW(pstateList)>>16);
diff --git a/src/occ_405/proc/proc_pstate.c b/src/occ_405/proc/proc_pstate.c
index 12e3ac1..f78eb41 100755
--- a/src/occ_405/proc/proc_pstate.c
+++ b/src/occ_405/proc/proc_pstate.c
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER OnChipController Project                                     */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2011,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -49,6 +49,9 @@ extern opal_mem_voting_reason_t  G_amec_opal_mem_throt_reason;
 //Global OCC Pstate Parameters Block Structure
 extern OCCPstateParmBlock G_oppb;
 
+//Trace flags
+extern uint16_t G_allow_trace_flags;
+
 //Holds Fmax for ease of proc_freq2pstate calculation = max(fturbo,futurbo)
 uint16_t G_proc_fmax_mhz;
 
@@ -459,6 +462,9 @@ void check_for_opal_updates(void)
     bool           dynamic_data_change = false;
     bool           l_log_crit_error = false;
     static uint8_t L_num_bce_checks = 0;
+    static bool    L_first_throttle_trace = true;
+    static bool    L_first_unthrottle_trace = true;
+    static bool    L_first_mem_trace = true;
 
     // check if BCE for previous change finished and now need to notify host
     if(G_opal_table_update_state == OPAL_TABLE_UPDATE_NOTIFY_HOST)
@@ -517,18 +523,52 @@ void check_for_opal_updates(void)
         else if(G_opal_dynamic_table.dynamic.proc_throt_status != G_amec_opal_proc_throt_reason)
         {
             dynamic_data_change = true;
-            TRAC_INFO("check_for_opal_updates: processor throttle status change - 0x%02X->0x%02X",
-                       G_opal_dynamic_table.dynamic.proc_throt_status, G_amec_opal_proc_throt_reason);
+
+            // Only want to trace the first time we throttle, and the first
+            // time we unthrottle. If ALLOW_OPAL_TRACE is set, trace every time
+            bool l_trace = false;
+            if( (G_allow_trace_flags & ALLOW_OPAL_TRACE) ||
+                (L_first_throttle_trace) )
+            {
+                l_trace = true;
+                L_first_throttle_trace = false;
+            }
+            else if( (G_amec_opal_proc_throt_reason == 0) &&
+                     (L_first_unthrottle_trace) )
+            {
+                    l_trace = true;
+                    L_first_unthrottle_trace = false;
+            }
+
+            if(l_trace)
+            {
+                TRAC_INFO("check_for_opal_updates: "
+                        "processor throttle status change - 0x%02X->0x%02X",
+                        G_opal_dynamic_table.dynamic.proc_throt_status,
+                        G_amec_opal_proc_throt_reason);
+            }
         }
 
         // check if memory throttle status or Quick Power Drop changed
         if( (G_opal_dynamic_table.dynamic.mem_throt_status != G_amec_opal_mem_throt_reason) ||
-            (G_opal_dynamic_table.dynamic.quick_power_drop != AMEC_INTF_GET_OVERSUBSCRIPTION()) ) 
+            (G_opal_dynamic_table.dynamic.quick_power_drop != AMEC_INTF_GET_OVERSUBSCRIPTION()) )
         {
             dynamic_data_change = true;
-            TRAC_INFO("check_for_opal_updates: memory throttle status - 0x%02X->0x%02X QPD - 0x%02X->0x%02X",
-                       G_opal_dynamic_table.dynamic.mem_throt_status, G_amec_opal_mem_throt_reason,
-                       G_opal_dynamic_table.dynamic.quick_power_drop, AMEC_INTF_GET_OVERSUBSCRIPTION());
+
+            if( (G_allow_trace_flags & ALLOW_OPAL_TRACE  ) ||
+                (L_first_mem_trace) ||
+                (G_opal_dynamic_table.dynamic.quick_power_drop !=
+                 AMEC_INTF_GET_OVERSUBSCRIPTION()) )
+            {
+               TRAC_INFO("check_for_opal_updates:"
+                       " memory throttle status - 0x%02X->0x%02X"
+                       " QPD - 0x%02X->0x%02X",
+                       G_opal_dynamic_table.dynamic.mem_throt_status,
+                       G_amec_opal_mem_throt_reason,
+                       G_opal_dynamic_table.dynamic.quick_power_drop,
+                       AMEC_INTF_GET_OVERSUBSCRIPTION());
+                L_first_mem_trace = false;
+            }
         }
 
         // check for OCC state change
@@ -622,6 +662,7 @@ void check_for_opal_updates(void)
              commitErrl(&l_errl);
          }
     }
+
 }
 
 
diff --git a/src/occ_405/thread/chom.c b/src/occ_405/thread/chom.c
index dbb3a87..24f849a 100755
--- a/src/occ_405/thread/chom.c
+++ b/src/occ_405/thread/chom.c
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER OnChipController Project                                     */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2011,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -347,8 +347,8 @@ void chom_update_sensors()
                                                    g_chom->sensorData[0].pwrMode.numOfSamples);
     }
 
-    // Collect the error history data
-    int proc_idx = 0, errh_idx = 0, slv_idx = 0, entry_idx = 0;
+    // Collect the error history data and fclip history
+    int proc_idx = 0, errh_idx = 0, slv_idx = 0, entry_idx = 0, clip_idx = 0;
 
     // get the master proc index
     uint8_t master_id = G_pbax_id.chip_id;
@@ -364,6 +364,11 @@ void chom_update_sensors()
         }
         else
         {
+            // Add Fclip history
+            g_chom->nodeData.fClipHist[clip_idx] =
+                G_dcom_slv_outbox_rx[proc_idx].fClipHist;
+            clip_idx++;
+
             // Iterate through each proc's error history counts
             for( errh_idx = 0; errh_idx < DCOM_MAX_ERRH_ENTRIES; errh_idx++)
             {
diff --git a/src/occ_405/thread/chom.h b/src/occ_405/thread/chom.h
index 8f03809..9efadd3 100755
--- a/src/occ_405/thread/chom.h
+++ b/src/occ_405/thread/chom.h
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER OnChipController Project                                     */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2011,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -31,14 +31,14 @@
 #include <apss.h>
 
 #define  CHOM_GEN_LOG_PERIODIC_TIME     86400 // seconds in a day
-#define  CHOM_VERSION                   0x01
+#define  CHOM_VERSION                   0x02
 // Max size of chom data log
 #define  CHOM_LOG_DATA_MAX              3072
 // Max number of memory bandwidth CHOM sensors
 #define  MAX_NUM_MEMORY_SENSORS         32
 // Max number of procs Call Home will get data for
 #define CHOM_MAX_OCCS                   4
-// Max number of error history entries to add to all home log
+// Max number of error history entries to add to call home log
 #define CHOM_MAX_ERRH_ENTRIES            4
 // List of call home sensors (Max 126)
 enum
@@ -178,6 +178,7 @@ struct ChomNodeData
     uint16_t       numSensors;                    // the number of sensors for which call home data was collected
     // error history counts. Only collect on up to 3 slaves, excluding master
     error_history_count_t errhCounts[CHOM_MAX_OCCS-1][CHOM_MAX_ERRH_ENTRIES];
+    uint32_t       fClipHist[CHOM_MAX_OCCS-1];
 } __attribute__ ((__packed__));
 
 typedef struct ChomNodeData ChomNodeData_t;