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| author | mbroyles <mbroyles@us.ibm.com> | 2018-04-23 15:10:03 -0500 |
|---|---|---|
| committer | Martha Broyles <mbroyles@us.ibm.com> | 2018-04-24 09:27:58 -0400 |
| commit | e9726b77dfc6279ed6e959cd77ba4bf405e74acc (patch) | |
| tree | 1fe151703ff29c86f030e2624e5568c904713357 | |
| parent | 61cd385caa634b5d8d63d3a21138c25230227d89 (diff) | |
| download | talos-occ-e9726b77dfc6279ed6e959cd77ba4bf405e74acc.tar.gz talos-occ-e9726b77dfc6279ed6e959cd77ba4bf405e74acc.zip | |
Fix using UT before WOF is fully enabled when running with OPAL
Remove GPE error trace for core offline
Change-Id: If6981046073086b01448e0eafd726d462076dc1d
CQ: SW424084
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57684
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
| -rwxr-xr-x | src/occ_405/state.c | 21 | ||||
| -rw-r--r-- | src/occ_gpe0/gpe_core_data.c | 4 |
2 files changed, 22 insertions, 3 deletions
diff --git a/src/occ_405/state.c b/src/occ_405/state.c index 7718ecf..19da6b2 100755 --- a/src/occ_405/state.c +++ b/src/occ_405/state.c @@ -5,7 +5,7 @@ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2011,2017 */ +/* Contributors Listed Below - COPYRIGHT 2011,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -583,6 +583,7 @@ errlHndl_t SMGR_observation_to_active() int l_extRc = OCC_NO_EXTENDED_RC; int l_rc = 0; uint32_t l_user_data = 0; + uint32_t l_freq = 0; Pstate l_pstate; // clear mnfg quad pstate request to default OCC to control all quads @@ -610,7 +611,23 @@ errlHndl_t SMGR_observation_to_active() // become enabled. if(G_present_cores != 0 ) { - l_pstate = proc_freq2pstate(G_proc_fmax_mhz); + if(G_sysConfigData.system_type.kvm) + { + // OCC controls frequency via clip + // set clip to nominal/turbo until WOF is fully enabled + if(G_sysConfigData.sys_mode_freq.table[OCC_MODE_TURBO] > G_sysConfigData.sys_mode_freq.table[OCC_MODE_NOMINAL]) + l_freq = G_sysConfigData.sys_mode_freq.table[OCC_MODE_TURBO]; + else + l_freq = G_sysConfigData.sys_mode_freq.table[OCC_MODE_NOMINAL]; + + l_pstate = proc_freq2pstate(l_freq); + } + else + { + // OCC controls frequency with PMCR so ok to set clips wide open + // the OCC won't actually write UT to PMCR unless WOF is fully enabled + l_pstate = proc_freq2pstate(G_proc_fmax_mhz); + } l_rc = pgpe_set_clip_blocking(l_pstate); if(l_rc) diff --git a/src/occ_gpe0/gpe_core_data.c b/src/occ_gpe0/gpe_core_data.c index 0911a49..923a7c8 100644 --- a/src/occ_gpe0/gpe_core_data.c +++ b/src/occ_gpe0/gpe_core_data.c @@ -57,7 +57,9 @@ void gpe_get_core_data(ipc_msg_t* cmd, void* arg) if(rc) { - if( !(L_trace & (1 << args->core_num)) ) + // trace non-offline error once per core. + // offline errors are normal with stop states and ignored by the 405 + if( (!(L_trace & (1 << args->core_num))) && (rc != PCB_ERROR_CHIPLET_OFFLINE) ) { PK_TRACE("gpe_get_core_data: get_core_data failed, rc = 0x%08x, core = 0x%08x", rc, args->core_num); |
