diff options
author | William Bryan <wilbryan@us.ibm.com> | 2015-08-06 17:38:30 -0500 |
---|---|---|
committer | William A. Bryan <wilbryan@us.ibm.com> | 2015-08-07 13:03:14 -0500 |
commit | 415a7a297bcd313516be30ae88277379f3377cc9 (patch) | |
tree | 5f7f7a8ecfb49e5ad6268d16efcc5ac5feadae1d | |
parent | c64c10490a90584ad69d12dd4fac1a4288a26c45 (diff) | |
download | talos-occ-415a7a297bcd313516be30ae88277379f3377cc9.tar.gz talos-occ-415a7a297bcd313516be30ae88277379f3377cc9.zip |
OCC405 Stripped Down and Compiles
Change-Id: Ic5c0536de429106975f5b5b0831c645d6f53e86c
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19650
Tested-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
39 files changed, 1090 insertions, 833 deletions
@@ -15,4 +15,4 @@ customrc env.bash src/build/ *.sw* - +obj/ diff --git a/src/Makefile b/src/Makefile index a9dd842..8f2c443 100755 --- a/src/Makefile +++ b/src/Makefile @@ -22,71 +22,75 @@ # permissions and limitations under the License. # # IBM_PROLOG_END_TAG +ifndef BASE_OBJDIR +BASE_OBJDIR = $(abspath ../obj) +endif -ifndef ROOTPATH -ROOTPATH = $(shell pwd) -export OCCROOT = $(ROOTPATH) +ifndef BASE_SRCDIR +BASE_SRCDIR = $(abspath ./) endif -#******************************************************************************* -# mk variable Declaration -#******************************************************************************* -SUBDIRS = tracepp occBootLoader occ_405 occApplet -COMBINE_IMAGE_SUBDIRS = occBootLoader occ_405 occApplet -CLEAN_SUBDIRS = occBootLoader occ_405 occApplet ssx/pgp lib -CLEANCMD = $(MAKE) clean -C $(dir) -ALLCMD = $(MAKE) -C $(dir) -COMBINEIMAGE = $(MAKE) combineImage -C $(dir) -IMAGEFILE = image.bin - -export TRACEPP = $(ROOTPATH)/tracepp/tracepp -TRACEHASH = $(ROOTPATH)/tracepp/tracehash.pl - -#******************************************************************************* -# Compilation -#******************************************************************************* -all: - $(foreach dir,$(SUBDIRS),$(ALLCMD) &&) true - -#******************************************************************************* -# Combine Objects/Executables into OCC Image -#******************************************************************************* -.PHONY : combineImage -combineImage: - rm -rf $(IMAGEFILE) - $(foreach dir,$(COMBINE_IMAGE_SUBDIRS),$(COMBINEIMAGE) &&) true - -#******************************************************************************* -# Create lid or ruhx out of OCC Image -#******************************************************************************* -.PHONY : 81e004%.ruhx -81e004%.ruhx: - occgenlid.pl -i ${IMAGEFILE} -l $(basename $@) - -.PHONY : 81e004%.lid -81e004%.lid: - cp ${IMAGEFILE} $(dir $(IMAGEFILE))/$@ - -#******************************************************************************* -# Create occStringFile -#******************************************************************************* -# FIXME depending on where .o files end up +OBJDIR = $(BASE_OBJDIR)$(SUB_OBJDIR) +SRCDIR = $(BASE_SRCDIR)$(SUB_SRCDIR) + +ifndef PPETRACEPP_DIR +export PPETRACEPP_DIR = $(abspath ppe/tools/ppetracepp) +endif + +THASH = $(PPETRACEPP_DIR)/tracehash.pl + +OCC_405_IMAGE_NAME = occ_405 +OCC_GPE0_IMAGE_NAME = occ_gpe0 +OCC_GPE1_IMAGE_NAME = occ_gpe1 +OCC_GPE2_IMAGE_NAME = occ_gpe2 +OCC_GPE3_IMAGE_NAME = occ_gpe3 + +NEEDED_IMAGES = \ + $(OBJDIR)/$(OCC_405_IMAGE_NAME)/$(OCC_405_IMAGE_NAME).out \ + $(OBJDIR)/$(OCC_GPE0_IMAGE_NAME)/$(OCC_GPE0_IMAGE_NAME).out \ +# $(OBJDIR)/$(OCC_GPE1_IMAGE_NAME)/$(OCC_GPE1_IMAGE_NAME).out \ +# $(OBJDIR)/$(OCC_GPE2_IMAGE_NAME)/$(OCC_GPE2_IMAGE_NAME).out \ +# $(OBJDIR)/$(OCC_GPE3_IMAGE_NAME)/$(OCC_GPE3_IMAGE_NAME).out + +#SIMICS_WS = /gsa/ausgsa/home/d/a/davidy/work/simics-ppeWork + +#default is to build images +needed_images: $(NEEDED_IMAGES) + +run: $(NEEDED_IMAGES) + $(SIMICS_WS)/simics \ + -e '$$occ_405_binary_to_load=$(OBJDIR)/$(OCC_405_IMAGE_NAME)/$(OCC_405_IMAGE_NAME).out' \ + -e '$$occ_gpe0_binary_to_load=$(OBJDIR)/$(OCC_GPE0_IMAGE_NAME)/$(OCC_GPE0_IMAGE_NAME).out' \ +# -e '$$occ_gpe1_binary_to_load=$(OBJDIR)/$(OCC_GPE1_IMAGE_NAME)/$(OCC_GPE1_IMAGE_NAME).out' \ +# -e '$$occ_gpe2_binary_to_load=$(OBJDIR)/$(OCC_GPE2_IMAGE_NAME)/$(OCC_GPE2_IMAGE_NAME).out' \ +# -e '$$occ_gpe3_binary_to_load=$(OBJDIR)/$(OCC_GPE3_IMAGE_NAME)/$(OCC_GPE3_IMAGE_NAME).out' \ + modelsetup.simics + + + +#clean the obj directory +clean: + rm -fr $(OBJDIR) + +#make binary application images +$(OBJDIR)/$(OCC_405_IMAGE_NAME)/$(OCC_405_IMAGE_NAME).out: + (cd $(SRCDIR)/$(OCC_405_IMAGE_NAME) && make) + +$(OBJDIR)/$(OCC_GPE0_IMAGE_NAME)/$(OCC_GPE0_IMAGE_NAME).out: + (cd $(SRCDIR)/$(OCC_GPE0_IMAGE_NAME) && make) + +$(OBJDIR)/$(OCC_GPE1_IMAGE_NAME)/$(OCC_GPE1_IMAGE_NAME).out: +# (cd $(SRCDIR)/$(OCC_GPE1_IMAGE_NAME) && make) + +$(OBJDIR)/$(OCC_GPE2_IMAGE_NAME)/$(OCC_GPE2_IMAGE_NAME).out: +# (cd $(SRCDIR)/$(OCC_GPE2_IMAGE_NAME) && make) + +$(OBJDIR)/$(OCC_GPE3_IMAGE_NAME)/$(OCC_GPE3_IMAGE_NAME).out: +# (cd $(SRCDIR)/$(OCC_GPE3_IMAGE_NAME) && make) + +# collect all of the trace hash files for all OCC images into a single trexStringFile .PHONY : tracehash tracehash: - $(TRACEHASH) -c -d . -s $(ROOTPATH)/occStringFile - -#******************************************************************************* -# Create occcSrcParse.C -#******************************************************************************* -# FIXME error log parser plugins not relevant to OpenPOWER, tool location unknown -.PHONY : srcPluginFile -srcPluginFile: - scanforsrcs.pl - -#******************************************************************************* -# Clean -#******************************************************************************* -clean: - $(foreach dir,$(CLEAN_SUBDIRS),$(CLEANCMD) &&) true - rm -rf image.bin - + mkdir -p $(BASE_OBJDIR) + $(THASH) -c -d $(BASE_OBJDIR) -s $(BASE_OBJDIR)/combStringFile + diff --git a/src/occ_405/Makefile b/src/occ_405/Makefile index bba6075..da572d0 100755 --- a/src/occ_405/Makefile +++ b/src/occ_405/Makefile @@ -1,11 +1,11 @@ # IBM_PROLOG_BEGIN_TAG # This is an automatically generated prolog. # -# $Source: src/occ/Makefile $ +# $Source: src/occ_405/Makefile $ # # OpenPOWER OnChipController Project # -# Contributors Listed Below - COPYRIGHT 2011,2015 +# Contributors Listed Below - COPYRIGHT 2015 # [+] International Business Machines Corp. # # @@ -22,70 +22,96 @@ # permissions and limitations under the License. # # IBM_PROLOG_END_TAG +# This Makefile compiles all of the SSX code required for the P9 port +# of SSX. See the "img_defs.mk" file in this directory. -include cfiles.mk -include gpefiles.mk - -APP = occ -APP_INCLUDES += -I../ssx -APP_INCLUDES += -I../lib -APP_INCLUDES += -I./incl -APP_INCLUDES += -I./trac -APP_INCLUDES += -I./async -APP_INCLUDES += -I./errl -APP_INCLUDES += -I./gpe -APP_INCLUDES += -I./thread -APP_INCLUDES += -I./aplt -APP_INCLUDES += -I./aplt/incl -APP_INCLUDES += -I./rtls -APP_INCLUDES += -I./dcom -APP_INCLUDES += -I./sensor -APP_INCLUDES += -I./pss -APP_INCLUDES += -I./proc -APP_INCLUDES += -I./cent -APP_INCLUDES += -I./cmdh -APP_INCLUDES += -I./amec -APP_INCLUDES += -I. -APP_INCLUDES += -I../occ -APP_INCLUDES += -I../../occ -APP_INCLUDES += -I./timer -APP_INCLUDES += -I./firdata - -export APP_INCLUDES - -D += -DOCC_FIRMWARE=1 \ - -DSIMICS_MAGIC_PANIC=1 \ - -DOCC=1 \ - -DNONCACHEABLE_SUPPORT=1 \ - -DUSE_SSX_APP_CFG_H=1 - -# TODO: Needs section comment on default values for compile defs and info on what defs do -#D = -DVERIFICATION=1 \ - -DSSX_STACK_CHECK=0 \ - -DINITIALIZE_PMC=0 \ - -DINITIALIZE_SIMICS_IO=0 \ - -DINITIALIZE_RTX_IO=1 \ - -DINITIALIZE_PBA=1 \ - -DSIMICS_MAGIC_PANIC=1 \ - -DSSX_KERNEL_TRACE_ENABLE=1 - -# TODO: Aren't trace strings hashed out of the image already? -# If this makefile is called as "make NO_TRAC_STRINGS=1" then trace strings -# won't be built into the image. This will be used for metrics regarded to the -# realistic OCC Code Size. Note that "make clean" must be run before this define -# will be picked up by the compiler, otherwise previously compiled objects will -# be used. You can also see the space used by strings by running: -# strings occ.bin | \grep "ERR\|INF\|IMP" | sed 's/^...: %s: //g' | wc -m -ifdef NO_TRAC_STRINGS -D += -DNO_TRAC_STRINGS=1 -endif +#Pull in the definitions that affect all makefiles for this image +include img_defs.mk + +#Pull in object file names for the top directory +include topfiles.mk + +SSX_MAKE_DIR := $(SSX_SRCDIR)/occhw +OBJS := $(addprefix $(OBJDIR)/, $(TOP_OBJECTS)) +OBJDIRS = $(dir ${OBJS}) +SSXLIB := $(OBJDIR)/ssx/libssx.a +COMMONLIB := $(OBJDIR)/common/libcommon.a +OCCLIB := $(OBJDIR)/occlib/libocc.a +PPC405LIB := $(OBJDIR)/ppc405lib/libppc405.a +LINK_OBJS = $(OBJS) $(SSXLIB) $(COMMONLIB) $(OCCLIB) $(PPC405LIB) +LINK_SCRIPT = $(addprefix $(OBJDIR)/, linkscript) +LDFLAGS += --oformat=elf32-powerpc -melf32ppc +LIB_DIRS = -L$(OBJDIR)/ssx \ + -L$(OBJDIR)/ssx/ppc405 \ + -L$(OBJDIR)/ssx/ppc32 \ + -L$(OBJDIR)/commonlib \ + -L$(OBJDIR)/occlib \ + -L$(OBJDIR)/ppc405lib \ + -L$(OBJDIR) \ + -L$(OBJDIR)/aplt \ + -L$(OBJDIR)/cmdh \ + -L$(OBJDIR)/dcom \ + -L$(OBJDIR)/errl \ + -L$(OBJDIR)/pss \ + -L$(OBJDIR)/rtls \ + -L$(OBJDIR)/thread \ + -L$(OBJDIR)/timer \ + -L$(OBJDIR)/trac \ + +#default target is to make a binary application image +#This removes all unecessary headers from the ELF executable +$(OBJDIR)/$(IMAGE_NAME).bin $(OBJDIR)/$(IMAGE_NAME).dis: $(OBJDIR)/$(IMAGE_NAME).out + $(OBJCOPY) -O binary $< $(OBJDIR)/$(IMAGE_NAME).bin + $(OBJDUMP) -S $< > $(OBJDIR)/$(IMAGE_NAME).dis + +#create a linked ELF executable +$(OBJDIR)/$(IMAGE_NAME).out: $(LINK_OBJS) $(LINK_SCRIPT) + $(LD) -e __ssx_boot -T$(LINK_SCRIPT) $(LDFLAGS) -Map $(OBJDIR)/$(IMAGE_NAME).map -Bstatic -o $(OBJDIR)/$(IMAGE_NAME).out $(LIB_DIRS) -lssx -locc -lppc405 -lcommon + +#pass the link command file through the C preprocessor to evaluate macros and remove comments +$(LINK_SCRIPT): linkocc.cmd + $(CPP) -E -x c -P $(DEFS) linkocc.cmd -o $(LINK_SCRIPT) + +#Create an obj directory if needed +$(LINK_OBJS) $(OBJS) $(OBJS:.o=.d): | $(OBJDIRS) -SOURCES = ${all_cfiles} ${all_gpefiles} -MODE = validation -PGP_ASYNC_SUPPORT = 1 +$(OBJDIRS): + mkdir -p $(OBJDIRS) + -include ./app.mk +#Build the SSX kernel library +$(SSXLIB): + $(MAKE) -I $(IMAGE_SRCDIR) -C $(SSX_MAKE_DIR) -pgas: - $(CC) $(CFLAGS) -c -Wa,-al -Wa,--listing-cont-lines='10' ${all_gpefiles} +#Build the code that is common for all processors (PPE's and 405) +$(COMMONLIB): + $(MAKE) -I $(IMAGE_SRCDIR) -C $(COMMONLIB_SRCDIR) +#Build the code that is common for all OCC processors (GPEs and 405) +$(OCCLIB): + $(MAKE) -I $(IMAGE_SRCDIR) -C $(OCCLIB_SRCDIR) + +#Build the library code that only works on the ppc405 +$(PPC405LIB): + $(MAKE) -I $(IMAGE_SRCDIR) -C $(PPC405LIB_SRCDIR) + +# collect all of the trace hash files for this image into a single trexStringFile +.PHONY : tracehash +tracehash: + mkdir -p $(OBJDIR) + $(THASH) -c -d $(OBJDIR) -s $(OBJDIR)/trexStringFile + +# load and run the 405 image in simics +run: $(OBJDIR)/$(IMAGE_NAME).out + $(SIMICS_WS)/simics \ + -e '$$occ_405_binary_to_load=$(OBJDIR)/$(IMAGE_NAME).out' modelsetup.simics + +#clean out all generated files +.PHONY : clean +clean: + rm -fr $(OBJDIR) + +#Add dependencies to header files +ifneq ($(MAKECMDGOALS),clean) +include $(OBJS:.o=.d) +endif diff --git a/src/occ_405/aplt/appletManager.c b/src/occ_405/aplt/appletManager.c index e2e70df..e739803 100755 --- a/src/occ_405/aplt/appletManager.c +++ b/src/occ_405/aplt/appletManager.c @@ -23,9 +23,9 @@ /* */ /* IBM_PROLOG_END_TAG */ -//************************************************************************* +//*************************************************************************/ // Includes -//************************************************************************* +//*************************************************************************/ #include "ssx.h" #include <trac_interface.h> #include <appletManager.h> @@ -38,23 +38,23 @@ #include <errl.h> #include <state.h> #include "pba_firmware_registers.h" -#include "pgp_pba.h" -#include "pgp_async.h" +#include "occhw_pba.h" +#include "occhw_async.h" #include "ppc405_mmu.h" -#include "pgp.h" +#include "occhw.h" #include "cmdh_fsp.h" -//************************************************************************* +//*************************************************************************/ // Externs -//************************************************************************* +//*************************************************************************/ -//************************************************************************* +//*************************************************************************/ // Macros -//************************************************************************* +//*************************************************************************/ -//************************************************************************* +//*************************************************************************/ // Defines/Enums -//************************************************************************* +//*************************************************************************/ #define TEST_APPLET_ADDR (uint32_t)&_APPLET1_SECTION_BASE #define PRDT_APPLET_ADDR (uint32_t)&_APPLET0_SECTION_BASE #define TEST_APPLET_MAX_SIZE (uint32_t)&_APPLET1_SECTION_SIZE @@ -237,8 +237,9 @@ errlHndl_t __attribute__((optimize("O1"))) initAppletAddr( void ) l_appHeader->sram_repair_reserved[14], l_appHeader->sram_repair_reserved[15]); - TRAC_ERR("wrong magic number. applet count: %d, header addr: %p, magic no: 0x%08x%08x%08x%08x", - l_cnt, l_appHeader, l_srr_0, l_srr_1, l_srr_2, l_srr_3); + // TEMP -- SSX ONLY SUPPORTS MAX OF 5 PARAMS + //TRAC_ERR("wrong magic number. applet count: %d, header addr: %p, magic no: 0x%08x%08x%08x%08x", + // l_cnt, l_appHeader, l_srr_0, l_srr_1, l_srr_2, l_srr_3); #endif break; } @@ -247,8 +248,9 @@ errlHndl_t __attribute__((optimize("O1"))) initAppletAddr( void ) if( l_appHeader->aplt_id >= OCC_APLT_TEST ) { l_foundInvalid = TRUE; - TRAC_ERR("applet ID out of range. applet count: %d, header addr: %p, id: %d", - l_cnt, l_appHeader, l_appHeader->aplt_id); +// TEMP -- ERROR TRACING THE POINTER FOR SOME REASON +// TRAC_ERR("applet ID out of range. applet count: %d, header addr: %p, id: %d", +// l_cnt, l_appHeader, l_appHeader->aplt_id); break; } @@ -256,8 +258,9 @@ errlHndl_t __attribute__((optimize("O1"))) initAppletAddr( void ) if( (l_appHeader->image_size == 0) || (l_appHeader->image_size > PRDT_APPLET_MAX_SIZE) ) { l_foundInvalid = TRUE; - TRAC_ERR("bad image_size. applet count: %d, applet ID: 0x%02x, header addr: %p, image_size: %d, avail space: %d", - l_cnt, l_appHeader->aplt_id, l_appHeader, l_appHeader->image_size, PRDT_APPLET_MAX_SIZE); +// TEMP --- TRACE ERRORS +// TRAC_ERR("bad image_size. applet count: %d, applet ID: 0x%02x, header addr: %p, image_size: %d, avail space: %d", +// l_cnt, l_appHeader->aplt_id, l_appHeader, l_appHeader->image_size, PRDT_APPLET_MAX_SIZE); break; } @@ -285,8 +288,9 @@ errlHndl_t __attribute__((optimize("O1"))) initAppletAddr( void ) if( l_appHeader->start_addr != PRDT_APPLET_ADDR ) { l_foundInvalid = TRUE; - TRAC_ERR("bad start_addr. applet count: %d, applet ID: 0x%02x, header addr: %p, expected addr: 0x%08x, actual addr: 0x%08x", - l_cnt, l_appHeader->aplt_id, l_appHeader, PRDT_APPLET_ADDR, l_appHeader->start_addr); +// TEMP -- TRACE ERROR +// TRAC_ERR("bad start_addr. applet count: %d, applet ID: 0x%02x, header addr: %p, expected addr: 0x%08x, actual addr: 0x%08x", +// l_cnt, l_appHeader->aplt_id, l_appHeader, PRDT_APPLET_ADDR, l_appHeader->start_addr); break; } @@ -297,8 +301,9 @@ errlHndl_t __attribute__((optimize("O1"))) initAppletAddr( void ) if( (l_appHeader->ep_addr < l_ep_addr_min) || (l_appHeader->ep_addr >= l_ep_addr_max) ) { l_foundInvalid = TRUE; - TRAC_ERR("entry point out of range. applet count: %d, applet ID: 0x%02x, header addr: %p, ep_addr: 0x%08x, ep_range: 0x%08x - 0x%08x", - l_cnt, l_appHeader->aplt_id, l_appHeader, l_appHeader->ep_addr, l_ep_addr_min, l_ep_addr_max); +// TEMP -- TOO MANY ARGS FOR TRACE +// TRAC_ERR("entry point out of range. applet count: %d, applet ID: 0x%02x, header addr: %p, ep_addr: 0x%08x, ep_range: 0x%08x - 0x%08x", +// l_cnt, l_appHeader->aplt_id, l_appHeader, l_appHeader->ep_addr, l_ep_addr_min, l_ep_addr_max); break; } diff --git a/src/occ_405/app.mk b/src/occ_405/app.mk deleted file mode 100755 index 025b100..0000000 --- a/src/occ_405/app.mk +++ /dev/null @@ -1,186 +0,0 @@ -# IBM_PROLOG_BEGIN_TAG -# This is an automatically generated prolog. -# -# $Source: src/occ/app.mk $ -# -# OpenPOWER OnChipController Project -# -# Contributors Listed Below - COPYRIGHT 2011,2015 -# [+] International Business Machines Corp. -# -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or -# implied. See the License for the specific language governing -# permissions and limitations under the License. -# -# IBM_PROLOG_END_TAG - -# Description: mk occ application -# -# This Makefile is included-ed into application Makefiles and -# encapsulates the steps necessary to create application images. -# -# The application Makefile (user) must define the following variables: -# -# APP - The name of the application -# SOURCES - The list of local source files that implement the -# application. -# -# The application Makefile (user) may optionally define the following -# variables: -# -# D - The value of $(D) is appended to DEFS defined by ssx.mk -# -# MODE - The following modes are recognized: -# -# validation - (Default) An application that requires all SSX -# services. -# -# firmware - An interrupt only configuration. -# -# The make process creates the following files: -# -# $(APP).out - The PowerPC-ELF version of the application -# $(APP).bin - A binary SRAM image of the application -# $(APP).map - The linker map of the application -# - -OCC = . -SSX = ../ssx -LIB = ../lib -PGP = $(SSX)/pgp -SSXDIR = $(SSX)/ssx -PPC405 = $(SSX)/ppc405 -BOOTLOADER = ../occBootLoader - -ifeq "$(MODE)" "firmware" -SSX_TIMER_SUPPORT = 0 -SSX_THREAD_SUPPORT = 0 -endif - -export SSX_TIMER_SUPPORT -export SSX_THREAD_SUPPORT -export PPC405_MMU_SUPPORT -export PGP_ASYNC_SUPPORT - -INCLUDES += -I$(OCC) -I$(LIB) - -include $(PGP)/ssx.mk -include $(PGP)/ssxpgpfiles.mk -include $(SSXDIR)/ssxssxfiles.mk -include $(PPC405)/ssxppc405files.mk -include $(LIB)/libgpefiles.mk - -all_gpefiles += ${addprefix ../lib/,${LIB_PSOBJECTS}} - -GPE_OBJECTS = ${all_gpefiles} -OCC_OBJECTS = ${occ_cfiles} ${occ_Sfiles} -OBJECTS = ${GPE_OBJECTS} ${OCC_OBJECTS} - -# Need full paths to all .o files for commands that follow -LDFLAGS = \ - -L $(SSX)/ssx \ - -L $(SSX)/ppc32 \ - -L $(SSX)/ppc405 \ - -L $(SSX)/pgp \ - -L $(OCC) \ - -L $(LIB) \ - -L $(OCC)/amec \ - -L $(OCC)/aplt \ - -L $(OCC)/cent \ - -L $(OCC)/cmdh \ - -L $(OCC)/dcom \ - -L $(OCC)/errl \ - -L $(OCC)/gpe \ - -L $(OCC)/proc \ - -L $(OCC)/pss \ - -L $(OCC)/rtls \ - -L $(OCC)/sensor \ - -L $(OCC)/thread \ - -L $(OCC)/timer \ - -L $(OCC)/trac \ - -L $(OCC)/firdata \ - -lssx -lppc32 --oformat=elf32-powerpc -melf32ppc - -# Added for linking files compiled using gnu assembler -LDARGS = --no-warn-mismatch --accept-unknown-input-arch -# Changed to use GCC-DEFS instead of DEFS so that different defines -# can be used for compiling .S and .pS files -GCC-DEFS += $(D) - -#******************************************************************************* -# compilation -#******************************************************************************* - -# Use complex method for linking pore and PPC objects -all: $(OBJECTS) libssx.a -# add -w to inhibit all warnings - $(MAKE) -w -C $(PGP) DEFS="$(DEFS)" -e - $(CPP) -P $(DEFS) < $(OCC)/linkocc.cmd > linkscript - -# Create gpe binary with symbols undefined -# First stage link, no ppc syms yet. Link with -noinhibit-exec to prevent -# undefined syms killing output. This binary won't be located at the -# correct base address, but can reasonably be assumed to be the correct -# size. (If it isn't the right size, then iterate over another link stage.) - $(PORE-LD) -o gpe_1.out $(GPE_OBJECTS) -noinhibit-exec -Map gpe_1.map -e 0 - $(PORE-OBJCOPY) -O binary gpe_1.out gpe_1.bin - -# Insert gpe binary to occ -# Don't link with -zmuldefs here so we get an error if PORE symbols -# clash with PowerPC ones. - $(LD) -o occ_1.out -R gpe_1.out \ - -Tlinkscript $(LDFLAGS) $(LDARGS) -Map occ_1.map -Bstatic -b binary gpe_1.bin - # Find the address of gpe binary and create gpe binary with symbols relocated - # Find where pore binary was placed. The symbol we look for - # incorporates the name of the binary we linked above. - # Second stage link of pore object at the correct address (from symbols above) - # now gets ppc syms added from occ_1.out, -z muldefs stops multiple def - # errors when we get pore symbols from occ_1.out too - pore_base=`nm occ_1.out | grep _binary_gpe_1_bin_start | sed -e s', .*,,'`;$(PORE-LD) -o gpe.out \ - $(GPE_OBJECTS) -Ttext $$pore_base --no-warn-mismatch --accept-unknown-input-arch -R occ_1.out -z muldefs -Map gpe.map -e 0 - $(PORE-OBJCOPY) -O binary gpe.out gpe.bin - - # Insert the gpe binary to occ and relocate the symbols in occ - # Create gep_2.out that is used by OCC_OBJECTS to relocate the symboles in occ - # so we have all symboles relocated in both OCC_OBJECTS and gpe.bin - pore_base=`nm occ_1.out | grep _binary_gpe_1_bin_start | sed -e s', .*,,'`;$(PORE-LD) -o gpe_2.out \ - $(GPE_OBJECTS) -Ttext $$pore_base --no-warn-mismatch --accept-unknown-input-arch -noinhibit-exec -Map gpe_2.map -e 0 - - $(LD) -o occ.out -R gpe_2.out \ - -Tlinkscript $(LDFLAGS) $(LDARGS) -Map occ.map -Bstatic -b binary gpe.bin - -# Specify source object format as elf32-powerpc - $(OBJCOPY) -I elf32-powerpc -O binary $(APP).out $(APP).bin - $(OBJDUMP) -D $(APP).out > $(APP).dis - $(BOOTLOADER)/imageHdrScript $(APP).bin `md5sum $(APP).out | cut -c 1-4` - -libssx.a: - $(MAKE) -C $(LIB) DEFS="$(DEFS)" -e - -.PHONY : combineImage -combineImage: - $(BOOTLOADER)/imageHdrScript $(APP).bin combineImage - $(BOOTLOADER)/imageHdrScript $(APP).out displaySize - -.PHONY : clean -clean: - rm -f *.o *.d *.d.* *.out *.bin *.srec *.dis *.map *.hash linkscript - rm -f ./*/*.o ./*/*.d ./*/*.d.* ./*/*.hash - -.PHONY : clean_all -clean_all: - $(MAKE) clean - $(MAKE) -C $(PGP) clean - -ifneq ($(MAKECMDGOALS),clean) --include $(OBJECTS:.o=.d) -endif diff --git a/src/occ_405/cent/centaur_control.c b/src/occ_405/cent/centaur_control.c index 825de18..801bd04 100755 --- a/src/occ_405/cent/centaur_control.c +++ b/src/occ_405/cent/centaur_control.c @@ -23,12 +23,12 @@ /* */ /* IBM_PROLOG_END_TAG */ -//************************************************************************* +//*************************************************************************/ // Includes -//************************************************************************* +//*************************************************************************/ #include "centaur_control.h" #include "centaur_data.h" -#include "pgp_async.h" +#include "occhw_async.h" #include "threadSch.h" #include "pmc_register_addresses.h" #include "centaur_data_service_codes.h" @@ -43,17 +43,17 @@ #include "centaur_register_addresses.h" #include "amec_sys.h" -//************************************************************************* +//*************************************************************************/ // Externs -//************************************************************************* +//*************************************************************************/ -//************************************************************************* +//*************************************************************************/ // Macros -//************************************************************************* +//*************************************************************************/ -//************************************************************************* +//*************************************************************************/ // Defines/Enums -//************************************************************************* +//*************************************************************************/ // Used for Centaur Initialization of Registers typedef enum @@ -65,13 +65,13 @@ typedef enum } eCentaurThrottleRegs; -//************************************************************************* +//*************************************************************************/ // Structures -//************************************************************************* +//*************************************************************************/ -//************************************************************************* +//*************************************************************************/ // Globals -//************************************************************************* +//*************************************************************************/ //Pore flex request for the GPE job that is used for centaur init. PoreFlex G_centaur_control_pore_req; @@ -94,13 +94,13 @@ centaur_throttle_t G_centaurThrottleLimits[MAX_NUM_CENTAURS][NUM_MBAS_PER_CENTAU //bitmap of configured MBA's (2 per centaur, lsb is centaur 0/mba 0) uint16_t G_configured_mbas = 0; -//************************************************************************* +//*************************************************************************/ // Function Prototypes -//************************************************************************* +//*************************************************************************/ -//************************************************************************* +//*************************************************************************/ // Functions -//************************************************************************* +//*************************************************************************/ ////////////////////////// // Function Specification diff --git a/src/occ_405/cent/centaur_control.h b/src/occ_405/cent/centaur_control.h index a92f7ad..9b37b0c 100755 --- a/src/occ_405/cent/centaur_control.h +++ b/src/occ_405/cent/centaur_control.h @@ -32,7 +32,7 @@ #include <occ_common.h> #include <ssx.h> #include "rtls.h" -#include "gpe_data.h" +//#include "gpe_data.h" #include "occ_sys_config.h" //************************************************************************* @@ -64,6 +64,8 @@ typedef enum } eCentaurControlTraceFlags; //Centaur data collect structures used for task data pointers +// TEMP -- PORE ISSUES +/* struct centaur_control_task { uint8_t startCentaur; uint8_t prevCentaur; @@ -73,6 +75,7 @@ struct centaur_control_task { PoreFlex gpe_req; } __attribute__ ((__packed__)); typedef struct centaur_control_task centaur_control_task_t; +*/ //per mba throttle values typedef struct @@ -88,7 +91,8 @@ typedef struct //************************************************************************* //Global centaur structures used for task data pointers -extern centaur_control_task_t G_centaur_control_task; +// TEMP -- PORE ISSUES +//extern centaur_control_task_t G_centaur_control_task; //************************************************************************* // Function Prototypes diff --git a/src/occ_405/cent/centaur_data.h b/src/occ_405/cent/centaur_data.h index 2eec5fd..63cc264 100755 --- a/src/occ_405/cent/centaur_data.h +++ b/src/occ_405/cent/centaur_data.h @@ -32,7 +32,7 @@ #include <occ_common.h> #include <ssx.h> #include "rtls.h" -#include "gpe_data.h" +//#include "gpe_data.h" #include "occ_sys_config.h" //************************************************************************* @@ -106,6 +106,8 @@ enum eOccCentaurs //************************************************************************* //Centaur data collect structures used for task data pointers +// TEMP -- PORE ISSUES +/* struct centaur_data_task { uint8_t start_centaur; uint8_t current_centaur; @@ -115,6 +117,7 @@ struct centaur_data_task { PoreFlex gpe_req; } __attribute__ ((__packed__)); typedef struct centaur_data_task centaur_data_task_t; +*/ typedef union { @@ -129,7 +132,8 @@ typedef union //************************************************************************* //Global centaur structures used for task data pointers -extern centaur_data_task_t G_centaur_data_task; +// TEMP -- COMMENTED OUT DUE TO PORE ISSUES +//extern centaur_data_task_t G_centaur_data_task; //Global is bitmask of centaurs extern uint32_t G_present_centaurs; @@ -181,7 +185,8 @@ bool cent_chan_checkstop(const uint8_t i_cent); //Returns a pointer to the most up-to-date centaur data for the centaur //associated with the specified OCC centaur id. -MemData * cent_get_centaur_data_ptr( const uint8_t i_centaur_id ); +// TEMP -- WHERE IS MemData ?? +//MemData * cent_get_centaur_data_ptr( const uint8_t i_centaur_id ); #endif //_CENTAUR_DATA_H diff --git a/src/occ_405/cfiles.mk b/src/occ_405/cfiles.mk deleted file mode 100755 index 8fc299d..0000000 --- a/src/occ_405/cfiles.mk +++ /dev/null @@ -1,111 +0,0 @@ -# IBM_PROLOG_BEGIN_TAG -# This is an automatically generated prolog. -# -# $Source: src/occ/cfiles.mk $ -# -# OpenPOWER OnChipController Project -# -# Contributors Listed Below - COPYRIGHT 2011,2015 -# [+] International Business Machines Corp. -# -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or -# implied. See the License for the specific language governing -# permissions and limitations under the License. -# -# IBM_PROLOG_END_TAG -# -# Description: mk for c-object files for occ application -# - -occ_CFILES = \ - amec/amec_init.c \ - amec/amec_tasks.c \ - amec/amec_slave_smh.c \ - amec/amec_master_smh.c \ - amec/amec_sensors_core.c \ - amec/amec_sensors_centaur.c \ - amec/amec_sensors_power.c \ - amec/amec_sensors_fw.c \ - amec/amec_data.c \ - amec/amec_freq.c \ - amec/amec_amester.c \ - amec/amec_dps.c \ - amec/amec_part.c \ - amec/amec_perfcount.c \ - amec/amec_controller.c \ - amec/amec_oversub.c \ - amec/amec_pcap.c \ - amec/amec_health.c \ - amec/amec_parm.c \ - amec/amec_parm_table.c \ - amec/amec_analytics.c \ - aplt/appletManager.c \ - cent/centaur_data.c \ - cent/centaur_control.c \ - cmdh/cmdh_fsp.c \ - cmdh/cmdh_thread.c \ - cmdh/cmdh_fsp_cmds.c \ - cmdh/cmdh_fsp_cmds_datacnfg.c \ - cmdh/cmdh_mnfg_intf.c \ - cmdh/cmdh_tunable_parms.c \ - cmdh/cmdh_snapshot.c \ - cmdh/ffdc.c \ - dcom/dcom.c \ - dcom/dcom_thread.c \ - dcom/dcomSlaveTx.c \ - dcom/dcomSlaveRx.c \ - dcom/dcomMasterTx.c \ - dcom/dcomMasterRx.c \ - errl/errl.c \ - proc/proc_data.c \ - proc/proc_data_control.c \ - proc/proc_pstate.c \ - pss/apss.c \ - pss/dpss.c \ - rtls/rtls_tables.c \ - rtls/rtls.c \ - sensor/sensor.c \ - sensor/sensor_table.c \ - thread/threadSch.c \ - thread/chom.c \ - thread/thrm_thread.c \ - timer/timer.c \ - trac/trac_interface.c \ - occ_sys_config.c \ - arl_test.c \ - state.c \ - reset.c \ - mode.c \ - main.c \ - scom.c \ - homer.c \ - occbuildname.c \ - common.c \ - -occ_CFILES += firdata/ecc.c -occ_CFILES += firdata/fir_data_collect.c -occ_CFILES += firdata/firData.c -occ_CFILES += firdata/fsi.c -occ_CFILES += firdata/lpc.c -occ_CFILES += firdata/native.c -occ_CFILES += firdata/nor_micron.c -occ_CFILES += firdata/pnor_util.c -occ_CFILES += firdata/scom_trgt.c -occ_CFILES += firdata/scom_util.c -occ_CFILES += firdata/sfc_ast2400.c - -occ_SFILES = cmdh/ll_ffdc.S - - -occ_cfiles = ${occ_CFILES:.c=.o} -occ_Sfiles = ${occ_SFILES:.S=.o} - diff --git a/src/occ_405/cmdh/cmdh_fsp.c b/src/occ_405/cmdh/cmdh_fsp.c index 2151e67..c792254 100755 --- a/src/occ_405/cmdh/cmdh_fsp.c +++ b/src/occ_405/cmdh/cmdh_fsp.c @@ -24,7 +24,7 @@ /* IBM_PROLOG_END_TAG */ #include "ssx.h" -#include "special_wakeup.h" +//#include "special_wakeup.h" // lib/special_wakeup.h doesn't exist #include "cmdh_service_codes.h" #include "errl.h" #include "trac.h" @@ -105,8 +105,9 @@ errlHndl_t cmdh_processTmgtRequest (const cmdh_fsp_cmd_t * i_cmd_ptr, // End Function Specification void notifyCmdhWakeupCondition(eCmdhWakeupThreadMask i_cond) { - G_cmdh_thread_wakeup_mask |= i_cond; - ssx_semaphore_post(&G_cmdh_fsp_wakeup_thread); +// TEMP -- NO CMD Handler thread in Phase1 +// G_cmdh_thread_wakeup_mask |= i_cond; +// ssx_semaphore_post(&G_cmdh_fsp_wakeup_thread); } // Function Specification @@ -118,7 +119,8 @@ void notifyCmdhWakeupCondition(eCmdhWakeupThreadMask i_cond) // End Function Specification void clearCmdhWakeupCondition(eCmdhWakeupThreadMask i_cond) { - G_cmdh_thread_wakeup_mask &= ~i_cond; +// TEMP -- NO CMD Handler thread in Phase1 +// G_cmdh_thread_wakeup_mask &= ~i_cond; } @@ -144,8 +146,9 @@ void notifyFspDoorbellReceived(void * i_arg) // End Function Specification int cmdh_thread_wait_for_wakeup(void) { - int l_rc; - + int l_rc = 0; +// TEMP -- NO CMD Handler thread in Phase1 +/* // Check if we already have a pending wait for a doorbell, // if we do, don't schedule another one, that would result // in either undefined behavior or a race condition @@ -157,7 +160,7 @@ int cmdh_thread_wait_for_wakeup(void) // Wait for someone to wakeup this thread l_rc = ssx_semaphore_pend(&G_cmdh_fsp_wakeup_thread, SSX_WAIT_FOREVER); - +*/ return l_rc; } @@ -210,10 +213,12 @@ int cmdh_fsp_fsi2host_mbox_wait4free(void) l_disable_swup = FALSE; // Enable special wakeup so following getscom doesn't // fail with CHIPLET_OFFLINE error on sleeping cores - rc2 = occ_special_wakeup(TRUE, +// TEMP -- NO special_wakeup.h anymore! +/* rc2 = occ_special_wakeup(TRUE, l_cores, SWAKEUP_TIMEOUT_MS, &l_swup_timedout); +*/ if(rc2 || l_swup_timedout) { TRAC_ERR("cmdh_fsp_fsi2host_mbox_wait4free: enable occ_special_wakeup failed with rc=%d, timeout=0x%04x, cores=0x%04x", @@ -267,10 +272,12 @@ int cmdh_fsp_fsi2host_mbox_wait4free(void) { l_disable_swup = FALSE; // clear special wakeup while we sleep - rc2 = occ_special_wakeup(FALSE, +// TEMP -- NO special_wakeup.h anymore! +/* rc2 = occ_special_wakeup(FALSE, l_cores, SWAKEUP_TIMEOUT_MS, &l_swup_timedout); +*/ if(rc2) { TRAC_ERR("cmdh_fsp_fsi2host_mbox_wait4free: clear occ_special_wakeup failed with rc=%d, cores=0x%04x", @@ -288,10 +295,13 @@ int cmdh_fsp_fsi2host_mbox_wait4free(void) //make sure we clear special wakeup before exiting this function if(l_disable_swup) { +// TEMP -- NO special_wakeup.h anymore +/* rc2 = occ_special_wakeup(FALSE, l_cores, SWAKEUP_TIMEOUT_MS, &l_swup_timedout); +*/ if(rc2) { TRAC_ERR("cmdh_fsp_fsi2host_mbox_wait4free: clear occ_special_wakeup failed with rc=%d, cores=0x%04x", @@ -349,10 +359,12 @@ int cmdh_fsp_fsi2host_mbox_wait4free(void) // End Function Specification errlHndl_t cmdh_fsp_init(void) { +// TEMP -- NO CMD Handler thread in Phase1 + int l_rc; errlHndl_t l_errlHndl = NULL; mbox_data_area_regs_t l_mbox_msg; - +/* CHECKPOINT(INIT_OCB); // ---------------------------------------------------- @@ -404,7 +416,7 @@ errlHndl_t cmdh_fsp_init(void) * @userdata2 0 * @userdata4 ERC_CMDH_MBOX_REQST_FAILURE * @devdesc Failed to get permission to use fsi2host mbox - */ + */ /* l_errlHndl = createErrl( CMDH_FSI2HOST_MBOX_UNAVAIL, // modId EXTERNAL_INTERFACE_FAILURE, // reasoncode @@ -532,7 +544,7 @@ errlHndl_t cmdh_fsp_init(void) * @userdata2 0 * @userdata4 OCC_NO_EXTENDED_RC * @devdesc Invalid OCC interrupt type was detected - */ + */ /* l_errlHndl = createErrl( CMDH_OCC_INTERRUPT_TYPE, // modId EXTERNAL_INTERFACE_FAILURE, // reasoncode @@ -544,7 +556,7 @@ errlHndl_t cmdh_fsp_init(void) 0 // userdata2 ); } - +*/ return l_errlHndl; } @@ -1253,7 +1265,11 @@ errlHndl_t cmdh_processTmgtRequest (const cmdh_fsp_cmd_t * i_cmd_ptr, i_rsp_ptr->data_length[1] = 0; i_rsp_ptr->rc = ERRL_RC_SUCCESS; + TRAC_INFO("Commands are not supported yet!"); + // Run command function based on cmd_type + // TEMP -- PHASE 1 NO SUPPORT +/* switch(l_cmd_type) { case CMDH_POLL: @@ -1333,7 +1349,7 @@ errlHndl_t cmdh_processTmgtRequest (const cmdh_fsp_cmd_t * i_cmd_ptr, break; } //end switch - +*/ return l_err; } diff --git a/src/occ_405/cmdh/cmdh_fsp.h b/src/occ_405/cmdh/cmdh_fsp.h index 468a6ec..bc08ad5 100755 --- a/src/occ_405/cmdh/cmdh_fsp.h +++ b/src/occ_405/cmdh/cmdh_fsp.h @@ -32,6 +32,8 @@ #include "rtls.h" #include "occ_common.h" #include "state.h" +#include "occhw_async.h" +#include "chip_config.h" // Register Addresses for Mailbox 1 Doorbell Status/Control #define MAILBOX_1_DOORBELL_STS_CTRL_REGADDR 0x00050020 diff --git a/src/occ_405/cmdh/cmdh_fsp_cmds.c b/src/occ_405/cmdh/cmdh_fsp_cmds.c index 4796662..e326425 100755 --- a/src/occ_405/cmdh/cmdh_fsp_cmds.c +++ b/src/occ_405/cmdh/cmdh_fsp_cmds.c @@ -34,15 +34,15 @@ #include "cmdh_fsp_cmds.h" #include "cmdhDbugCmd.h" #include "appletManager.h" -#include "gpsm.h" -#include "pstates.h" +//#include "gpsm.h" +//#include "pstates.h" #include "proc_pstate.h" -#include "gpe_data.h" +//#include "gpe_data.h" #include "centaur_data.h" #include <amec_data.h> #include "amec_amester.h" #include "amec_service_codes.h" -#include "amec_freq.h" +//#include "amec_freq.h" #include "amec_sys.h" #include "sensor.h" #include "sensorQueryList.h" diff --git a/src/occ_405/cmdh/cmdh_fsp_cmds.h b/src/occ_405/cmdh/cmdh_fsp_cmds.h index ee3b59d..8cf612c 100755 --- a/src/occ_405/cmdh/cmdh_fsp_cmds.h +++ b/src/occ_405/cmdh/cmdh_fsp_cmds.h @@ -34,8 +34,8 @@ #include "occ_common.h" #include "state.h" #include "cmdh_fsp.h" -#include "gpsm.h" -#include "pstates.h" +//#include "gpsm.h" +//#include "pstates.h" #include "cmdh_fsp_cmds_datacnfg.h" #include "sensor.h" #include "thrm_thread.h" diff --git a/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c b/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c index bd97e7c..2e8c703 100755 --- a/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c +++ b/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c @@ -25,6 +25,7 @@ #include "ssx.h" #include "cmdh_service_codes.h" +#include "cmdh_fsp_cmds_datacnfg.h" #include "errl.h" #include "trac.h" #include "rtls.h" @@ -34,8 +35,8 @@ #include "cmdh_fsp_cmds.h" #include "cmdhDbugCmd.h" #include "appletManager.h" -#include "gpsm.h" -#include "pstates.h" +//#include "gpsm.h" +//#include "pstates.h" #include "proc_pstate.h" #include <amec_data.h> #include "amec_amester.h" @@ -223,7 +224,9 @@ uint8_t DATA_request_cnfgdata () // Skip whenever we are trying to request pcap or freq as a slave if(((G_data_pri_table[i].format == DATA_FORMAT_POWER_CAP) || (G_data_pri_table[i].format == DATA_FORMAT_FREQ)) && - (G_occ_role == OCC_SLAVE)) +// TEMP -- ALWAYS MASTER IN PHASE1 +// (G_occ_role == OCC_SLAVE)) + (FALSE)) { continue; } @@ -251,6 +254,7 @@ errlHndl_t data_store_freq_data(const cmdh_fsp_cmd_t * i_cmd_ptr, cmdh_fsp_rsp_t * o_rsp_ptr) { errlHndl_t l_err = NULL; +/* TEMP -- NOT SUPPORTED IN PHASE1 uint16_t l_req_freq; cmdh_store_mode_freqs_t* l_cmdp = (cmdh_store_mode_freqs_t*)i_cmd_ptr; uint8_t* l_buf = ((uint8_t*)(l_cmdp)) + sizeof(cmdh_store_mode_freqs_t); @@ -346,7 +350,7 @@ errlHndl_t data_store_freq_data(const cmdh_fsp_cmd_t * i_cmd_ptr, * @userdata2 frequency used * @userdata4 OCC_NO_EXTENDED_RC * @devdesc OCC recieved an invalid FFO frequency - */ + */ /* l_err = createErrl(DATA_STORE_FREQ_DATA, INVALID_INPUT_DATA, OCC_NO_EXTENDED_RC, @@ -426,6 +430,7 @@ errlHndl_t data_store_freq_data(const cmdh_fsp_cmd_t * i_cmd_ptr, G_sysConfigData.sys_mode_freq.update_count++; G_data_cnfg->data_mask |= DATA_MASK_FREQ_PRESENT; } +*/ return l_err; } @@ -439,7 +444,7 @@ errlHndl_t data_store_freq_data(const cmdh_fsp_cmd_t * i_cmd_ptr, errlHndl_t apss_store_adc_channel(const eApssAdcChannelAssignments i_func_id, const uint8_t i_channel_num ) { errlHndl_t l_err = NULL; - +/* TEMP -- NOT SUPPORTED IN PHASE1 // Check function ID and channel number if ( (i_func_id >= NUM_ADC_ASSIGNMENT_TYPES) || (i_channel_num >= MAX_APSS_ADC_CHANNELS) ) @@ -454,7 +459,7 @@ errlHndl_t apss_store_adc_channel(const eApssAdcChannelAssignments i_func_id, co * @userdata2 channel number * @userdata4 ERC_APSS_ADC_OUT_OF_RANGE_FAILURE * @devdesc Invalid function ID or channel number - */ + */ /* l_err = createErrl(DATA_STORE_APSS_DATA, INVALID_INPUT_DATA, ERC_APSS_ADC_OUT_OF_RANGE_FAILURE, @@ -572,7 +577,7 @@ errlHndl_t apss_store_adc_channel(const eApssAdcChannelAssignments i_func_id, co * @userdata2 channel number * @userdata4 ERC_APSS_ADC_DUPLICATED_FAILURE * @devdesc Function ID is duplicated - */ + */ /* l_err = createErrl(DATA_STORE_APSS_DATA, INVALID_INPUT_DATA, ERC_APSS_ADC_DUPLICATED_FAILURE, @@ -590,7 +595,7 @@ errlHndl_t apss_store_adc_channel(const eApssAdcChannelAssignments i_func_id, co } } } - +*/ return l_err; } @@ -604,6 +609,7 @@ errlHndl_t apss_store_adc_channel(const eApssAdcChannelAssignments i_func_id, co // End Function Specification void apss_store_ipmi_sensor_id(const uint16_t i_channel, const apss_cfg_adc_v10_t *i_adc) { +/* TEMP -- NOT SUPPORTED IN PHASE1 // Get current processor id. uint8_t l_proc = G_pob_id.module_id; @@ -710,6 +716,7 @@ void apss_store_ipmi_sensor_id(const uint16_t i_channel, const apss_cfg_adc_v10_ AMECSENSOR_PTR(PWRAPSSCH0 + i_channel)->ipmi_sid = i_adc->ipmisensorId; } } +*/ } // Function Specification @@ -1057,7 +1064,7 @@ errlHndl_t data_store_pstate_super(const cmdh_fsp_cmd_t * i_cmd_ptr, cmdh_fsp_rsp_t * o_rsp_ptr) { errlHndl_t l_errlHndl = NULL; - +/* TEMP -- PSTATES NOT SUPPORTED IN PHASE1 // Cast the command to the struct for this format cmdh_store_cnfgdata_pstatess_t * l_cmd_ptr = (cmdh_store_cnfgdata_pstatess_t *)i_cmd_ptr; @@ -1096,7 +1103,7 @@ errlHndl_t data_store_pstate_super(const cmdh_fsp_cmd_t * i_cmd_ptr, CMDH_DATALEN_FIELD_UINT16(i_cmd_ptr) - 4); } } while(0); - +*/ return l_errlHndl; } @@ -1114,8 +1121,9 @@ errlHndl_t data_store_role(const cmdh_fsp_cmd_t * i_cmd_ptr, cmdh_fsp_rsp_t * o_rsp_ptr) { errlHndl_t l_errlHndl = NULL; - uint8_t l_old_role = G_occ_role; +/* TEMP -- NOT SUPPORTED IN PHASE1 uint8_t l_new_role = OCC_SLAVE; + uint8_t l_old_role = G_occ_role; ERRL_RC l_rc = ERRL_RC_SUCCESS; // Cast the command to the struct for this format @@ -1163,7 +1171,8 @@ errlHndl_t data_store_role(const cmdh_fsp_cmd_t * i_cmd_ptr, { if(OCC_MASTER == l_old_role) { - G_occ_role = OCC_SLAVE; +// TEMP - WE ARE ALWAYS MASTER IN PHASE1 +// G_occ_role = OCC_SLAVE; // Turn off anything master related since we are a slave rtl_clr_run_mask_deferred(RTL_FLAG_MSTR); @@ -1225,7 +1234,7 @@ errlHndl_t data_store_role(const cmdh_fsp_cmd_t * i_cmd_ptr, * @userdata2 Requested role * @userdata4 ERC_INVALID_INPUT_DATA * @devdesc Bad config data passed to OCC - */ + */ /* l_errlHndl = createErrl(DATA_STORE_GENERIC_DATA, //modId INVALID_INPUT_DATA, //reasoncode ERC_INVALID_INPUT_DATA, //Extended reason code @@ -1250,7 +1259,7 @@ errlHndl_t data_store_role(const cmdh_fsp_cmd_t * i_cmd_ptr, * @userdata2 current state * @userdata4 OCC_NO_EXTENDED_RC * @devdesc Bad config data passed to OCC - */ + */ /* l_errlHndl = createErrl(DATA_STORE_GENERIC_DATA, //modId INVALID_INPUT_DATA, //reasoncode OCC_NO_EXTENDED_RC, //Extended reason code @@ -1266,7 +1275,7 @@ errlHndl_t data_store_role(const cmdh_fsp_cmd_t * i_cmd_ptr, // Send back an error response to TMGT cmdh_build_errl_rsp(i_cmd_ptr, o_rsp_ptr, l_rc, &l_errlHndl); } - +*/ return l_errlHndl; } @@ -1282,7 +1291,7 @@ errlHndl_t data_store_power_cap(const cmdh_fsp_cmd_t * i_cmd_ptr, cmdh_fsp_rsp_t * i_rsp_ptr) { errlHndl_t l_err = NULL; - +/* TEMP -- NOT SUPPORTED IN PHASE1 // Cast the command to the struct for this format cmdh_pcap_config_t * l_cmd_ptr = (cmdh_pcap_config_t *)i_cmd_ptr; uint16_t l_data_length = 0; @@ -1328,7 +1337,7 @@ errlHndl_t data_store_power_cap(const cmdh_fsp_cmd_t * i_cmd_ptr, * @userdata2 packet version (Bytes 0-1) / role (Bytes 2-3) * @userdata4 OCC_NO_EXTENDED_RC * @devdesc OCC recieved an invalid data packet from the FSP or OCC role is not MASTER - */ + */ /* l_err = createErrl(DATA_STORE_PCAP_DATA, INVALID_INPUT_DATA, OCC_NO_EXTENDED_RC, @@ -1379,7 +1388,7 @@ errlHndl_t data_store_power_cap(const cmdh_fsp_cmd_t * i_cmd_ptr, // will update data mask when slave code acquires data TRAC_IMP("data store pcap: Got valid PCAP Config data via TMGT. Count:%i, Data Cfg mask[%x]",G_master_pcap_data.pcap_data_count, G_data_cnfg->data_mask); } - +*/ return l_err; } @@ -1394,7 +1403,7 @@ errlHndl_t data_store_sys_config(const cmdh_fsp_cmd_t * i_cmd_ptr, cmdh_fsp_rsp_t * o_rsp_ptr) { errlHndl_t l_err = NULL; - +/* TEMP -- NOT SUPPORTED IN PHASE1 // Cast the command to the struct for this format cmdh_sys_config_t * l_cmd_ptr = (cmdh_sys_config_t *)i_cmd_ptr; uint16_t l_data_length = 0; @@ -1436,7 +1445,7 @@ errlHndl_t data_store_sys_config(const cmdh_fsp_cmd_t * i_cmd_ptr, * @userdata2 packet version * @userdata4 OCC_NO_EXTENDED_RC * @devdesc OCC recieved an invalid data packet from the FSP - */ + */ /* l_err = createErrl(DATA_STORE_SYS_DATA, INVALID_INPUT_DATA, OCC_NO_EXTENDED_RC, @@ -1485,7 +1494,7 @@ errlHndl_t data_store_sys_config(const cmdh_fsp_cmd_t * i_cmd_ptr, G_data_cnfg->data_mask |= DATA_MASK_SYS_CNFG; TRAC_IMP("Got valid System Config data via TMGT for system type: 0x%02X", l_cmd_ptr->sys_config.system_type); } - +*/ return l_err; } @@ -1501,6 +1510,7 @@ errlHndl_t data_store_thrm_thresholds(const cmdh_fsp_cmd_t * i_cmd_ptr, cmdh_fsp_rsp_t * o_rsp_ptr) { errlHndl_t l_err = NULL; +/* TEMP -- NOT SUPPORTED IN PHASE1 cmdh_thrm_thresholds_t* l_cmd_ptr = (cmdh_thrm_thresholds_t*)i_cmd_ptr; uint16_t i = 0; uint16_t l_data_length = 0; @@ -1668,7 +1678,7 @@ errlHndl_t data_store_thrm_thresholds(const cmdh_fsp_cmd_t * i_cmd_ptr, // Notify thermal thread to update its local copy of the thermal thresholds THRM_thread_update_thresholds(); } - +*/ return l_err; } @@ -1685,6 +1695,7 @@ errlHndl_t data_store_mem_cfg(const cmdh_fsp_cmd_t * i_cmd_ptr, cmdh_fsp_rsp_t * o_rsp_ptr) { errlHndl_t l_err = NULL; +/* TEMP -- NOT SUPPORTED IN PHASE1 cmdh_mem_cfg_t* l_cmd_ptr = (cmdh_mem_cfg_t*)i_cmd_ptr; uint16_t l_data_length = 0; uint16_t l_exp_data_length = 0; @@ -1840,7 +1851,7 @@ errlHndl_t data_store_mem_cfg(const cmdh_fsp_cmd_t * i_cmd_ptr, TRAC_IMP("data_store_mem_cfg: Got valid mem cfg packet. cent#=%d, dimm#=%d", l_num_centaurs, l_num_dimms); } - +*/ return l_err; } @@ -1857,6 +1868,7 @@ errlHndl_t data_store_mem_throt(const cmdh_fsp_cmd_t * i_cmd_ptr, cmdh_fsp_rsp_t * o_rsp_ptr) { errlHndl_t l_err = NULL; +/* TEMP -- NOT SUPPORTED IN PHASE1 cmdh_mem_throt_t* l_cmd_ptr = (cmdh_mem_throt_t*)i_cmd_ptr; uint16_t l_data_length = 0; uint16_t l_exp_data_length = 0; @@ -2018,7 +2030,7 @@ errlHndl_t data_store_mem_throt(const cmdh_fsp_cmd_t * i_cmd_ptr, // Update the configured mba bitmap G_configured_mbas = l_configured_mbas; } - +*/ return l_err; } @@ -2033,6 +2045,7 @@ errlHndl_t data_store_ips_config(const cmdh_fsp_cmd_t * i_cmd_ptr, cmdh_fsp_rsp_t * o_rsp_ptr) { errlHndl_t l_err = NULL; +/* TEMP -- NOT SUPPORTED IN PHASE1 cmdh_ips_config_t *l_cmd_ptr = (cmdh_ips_config_t *)i_cmd_ptr; // Cast the command to the struct for this format uint16_t l_data_length = CMDH_DATALEN_FIELD_UINT16(l_cmd_ptr); uint32_t l_ips_data_sz = sizeof(cmdh_ips_config_t) - sizeof(cmdh_fsp_cmd_header_t); @@ -2053,7 +2066,7 @@ errlHndl_t data_store_ips_config(const cmdh_fsp_cmd_t * i_cmd_ptr, * @userdata2 packet version * @userdata4 OCC_NO_EXTENDED_RC * @devdesc OCC recieved an invalid data packet from the FSP - */ + */ /* l_err = createErrl(DATA_STORE_IPS_DATA, INVALID_INPUT_DATA, OCC_NO_EXTENDED_RC, @@ -2084,7 +2097,7 @@ errlHndl_t data_store_ips_config(const cmdh_fsp_cmd_t * i_cmd_ptr, l_cmd_ptr->iv_ips_config.iv_utilizationForEntry, l_cmd_ptr->iv_ips_config.iv_utilizationForExit ); } - +*/ return l_err; } @@ -2197,6 +2210,7 @@ errlHndl_t DATA_store_cnfgdata (const cmdh_fsp_cmd_t * i_cmd_ptr, cmdh_fsp_rsp_t * o_rsp_ptr) { errlHndl_t l_errlHndl = NULL; +/* TEMP -- NOT SUPPORTED IN PHASE1 UINT32 l_new_data = 0; ERRL_RC l_rc = ERRL_RC_INTERNAL_FAIL; @@ -2389,7 +2403,7 @@ errlHndl_t DATA_store_cnfgdata (const cmdh_fsp_cmd_t * i_cmd_ptr, o_rsp_ptr->data_length[1] = 0; o_rsp_ptr->rc = ERRL_RC_SUCCESS; } - +*/ return(l_errlHndl); } diff --git a/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.h b/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.h index 6affe10..24deb5c 100755 --- a/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.h +++ b/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.h @@ -34,8 +34,8 @@ #include "occ_common.h" #include "state.h" #include "cmdh_fsp.h" -#include "gpsm.h" -#include "pstates.h" +//#include "gpsm.h" +//#include "pstates.h" #include "cmdh_fsp_cmds.h" #include "apss.h" @@ -91,6 +91,8 @@ typedef enum #define OCC_ROLE_FIR_MASTER_MASK 0x40 // Used by TMGT to send OCC the PstateSuperStruct +// TEMP -- NO PStateSuperStructure anymore? +/* typedef struct __attribute__ ((packed)) { struct cmdh_fsp_cmd_header; @@ -98,7 +100,7 @@ typedef struct __attribute__ ((packed)) uint8_t reserved[3]; PstateSuperStructure pstatess; }cmdh_store_cnfgdata_pstatess_t; - +*/ #define CMDH_CNFGDATA_PSTATESS_DATALEN (sizeof(PstateSuperStructure) + 4) //At a minimum, OCC expects this size: Pstate superstructure for versions diff --git a/src/occ_405/dcom/dcom.c b/src/occ_405/dcom/dcom.c index 5b9f112..23db8e0 100755 --- a/src/occ_405/dcom/dcom.c +++ b/src/occ_405/dcom/dcom.c @@ -26,8 +26,8 @@ #ifndef _DCOM_C #define _DCOM_C -#include <pgp_pmc.h> -#include "pgp_pba.h" +//#include <pgp_pmc.h> +#include "occhw_pba.h" #include <rtls.h> #include <apss.h> #include <dcom.h> @@ -72,7 +72,8 @@ bool G_slv_inbox_received = FALSE; // Counters to debug Master/Slave communication errors dcom_fail_count_t G_dcomSlvInboxCounter = {0}; -uint8_t G_occ_role = OCC_SLAVE; +uint8_t G_occ_role = OCC_SLAVE; + uint8_t G_dcm_occ_role = OCC_DCM_SLAVE; diff --git a/src/occ_405/errl/errl.c b/src/occ_405/errl/errl.c index cd75621..3e80d05 100755 --- a/src/occ_405/errl/errl.c +++ b/src/occ_405/errl/errl.c @@ -332,8 +332,11 @@ errlHndl_t createErrl( //NOTE: Design does not exist for these fields //TODO: fix this when design is done! l_rc->iv_userDetails.iv_fwLevel = 0; - l_rc->iv_userDetails.iv_occId = G_pob_id.chip_id; - l_rc->iv_userDetails.iv_occRole = G_occ_role; + // TEMP -- WE DO NOT HAVE G_pob_id yet in PHASE1! + //l_rc->iv_userDetails.iv_occId = G_pob_id.chip_id; + //TEMP -- WE ARE ALWAYS MASTER IN PHASE1 + //l_rc->iv_userDetails.iv_occRole = G_occ_role; + l_rc->iv_userDetails.iv_occRole = OCC_MASTER; l_rc->iv_userDetails.iv_operatingState = CURRENT_STATE(); } else @@ -361,13 +364,15 @@ void addTraceToErrl( UINT l_expectLen = 0, l_rtLen = 0, l_bytes_left; void * l_traceAddr = io_err; uint16_t l_actualSizeOfUsrDtls = 0; - pore_status_t l_gpe0_status; +// TEMP -- NO MORE PORE +// pore_status_t l_gpe0_status; ocb_oisr0_t l_oisr0_status; static bool L_gpe_halt_traced = FALSE; static bool L_sys_checkstop_traced = FALSE; // check if GPE was frozen due to a checkstop +/* TEMP -- NO MORE PORE l_gpe0_status.value = in64(PORE_GPE0_STATUS); if(l_gpe0_status.fields.freeze_action && !L_gpe_halt_traced) { @@ -376,15 +381,16 @@ void addTraceToErrl( l_gpe0_status.words.high_order, l_gpe0_status.words.low_order); } - +*/ // Check if there is a system checkstop +/* TEMP -- check_stop field no longer exists l_oisr0_status.value = in32(OCB_OISR0); if (l_oisr0_status.fields.check_stop && !L_sys_checkstop_traced) { L_sys_checkstop_traced = TRUE; TRAC_IMP("addTraceToErrl: System checkstop detected"); } - +*/ // 1. Check if error log is not null // 2. error log is not invalid @@ -550,7 +556,8 @@ void reportErrorLog( errlHndl_t i_err, uint16_t i_entrySize ) // From OCC OpenPower Interface v1.1, OCC needs to set bits 0 and 1 of // the OCB_OCCMISC register l_reg.fields.core_ext_intr = 1; - l_reg.fields.reason_intr = 1; +// TEMP -- reason_intr field no longer exists +// l_reg.fields.reason_intr = 1; out32(OCB_OCCMISC_OR, l_reg.value); } @@ -567,7 +574,8 @@ void reportErrorLog( errlHndl_t i_err, uint16_t i_entrySize ) // End Function Specification void commitErrl( errlHndl_t *io_err ) { - pore_status_t l_gpe0_status; +// TEMP -- NO MORE PORE +// pore_status_t l_gpe0_status; ocb_oisr0_t l_oisr0_status; static bool L_log_commits_suspended_by_safe_mode = FALSE; @@ -578,10 +586,12 @@ void commitErrl( errlHndl_t *io_err ) { // Check if the GPE is frozen or if a system // checkstop has occurred +// TEMP -- NO MORE PORE +/* l_gpe0_status.value = in64(PORE_GPE0_STATUS); l_oisr0_status.value = in32(OCB_OISR0); - if (l_gpe0_status.fields.freeze_action + if (l_gpe0_status.fields.freeze_action) || l_oisr0_status.fields.check_stop) { @@ -594,7 +604,6 @@ void commitErrl( errlHndl_t *io_err ) { TRAC_IMP("System checkstop detected by commitErrl"); } - //Go to the reset state to minimize errors reset_state_request(RESET_REQUESTED_DUE_TO_ERROR); @@ -615,7 +624,7 @@ void commitErrl( errlHndl_t *io_err ) // Motivate FIR data collection G_fir_collection_required = TRUE; } - +*/ // if reset action bit is set force severity to unrecoverable and // make sure there is at least one callout if((*io_err)->iv_actions.reset_required) diff --git a/src/occ_405/img_defs.mk b/src/occ_405/img_defs.mk new file mode 100644 index 0000000..7dcc129 --- /dev/null +++ b/src/occ_405/img_defs.mk @@ -0,0 +1,274 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: src/occ_405/img_defs.mk $ +# +# OpenPOWER OnChipController Project +# +# Contributors Listed Below - COPYRIGHT 2015 +# [+] International Business Machines Corp. +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG +# $Id: ssx.mk,v 1.2 2014/06/26 12:55:39 cmolsen Exp $ +# $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ssx/pgp/ssx.mk,v $ +# Make header for PgP SSX builds +# +# The application may define the following variables to control the +# build process: +# +# IMG_INCLUDES : Aplication-specific header search paths +# +# DEFS : A string of -D<symbol>[=<value>] to control compilation +# +# SSX_SRCDIR : Default ..; The path to the SSX source code. +# The default is set for building the SSX +# subdirectories. +# +# SSX_THREAD_SUPPORT : (0/1, default 1); Compile SSX thread and +# semaphore suppprt +# +# SSX_TIMER_SUPPORT : (0/1, default 1); Compile SSX timer suppprt +# +# PPC405_MMU_SUPPORT : (0/1, default 1); Compile for PPC405 simple MMU protection +# +# SIMICS_ENVIRONMENT : (0/1, current default 0); Compile for Simics +# +# SIMICS_MAGIC_PANIC : (0/1, current default 0); Use Simics Magic +# breakpoint for SSX_PANIC() instead of PowerPC trap. +# Note that Simics does not model trap correctly in +# external debug mode. +# +# GCC-O-LEVEL : The optimization level passed to GCC (default -Os). May +# also be defined empty (GCC-O-LEVEL=) to disable +# optimization. This variable can also be used to pass +# any other non-default setting to GCC, e.g. +# make GCC-O-LEVEL="-Os -fno-branch-count-reg" +# +# GCC-TOOL-PREFIX : The full path (including executable file prefixes) to +# the GCC cross-development tools to use. The default is +# "ppcnf-mcp5-" +# +# CTEPATH : This variable defaults to the afs/awd CTE tool +# installation - The PORE binutils are stored there. If +# you are not in Austin be sure to define CTEPATH in +# your .profile. + +IMAGE_NAME := occ_405 +ifndef IMAGE_SRCDIR +export IMAGE_SRCDIR = $(abspath .) +endif + +ifndef IMG_INCLUDES +export IMG_INCLUDES = -I$(IMAGE_SRCDIR) +endif + +ifndef GLOBAL_INCLUDES +export GLOBAL_INCLUDES = -I$(IMAGE_SRCDIR)/.. +endif + +ifndef BASE_OBJDIR +export BASE_OBJDIR = $(abspath ../../obj) +endif + +export IMG_OBJDIR = $(BASE_OBJDIR)/$(IMAGE_NAME) + +ifndef SSX_SRCDIR +export SSX_SRCDIR = $(abspath ../ssx) +endif + +ifndef COMMONLIB_SRCDIR +export COMMONLIB_SRCDIR = $(abspath ../lib/common) +endif + +ifndef OCCLIB_SRCDIR +export OCCLIB_SRCDIR = $(abspath ../lib/occlib) +endif + +ifndef PPC405LIB_SRCDIR +export PPC405LIB_SRCDIR = $(abspath ../lib/ppc405lib) +endif + +ifndef SSXLIB_SRCDIR +export SSXLIB_SRCDIR = $(abspath ../lib/ssxlib) +endif + +ifndef GCC-TOOL-PREFIX +GCC-TOOL-PREFIX = $(CTEPATH)/tools/ppcgcc/prod/bin/powerpc-linux- +endif + +ifndef PPETRACEPP_DIR +export PPETRACEPP_DIR = $(abspath ../ppe/tools/ppetracepp) +endif + +CC_ASM = $(GCC-TOOL-PREFIX)gcc +TCC = $(PPETRACEPP_DIR)/ppetracepp $(GCC-TOOL-PREFIX)gcc +CC = $(GCC-TOOL-PREFIX)gcc +AS = $(GCC-TOOL-PREFIX)as +AR = $(GCC-TOOL-PREFIX)ar +LD = $(GCC-TOOL-PREFIX)ld +OBJDUMP = $(GCC-TOOL-PREFIX)objdump +OBJCOPY = $(GCC-TOOL-PREFIX)objcopy +TCPP = $(PPETRACEPP_DIR)/ppetracepp $(GCC-TOOL-PREFIX)gcc +THASH = $(PPETRACEPP_DIR)/tracehash.pl +CPP = $(GCC-TOOL-PREFIX)cpp + + +ifndef CTEPATH +$(warning The CTEPATH variable is not defined; Defaulting to /afs/awd) +CTEPATH = /afs/awd/projects/cte +endif + +OBJDIR = $(IMG_OBJDIR)$(SUB_OBJDIR) + + +ifeq "$(SSX_TIMER_SUPPORT)" "" +SSX_TIMER_SUPPORT = 1 +endif + +ifeq "$(SSX_THREAD_SUPPORT)" "" +SSX_THREAD_SUPPORT = 1 +endif + +# TODO: Enable this once we get MMU support working in simics +# TEMP: Does this work in Simics? +ifeq "$(PPC405_MMU_SUPPORT)" "" +PPC405_MMU_SUPPORT = 1 +endif + +ifeq "$(OCCHW_ASYNC_SUPPORT)" "" +OCCHW_ASYNC_SUPPORT = 1 +endif + +ifeq "$(SSX_TRACE_SUPPORT)" "" +SSX_TRACE_SUPPORT = 1 +endif + +# Generate a 16bit trace string hash prefix value based on the name of this image. This will form +# the upper 16 bits of the 32 bit trace hash values. +ifndef SSX_TRACE_HASH_PREFIX +SSX_TRACE_HASH_PREFIX := $(shell echo $(IMAGE_NAME) | md5sum | cut -c1-4 | xargs -i printf "%d" 0x{}) +endif + +ifndef GCC-O-LEVEL +GCC-O-LEVEL = -Os +endif + +GCC-DEFS += -DIMAGE_NAME=$(IMAGE_NAME) +GCC-DEFS += -DSSX_TIMER_SUPPORT=$(SSX_TIMER_SUPPORT) +GCC-DEFS += -DSSX_THREAD_SUPPORT=$(SSX_THREAD_SUPPORT) +GCC-DEFS += -DPPC405_MMU_SUPPORT=$(PPC405_MMU_SUPPORT) +GCC-DEFS += -DSSX_TRACE_SUPPORT=$(SSX_TRACE_SUPPORT) +GCC-DEFS += -DSSX_TRACE_HASH_PREFIX=$(SSX_TRACE_HASH_PREFIX) +GCC-DEFS += -DUSE_SSX_APP_CFG_H=1 +GCC-DEFS += -D__SSX__=1 +DEFS += $(GCC-DEFS) -DCONFIGURE_PTS_SLW=0 + +############################################################################ + +APP_INCLUDES = -I$(IMAGE_SRCDIR)/rtls \ + -I$(IMAGE_SRCDIR)/thread \ + -I$(IMAGE_SRCDIR)/incl \ + -I$(IMAGE_SRCDIR)/sensor \ + -I$(IMAGE_SRCDIR)/errl \ + -I$(IMAGE_SRCDIR)/trac \ + -I$(IMAGE_SRCDIR)/pss \ + -I$(IMAGE_SRCDIR)/timer \ + -I$(IMAGE_SRCDIR)/proc \ + -I$(IMAGE_SRCDIR)/aplt \ + -I$(IMAGE_SRCDIR)/aplt/incl \ + -I$(IMAGE_SRCDIR)/cmdh \ + -I$(IMAGE_SRCDIR)/dcom \ + -I$(IMAGE_SRCDIR)/amec \ + -I$(IMAGE_SRCDIR)/cent \ + -I$(IMAGE_SRCDIR)/../occ_gpe0 \ + +INCLUDES += $(IMG_INCLUDES) $(GLOBAL_INCLUDES) $(APP_INCLUDES) \ + -I$(SSX_SRCDIR)/ssx -I$(SSX_SRCDIR)/ppc32 -I$(SSX_SRCDIR)/ppc405 \ + -I$(SSX_SRCDIR)/trace -I$(SSX_SRCDIR)/occhw -I$(SSX_SRCDIR)/../lib/common \ + -I$(SSX_SRCDIR)/../include -I$(SSX_SRCDIR)/../include/registers \ + -I$(OCCLIB_SRCDIR) -I$(COMMONLIB_SRCDIR) -I$(SSXLIB_SRCDIR) -I$(PPC405LIB_SRCDIR) + +PIPE-CFLAGS = -pipe -Wa,-m405 + +GCC-CFLAGS += -g -Wall -fsigned-char -msoft-float \ + -mcpu=405 -mmultiple -mstring -m32 \ + -meabi -msdata=eabi -ffreestanding -fno-common \ + -fno-inline-functions-called-once + +CFLAGS = -c $(GCC-CFLAGS) $(PIPE-CFLAGS) $(GCC-O-LEVEL) $(INCLUDES) + +############################################################################ + +# Build object code +# +# %.o: %.c - Compile C code +# +# %.o: %.S - Compile PowerPC assembler (including PGAS-PPC assembly) + +#override the GNU Make implicit rule for going from a .c to a .o +%.o: %.c +$(OBJDIR)/%.o: %.c + $(TCC) $(CFLAGS) $(DEFS) -o $@ $< + +#override the GNU Make implicit rule for going from a .S to a .o +%.o: %.S +$(OBJDIR)/%.o: %.S + $(TCPP) $(CFLAGS) $(DEFS) -o $@ $< + + +# Other useful targets +# +# %.S: %.c - See what the assembler produces from the C code, however you can +# also just look at the final disassembly. +# +# %.lst: %.S - Get an assembler listing +# +# %.cpp: %.S - Preprocess PowerPC assembler source to stdout +# +# %.cpp: %.c - Preprocess C source to stdout + +%.S: %.c + $(CC) $(CFLAGS) $(DEFS) -S -o $@ $< + +%.lst: %.S + $(CC_ASM) $(CFLAGS) $(DEFS) -Wa,-al -Wa,--listing-cont-lines=20 $< > $@ + +%.cpp: %.S + $(CC_ASM) $(CFLAGS) $(DEFS) -E $< + +%.cpp: %.c + $(CC) $(CFLAGS) $(DEFS) -E $< + +# From the GNU 'Make' manual - these scripts uses the preprocessor to +# create dependency files (*.d), then mungs them slightly to make them +# work as Make targets. The *.d files are include-ed in the +# subdirectory Makefiles. + +#$(OBJDIR)/%.d: %.c +# @set -e; rm -f $@; \ +# echo -n "$(OBJDIR)/" > $@.$$$$; \ +# $(CC_ASM) -MM $(INCLUDES) $(CPPFLAGS) $(DEFS) $< >> $@.$$$$; \ +# sed 's,\($*\)\.o[ :]*,\1.o $@ : ,g' < $@.$$$$ > $@; \ +# rm -f $@.$$$$ + +#$(OBJDIR)/%.d: %.S +# @set -e; rm -f $@; \ +# echo -n "$(OBJDIR)/" > $@.$$$$; \ +# $(CC_ASM) -MM $(INCLUDES) $(CPPFLAGS) $(DEFS) $< >> $@.$$$$; \ +# sed 's,\($*\)\.o[ :]*,\1.o $@ : ,g' < $@.$$$$ > $@; \ +# rm -f $@.$$$$ + + diff --git a/src/occ_405/linkocc.cmd b/src/occ_405/linkocc.cmd index 0deabc5..c44247c 100755 --- a/src/occ_405/linkocc.cmd +++ b/src/occ_405/linkocc.cmd @@ -83,6 +83,10 @@ OUTPUT_FORMAT(elf32-powerpc); #define writethrough_offset 0x10000000 #define writethrough_origin (origin - 0x10000000) +// This is the offset from the ppc405 EVPR where the debug pointers can be +// found. +#define SSX_DEBUG_PTRS_OFFSET 0x820 + // main()'s stack starts just below the boot branch. The bootloader will // align this address as needed. @@ -180,22 +184,22 @@ ppc405_mmu_asm.o(.text) #endif #define text_2000 \ -pgp_irq_init.o(.text) \ +occhw_irq_init.o(.text) \ ppc405_cache_init.o(.text) \ ppc405_breakpoint.o(.text) \ -pgp_cache.o(.text) \ +occhw_cache.o(.text) \ ssx_stack_init.o(.text) \ thread_text \ mmu_text \ -pgp_async.o(.text) \ -pgp_async_pore.o(.text) \ -pgp_async_ocb.o(.text) \ -pgp_async_pba.o(.text) \ -pgp_pmc.o(.text) \ -pgp_ocb.o(.text) \ -pgp_pba.o(.text) \ -pgp_id.o(.text) \ -pgp_centaur.o(.text) \ +occhw_async.o(.text) \ +//occhw_async_pore.o(.text) \ +occhw_async_ocb.o(.text) \ +occhw_async_pba.o(.text) \ +occhw_pmc.o(.text) \ +occhw_ocb.o(.text) \ +occhw_pba.o(.text) \ +occhw_id.o(.text) \ +//occhw_centaur.o(.text) \ ppc405_lib_core.o(.text) \ ssx_core.o(.text) @@ -241,7 +245,7 @@ ssx_core.o(.text) ssx_init.o(.text) \ ppc405_boot.o(.text) \ ppc405_init.o(.text) \ -pgp_init.o(.text) +occhw_init.o(.text) #ifndef PPC405_MMU_SUPPORT ASSERT((0), "OCC Application Firmware can not be compiled without \ @@ -289,10 +293,13 @@ SECTIONS .exceptions . : { ___vectors = .; - ppc405_exceptions.o(.vectors_0000) + ppc405_exceptions.o(.vectors_0000) pack_0000 . = ___vectors + 0x0100; ppc405_exceptions.o(.vectors_0100) + . = ___vectors + SSX_DEBUG_PTRS_OFFSET; + *(.debug_ptrs) + ppc405_exceptions.o(.irq_exit_traces) pack_0100 . = ___vectors + 0x0c00; ppc405_exceptions.o(.vectors_0c00) diff --git a/src/occ_405/main.c b/src/occ_405/main.c index ff41e9c..050038b 100755 --- a/src/occ_405/main.c +++ b/src/occ_405/main.c @@ -26,7 +26,7 @@ #include "ssx.h" #include "ssx_io.h" #include "simics_stdio.h" -#include "heartbeat.h" +//#include "heartbeat.h" #include <thread.h> #include <sensor.h> #include <threadSch.h> @@ -46,14 +46,14 @@ #include <amec_sys.h> #include <cmdh_fsp.h> #include <proc_pstate.h> -#include <vrm.h> +//#include <vrm.h> #include <chom.h> #include <homer.h> -#include <amec_health.h> -#include <amec_freq.h> +//#include <amec_health.h> +//#include <amec_freq.h> #include <thrm_thread.h> #include "scom.h" -#include <fir_data_collect.h> +//#include <fir_data_collect.h> extern void __ssx_boot; extern uint32_t G_occ_phantom_critical_count; @@ -174,7 +174,7 @@ void workaround_HW258436() void pmc_hw_error_isr(void *private, SsxIrqId irq, int priority) { errlHndl_t l_err; - pmc_ffdc_data_t l_pmc_ffdc; + //pmc_ffdc_data_t l_pmc_ffdc; SsxMachineContext ctx; // Mask this interrupt @@ -187,7 +187,7 @@ void pmc_hw_error_isr(void *private, SsxIrqId irq, int priority) ssx_irq_status_clear(irq); // dump a bunch of FFDC registers - fill_pmc_ffdc_buffer(&l_pmc_ffdc); + //fill_pmc_ffdc_buffer(&l_pmc_ffdc); TRAC_ERR("PMC Failure detected through OISR0[9]!!!"); /* @ @@ -200,6 +200,8 @@ void pmc_hw_error_isr(void *private, SsxIrqId irq, int priority) * @devdesc Failure detected in processor * power management controller (PMC) */ + // TEMP -- NO ERRL YET +/* l_err = createErrl( PMC_HW_ERROR_ISR, // i_modId, PMC_FAILURE, // i_reasonCode, OCC_NO_EXTENDED_RC, @@ -208,14 +210,17 @@ void pmc_hw_error_isr(void *private, SsxIrqId irq, int priority) DEFAULT_TRACE_SIZE, // i_traceSz, 0, // i_userData1, 0); // i_userData2 - +*/ //Add our register dump to the error log - addUsrDtlsToErrl(l_err, + /*addUsrDtlsToErrl(l_err, (uint8_t*) &l_pmc_ffdc, sizeof(l_pmc_ffdc), ERRL_USR_DTL_STRUCT_VERSION_1, ERRL_USR_DTL_BINARY_DATA); + */ +// TEMP -- NO ERRL YET +/* //Add firmware callout addCalloutToErrl(l_err, ERRL_CALLOUT_TYPE_COMPONENT_ID, @@ -235,7 +240,7 @@ void pmc_hw_error_isr(void *private, SsxIrqId irq, int priority) ERRL_CALLOUT_PRIORITY_LOW); REQUEST_RESET(l_err); - +*/ // Unmask this interrupt ssx_irq_enable(irq); @@ -265,7 +270,9 @@ void occ_hw_error_isr(void *private, SsxIrqId irq, int priority) _putscom(OCB_OCCLFIR_OR, OCC_LFIR_SPARE_BIT50, SCOM_TIMEOUT); //Halt occ so that hardware will enter safe mode - OCC_HALT(ERRL_RC_OCC_HW_ERROR); + TRAC_ERR("Should have halted here..."); +// TEMP -- NOT SUPPORTED IN PHASE1 +// OCC_HALT(ERRL_RC_OCC_HW_ERROR); } // Enable and register any ISR's that need to be set up as early as possible. @@ -280,66 +287,68 @@ void occ_irq_setup() // ------------- OCC Error IRQ Setup ------------------ // Disable the IRQ while we work on it - ssx_irq_disable(PGP_IRQ_OCC_ERROR); + ssx_irq_disable(OCCHW_IRQ_OCC_ERROR); // Set up the IRQ - l_rc = ssx_irq_setup(PGP_IRQ_OCC_ERROR, + l_rc = ssx_irq_setup(OCCHW_IRQ_OCC_ERROR, SSX_IRQ_POLARITY_ACTIVE_HIGH, SSX_IRQ_TRIGGER_EDGE_SENSITIVE); if(l_rc) { - TRAC_ERR("occ_irq_setup: ssx_irq_setup(PGP_IRQ_OCC_ERROR) failed with rc=0x%08x", l_rc); + TRAC_ERR("occ_irq_setup: ssx_irq_setup(OCCHW_IRQ_OCC_ERROR) failed with rc=0x%08x", l_rc); break; } // Register the IRQ handler with SSX - l_rc = ssx_irq_handler_set(PGP_IRQ_OCC_ERROR, + l_rc = ssx_irq_handler_set(OCCHW_IRQ_OCC_ERROR, occ_hw_error_isr, NULL, SSX_CRITICAL); if(l_rc) { - TRAC_ERR("occ_irq_setup: ssx_irq_handler_set(PGP_IRQ_OCC_ERROR) failed with rc=0x%08x", l_rc); + TRAC_ERR("occ_irq_setup: ssx_irq_handler_set(OCCHW_IRQ_OCC_ERROR) failed with rc=0x%08x", l_rc); break; } //enable the IRQ - ssx_irq_status_clear(PGP_IRQ_OCC_ERROR); - ssx_irq_enable(PGP_IRQ_OCC_ERROR); + ssx_irq_status_clear(OCCHW_IRQ_OCC_ERROR); + ssx_irq_enable(OCCHW_IRQ_OCC_ERROR); // ------------- PMC Error IRQ Setup ------------------ +/* TEMP -- IS THIS NO LONGER A THING IN P9?? // Disable the IRQ while we work on it - ssx_irq_disable(PGP_IRQ_PMC_ERROR); + ssx_irq_disable(OCCHW_IRQ_PMC_ERROR); // Set up the IRQ - l_rc = ssx_irq_setup(PGP_IRQ_PMC_ERROR, + l_rc = ssx_irq_setup(OCCHW_IRQ_PMC_ERROR, SSX_IRQ_POLARITY_ACTIVE_HIGH, SSX_IRQ_TRIGGER_EDGE_SENSITIVE); if(l_rc) { - TRAC_ERR("occ_irq_setup: ssx_irq_setup(PGP_IRQ_PMC_ERROR) failed with rc=0x%08x", l_rc); + TRAC_ERR("occ_irq_setup: ssx_irq_setup(OCCHW_IRQ_PMC_ERROR) failed with rc=0x%08x", l_rc); break; } // Register the IRQ handler with SSX - l_rc = ssx_irq_handler_set(PGP_IRQ_PMC_ERROR, + l_rc = ssx_irq_handler_set(OCCHW_IRQ_PMC_ERROR, pmc_hw_error_fast, NULL, SSX_NONCRITICAL); if(l_rc) { - TRAC_ERR("occ_irq_setup: ssx_irq_handler_set(PGP_IRQ_PMC_ERROR) failed with rc=0x%08x", l_rc); + TRAC_ERR("occ_irq_setup: ssx_irq_handler_set(OCCHW_IRQ_PMC_ERROR) failed with rc=0x%08x", l_rc); break; } //enable the IRQ - ssx_irq_status_clear(PGP_IRQ_PMC_ERROR); - ssx_irq_enable(PGP_IRQ_PMC_ERROR); + ssx_irq_status_clear(OCCHW_IRQ_PMC_ERROR); + ssx_irq_enable(OCCHW_IRQ_PMC_ERROR); +END TEMP */ }while(0); - +/* TEMP -- NO ERRL YET if(l_rc) { //single error for all error cases, just look at trace to see where it failed. @@ -350,7 +359,7 @@ void occ_irq_setup() * @userdata1 SSX return code * @userdata4 OCC_NO_EXTENDED_RC * @devdesc Firmware failure initializing IRQ - */ + */ /* l_err = createErrl( OCC_IRQ_SETUP, // i_modId, SSX_GENERIC_FAILURE, // i_reasonCode, OCC_NO_EXTENDED_RC, @@ -368,6 +377,7 @@ void occ_irq_setup() commitErrl(&l_err); } +*/ } /* @@ -379,6 +389,7 @@ void occ_irq_setup() * * End Function Specification */ +/* TEMP -- NOT SUPPORTED IN PHASE1 void hmon_routine() { static uint32_t L_critical_phantom_count = 0; @@ -426,7 +437,7 @@ void hmon_routine() * @userdata2 non-critical count * @userdata4 OCC_NO_EXTENDED_RC * @devdesc interrupt with unknown source was detected - */ + */ /* errlHndl_t l_err = createErrl(HMON_ROUTINE_MID, //modId INTERNAL_FAILURE, //reasoncode OCC_NO_EXTENDED_RC, //Extended reason code @@ -458,6 +469,7 @@ void hmon_routine() amec_health_check_dimm_temp(); } } +*/ /* @@ -496,11 +508,13 @@ void master_occ_init() { TRAC_ERR("APSS init applet returned error: l_status: 0x%x", l_status); // commit & delete. CommitErrl handles NULL error log handle - REQUEST_RESET(l_errl); + // TEMP -- NO ERRL / RESET YET + //REQUEST_RESET(l_errl); } // Reinitialize the PBAX Queues - dcom_initialize_pbax_queues(); + // TEMP -- NO DCOM YET + //dcom_initialize_pbax_queues(); } /* @@ -512,11 +526,13 @@ void master_occ_init() * * End Function Specification */ +/* TEMP -- NO SLAVES YET void slave_occ_init() { // Init the DPSS oversubscription IRQ handler MAIN_DBG("Initializing Oversubscription IRQ..."); - errlHndl_t l_errl = dpss_oversubscription_irq_initialize(); + // TEMP -- NO DPSS/ERRL YET + //errlHndl_t l_errl = dpss_oversubscription_irq_initialize(); if( l_errl ) { @@ -524,7 +540,8 @@ void slave_occ_init() TRAC_ERR("Initialization of Oversubscription IRQ handler failed"); // commit log ... log should be deleted by reader mechanism - commitErrl( &l_errl ); + // TEMP -- NO ERRL YET + //commitErrl( &l_errl ); } else { @@ -532,10 +549,12 @@ void slave_occ_init() } //Set up doorbell queues - dcom_initialize_pbax_queues(); + // TEMP -- NO DCOM YET + //dcom_initialize_pbax_queues(); // Run AMEC Slave Init Code - amec_slave_init(); + // TEMP -- NO AMEC YET + //amec_slave_init(); // Initialize SMGR State Semaphores extern SsxSemaphore G_smgrModeChangeSem; @@ -545,6 +564,7 @@ void slave_occ_init() extern SsxSemaphore G_smgrStateChangeSem; ssx_semaphore_create(&G_smgrStateChangeSem, 1, 1); } +*/ /* * Function Specification @@ -606,6 +626,8 @@ void mainThrdTimerCallback(void * i_argPtr) * @userdata4 OCC_NO_EXTENDED_RC * @devdesc SSX semaphore related failure */ + // TEMP -- NO ERRL YET +/* errlHndl_t l_err = createErrl(MAIN_THRD_TIMER_MID, //modId SSX_GENERIC_FAILURE, //reasoncode OCC_NO_EXTENDED_RC, //Extended reason code @@ -614,8 +636,10 @@ void mainThrdTimerCallback(void * i_argPtr) DEFAULT_TRACE_SIZE, //Trace Size l_rc, //userdata1 0); //userdata2 +*/ // Commit Error - REQUEST_RESET(l_err); + // TEMP - NO RESET YET +// REQUEST_RESET(l_err); } } @@ -680,6 +704,8 @@ void initMainThrdSemAndTimer() * @userdata4 OCC_NO_EXTENDED_RC * @devdesc SSX semaphore related failure */ + // TEMP -- NO ERRL OR RESET YET +/* errlHndl_t l_err = createErrl(MAIN_THRD_SEM_INIT_MID, //modId SSX_GENERIC_FAILURE, //reasoncode OCC_NO_EXTENDED_RC, //Extended reason code @@ -690,6 +716,7 @@ void initMainThrdSemAndTimer() l_timerRc); //userdata2 REQUEST_RESET(l_err); +*/ } } @@ -719,13 +746,16 @@ void Main_thread_routine(void *private) // dcom_initialize_roles. If in future design changes, we will make // change to use config_data_init at that time. // Default role initialization and determine OCC/Chip Id - dcom_initialize_roles(); + + // TEMP -- NO DCOM YET + //dcom_initialize_roles(); CHECKPOINT(ROLES_INITIALIZED); // Sensor Initialization // All Master & Slave Sensor are initialized here, it is up to the // rest of the firmware if it uses them or not. - sensor_init_all(); +// TEMP -- NO SENSORS YET +// sensor_init_all(); CHECKPOINT(SENSORS_INITIALIZED); // SPIVID Initialization must be done before Pstates @@ -734,19 +764,22 @@ void Main_thread_routine(void *private) //Initialize structures for collecting core data. //It needs to run before RTLoop start as pore initialization needs to be // done before task to collect core data starts. - proc_core_init(); +// TEMP -- NOT NEEDED IN PHASE1 +// proc_core_init(); CHECKPOINT(PROC_CORE_INITIALIZED); // Run slave OCC init on all OCCs. Master-only initialization will be // done after determining actual role. By default all OCCs are slave. - slave_occ_init(); +// TEMP -- SLAVES NOT SUPPORTED YET +// slave_occ_init(); CHECKPOINT(SLAVE_OCC_INITIALIZED); // Initialize watchdog timers. This needs to be right before // start rtl to make sure timer doesn't timeout. This timer is being // reset from the rtl task. - TRAC_INFO("Initializing watchdog timers."); - initWatchdogTimers(); +// TEMP -- watchdog timers not enabled yet +// TRAC_INFO("Initializing watchdog timers."); +// initWatchdogTimers(); CHECKPOINT(WATCHDOG_INITIALIZED); // Initialize Real time Loop Timer Interrupt @@ -793,7 +826,7 @@ void Main_thread_routine(void *private) // Wait for thermal semaphore l_ssxrc = ssx_semaphore_pend(&G_thrmSem,SSX_WAIT_FOREVER); - +/* TEMP -- FIR DATA IS NOT SUPPORTED IN PHASE1 static bool L_fir_collection_completed = FALSE; // Look for FIR collection flag and status if (G_fir_collection_required && !L_fir_collection_completed) @@ -822,7 +855,7 @@ void Main_thread_routine(void *private) out32(OCB_OCCMISC_OR, l_occmiscreg.value); } } - +*/ if ( l_ssxrc != SSX_OK ) { TRAC_ERR("thermal Semaphore pending failure RC[0x%08X]", -l_ssxrc ); @@ -872,6 +905,7 @@ void Main_thread_routine(void *private) } } +/* TEMP -- NO ERRL OR RESET YET if( l_ssxrc != SSX_OK) { /* @ @@ -881,7 +915,7 @@ void Main_thread_routine(void *private) * @userdata1 semaphore pending return code * @userdata4 OCC_NO_EXTENDED_RC * @devdesc SSX semaphore related failure - */ + */ /* errlHndl_t l_err = createErrl(MAIN_THRD_ROUTINE_MID, //modId SSX_GENERIC_FAILURE, //reasoncode @@ -894,6 +928,7 @@ void Main_thread_routine(void *private) REQUEST_RESET(l_err); } +*/ } // while loop } @@ -945,6 +980,7 @@ int main(int argc, char **argv) SSX_PANIC(0x01000002); } +/* TEMP -- NO FIR SUPPORT IN PHASE1 // Setup the TLB for writing to the FIR parms section l_ssxrc = ppc405_mmu_map(FIR_PARMS_SECTION_BASE_ADDRESS, FIR_PARMS_SECTION_BASE_ADDRESS, @@ -972,7 +1008,7 @@ int main(int argc, char **argv) // Panic, this section is required for FIR collection on checkstops SSX_PANIC(0x01000004); } - +*/ CHECKPOINT_INIT(); CHECKPOINT(MAIN_STARTED); @@ -1093,7 +1129,8 @@ int main(int argc, char **argv) l_ssxrc, l_occ_int_type); } - +/* + //TEMP -- NO FIR SUPPORT if (l_homer_version >= HOMER_VERSION_3) { // Get the FIR Master indicator @@ -1140,7 +1177,7 @@ int main(int argc, char **argv) (uint32_t)&G_fir_data_parms[0]); } } - +*/ // enable and register additional interrupt handlers CHECKPOINT(INITIALIZING_IRQS); @@ -1156,10 +1193,11 @@ int main(int argc, char **argv) THREAD_STACK_SIZE, THREAD_PRIORITY_2); + if( SSX_OK != l_rc) { TRAC_ERR("Failure creating/resuming main thread: rc: 0x%x", -l_rc); - +/* TEMP -- NO ERRL OR RESET YET /* @ * @errortype * @moduleid MAIN_MID @@ -1167,7 +1205,7 @@ int main(int argc, char **argv) * @userdata1 return code * @userdata4 OCC_NO_EXTENDED_RC * @devdesc Firmware internal error creating thread - */ + */ /* errlHndl_t l_err = createErrl(MAIN_MID, //modId SSX_GENERIC_FAILURE, //reasoncode OCC_NO_EXTENDED_RC, //Extended reason code @@ -1178,6 +1216,7 @@ int main(int argc, char **argv) 0); //userdata2 // Commit Error log REQUEST_RESET(l_err); +*/ } // Enter SSX Kernel diff --git a/src/occ_405/occLinkInputFile b/src/occ_405/occLinkInputFile index 892bcd4..c302319 100644 --- a/src/occ_405/occLinkInputFile +++ b/src/occ_405/occLinkInputFile @@ -1,78 +1,21 @@ -INPUT ( amec_init.o - amec_tasks.o - amec_slave_smh.o - amec_master_smh.o - amec_sensors_core.o - amec_sensors_centaur.o - amec_sensors_power.o - amec_sensors_fw.o - amec_data.o - amec_freq.o - amec_amester.o - amec_dps.o amec_part.o - amec_perfcount.o - amec_controller.o - amec_oversub.o - amec_pcap.o - amec_health.o - amec_parm.o - amec_parm_table.o - amec_analytics.o +INPUT ( appletManager.o - centaur_data.o - centaur_control.o + apss.o cmdh_fsp.o - cmdh_thread.o - cmdh_fsp_cmds.o cmdh_fsp_cmds_datacnfg.o - cmdh_mnfg_intf.o - cmdh_tunable_parms.o - cmdh_snapshot.o - ffdc.o - dcom.o - dcom_thread.o - dcomSlaveTx.o - dcomSlaveRx.o - dcomMasterTx.o - dcomMasterRx.o errl.o - ecc.o - fir_data_collect.o - firData.o - fsi.o - lpc.o - native.o - nor_micron.o - pnor_util.o - scom_trgt.o - scom_util.o - sfc_ast2400.o - memcpy.o - proc_data.o - proc_data_control.o - proc_pstate.o - apss.o - dpss.o - rtls_tables.o + homer.o + main.o + occ_sys_config.o + occbuildname.o + reset.o rtls.o - sensor.o - sensor_table.o + rtls_tables.o threadSch.o - chom.o - thrm_thread.o timer.o trac_interface.o - occ_sys_config.o - arl_test.o - state.o - reset.o - mode.o - main.o scom.o - homer.o - occbuildname.o - common.o - ll_ffdc.o + state.o ssx_core.o ssx_init.o ssx_stack_init.o @@ -82,18 +25,15 @@ INPUT ( amec_init.o ssx_thread_core.o ssx_semaphore_init.o ssx_semaphore_core.o - pgp_init.o - pgp_irq_init.o - pgp_pmc.o - pgp_ocb.o - pgp_pba.o - pgp_id.o - pgp_centaur.o - pgp_cache.o - pgp_async.o - pgp_async_pore.o - pgp_async_ocb.o - pgp_async_pba.o + occhw_init.o + occhw_irq_init.o + occhw_ocb.o + occhw_pba.o + occhw_id.o + occhw_cache.o + occhw_async.o + occhw_async_ocb.o + occhw_async_pba.o ppc405_core.o ppc405_lib_core.o ppc405_cache_core.o diff --git a/src/occ_405/occ_sys_config.h b/src/occ_405/occ_sys_config.h index 5ca89f3..8e925d2 100755 --- a/src/occ_405/occ_sys_config.h +++ b/src/occ_405/occ_sys_config.h @@ -29,7 +29,7 @@ // SSX has Pstate defined in pgp_common.h file. Without below ifdef // compiler complains about redefinition for OCC. #ifdef OCC_FIRMWARE -#include "pgp_common.h" +#include "occhw_common.h" #else #endif #include <state.h> diff --git a/src/occ_405/proc/proc_data.h b/src/occ_405/proc/proc_data.h index 03dc6b2..2c7193e 100755 --- a/src/occ_405/proc/proc_data.h +++ b/src/occ_405/proc/proc_data.h @@ -29,7 +29,7 @@ #include <occ_common.h> #include <ssx.h> #include "rtls.h" -#include "gpe_data.h" +//#include "gpe_data.h" //Returns 0 if the specified core is not present. Otherwise, returns none-zero. #define CORE_PRESENT(occ_core_id) \ @@ -84,10 +84,13 @@ enum eOccProcCores CORE_11 = 11, }; -typedef CoreData gpe_bulk_core_data_t; +// TEMP -- CoreData no longer exists +//typedef CoreData gpe_bulk_core_data_t; //Processor data collect structures used for task data pointers //gpe_req.request.parameter points to GpeGetCoreDataParms +// TEMP -- CoreData / PoreFlex objects no longer exist +/* struct bulk_core_data_task { uint8_t start_core; uint8_t current_core; @@ -96,6 +99,7 @@ struct bulk_core_data_task { PoreFlex gpe_req; } __attribute__ ((__packed__)); typedef struct bulk_core_data_task bulk_core_data_task_t; +*/ //Only PCBS_LOCAL_PSTATE_FREQ_TARGET_STATUS_REG register is being //collected at this time. Other register will be added when needed. @@ -113,8 +117,9 @@ struct gpe_fast_core_data { typedef struct gpe_fast_core_data gpe_fast_core_data_t; //Global low and high cores structures used for task data pointers -extern bulk_core_data_task_t G_low_cores; -extern bulk_core_data_task_t G_high_cores; +// TEMP -- CoreData / PoreFlex objects no longer exist +//extern bulk_core_data_task_t G_low_cores; +//extern bulk_core_data_task_t G_high_cores; //Global G_present_cores is bitmask of all OCC core numbering extern uint32_t G_present_cores; @@ -171,9 +176,11 @@ void task_fast_core_data( task_t * i_task ); //Returns a pointer to the most up-to-date bulk core data for the core //associated with the specified OCC core id. -gpe_bulk_core_data_t * proc_get_bulk_core_data_ptr( const uint8_t i_occ_core_id ); +// TEMP -- CoreData / PoreFlex objects no longer exist +//gpe_bulk_core_data_t * proc_get_bulk_core_data_ptr( const uint8_t i_occ_core_id ); //Returns a pointer to the most up-to-date fast core data -gpe_fast_core_data_t * proc_get_fast_core_data_ptr( void ); +// TEMP -- CoreData / PoreFlex objects no longer exist +//gpe_fast_core_data_t * proc_get_fast_core_data_ptr( void ); #endif //_PROC_DATA_H diff --git a/src/occ_405/proc/proc_data_control.h b/src/occ_405/proc/proc_data_control.h index 6e151e8..cad7202 100755 --- a/src/occ_405/proc/proc_data_control.h +++ b/src/occ_405/proc/proc_data_control.h @@ -29,7 +29,7 @@ #include <occ_common.h> #include <ssx.h> #include "rtls.h" -#include "gpe_control.h" +//#include "gpe_control.h" // Initialze the structures used by the GPE void proc_core_data_control_init( void ); diff --git a/src/occ_405/proc/proc_pstate.h b/src/occ_405/proc/proc_pstate.h index 3ac8439..928dec5 100755 --- a/src/occ_405/proc/proc_pstate.h +++ b/src/occ_405/proc/proc_pstate.h @@ -27,17 +27,17 @@ #define PROC_PSTATE_H #include "ssx.h" -#include "cmdh_service_codes.h" +//#include "cmdh_service_codes.h" #include "errl.h" #include "trac.h" #include "rtls.h" #include "occ_common.h" #include "state.h" -#include "cmdh_fsp_cmds.h" -#include "cmdhDbugCmd.h" +//#include "cmdh_fsp_cmds.h" +//#include "cmdhDbugCmd.h" #include "appletManager.h" -#include "gpsm.h" -#include "pstates.h" +//#include "gpsm.h" +//#include "pstates.h" // GPSM DCM Synchronization - used by MBOX to transfer between DCM M & S typedef struct @@ -90,29 +90,32 @@ enum { OCC_RESET = 0x05, }; -extern GlobalPstateTable G_global_pstate_table; +//extern GlobalPstateTable G_global_pstate_table; extern uint32_t G_mhz_per_pstate; extern sapphire_table_t G_sapphire_table; // Initialize PState Table -errlHndl_t proc_gpsm_pstate_initialize(const PstateSuperStructure* i_pss); +// TEMP -- PstateSuperStructure no longer exists +//errlHndl_t proc_gpsm_pstate_initialize(const PstateSuperStructure* i_pss); // Entry function for enabling Pstates once table is installed -void proc_gpsm_dcm_sync_enable_pstates_smh(void); +//void proc_gpsm_dcm_sync_enable_pstates_smh(void); // Get DCM Sync State -proc_gpsm_dcm_sync_occfw_t proc_gpsm_dcm_sync_get_state(void); +//proc_gpsm_dcm_sync_occfw_t proc_gpsm_dcm_sync_get_state(void); // Pull down DCM pair's Sync State & Info via Mbox void proc_gpsm_dcm_sync_update_from_mbox(proc_gpsm_dcm_sync_occfw_t * i_dcm_sync_state); // Helper function to translate from Frequency to nearest Pstate -Pstate proc_freq2pstate(uint32_t i_freq_mhz); +// TEMP -- Pstate no longer exists +//Pstate proc_freq2pstate(uint32_t i_freq_mhz); // Helper function to translate from Pstate to nearest Frequency -uint32_t proc_pstate2freq(Pstate i_pstate); +// TEMP -- Pstate no longer exists +//uint32_t proc_pstate2freq(Pstate i_pstate); // Helper function to determine if we are a DCM inline bool proc_is_dcm(); diff --git a/src/occ_405/pss/apss.c b/src/occ_405/pss/apss.c index 4c2cc59..d530b7e 100755 --- a/src/occ_405/pss/apss.c +++ b/src/occ_405/pss/apss.c @@ -25,6 +25,7 @@ #include "ssx.h" +#include <occhw_async.h> #include <trac_interface.h> #include <apss.h> #include <occ_common.h> @@ -62,9 +63,10 @@ GPE_BUFFER(apss_start_args_t G_gpe_start_pwr_meas_read_args); GPE_BUFFER(apss_continue_args_t G_gpe_continue_pwr_meas_read_args); GPE_BUFFER(apss_complete_args_t G_gpe_complete_pwr_meas_read_args); -PoreEntryPoint GPE_apss_start_pwr_meas_read; -PoreEntryPoint GPE_apss_continue_pwr_meas_read; -PoreEntryPoint GPE_apss_complete_pwr_meas_read; +// TEMP -- NO MORE PORE +//PoreEntryPoint GPE_apss_start_pwr_meas_read; +//PoreEntryPoint GPE_apss_continue_pwr_meas_read; +//PoreEntryPoint GPE_apss_complete_pwr_meas_read; // Up / down counter for redundant apss failures uint32_t G_backup_fail_count = 0; @@ -186,16 +188,19 @@ void do_apss_recovery(void) break; } +/* TEMP -- UNRESOLVED TRACE ERRORS TRAC_ERR("70000[%08x] 70001[%08x] 70002[%08x] 70003|70005[%08x] 70010[%08x]", (uint32_t)(l_spi_adc_ctrl0 >> 32), (uint32_t)(l_spi_adc_ctrl1 >> 32), (uint32_t)(l_spi_adc_ctrl2 >> 32), (uint32_t)((l_spi_adc_status >> 32) | (l_spi_adc_reset >> 48)), // Stuff reset register in lower 16 bits (uint32_t)(l_spi_adc_wdata >> 32)); - +*/ // Special error handling on OCC backup. Keep an up/down counter of // fail/success and log predictive error when we reach the limit. - if(G_occ_role == OCC_SLAVE) +// if(G_occ_role == OCC_SLAVE) +// TEMP -- IN PHASE 1 WE ARE ALWAYS MASTER + if (FALSE) { if(G_backup_fail_count < MAX_BACKUP_FAILURES) { @@ -292,7 +297,8 @@ void do_apss_recovery(void) // Note: The complete request must be global, since it must stick around until after the // GPE program has completed (in order to do the callback). -PoreFlex G_meas_start_request; +// TEMP -- NO MORE PORE +//PoreFlex G_meas_start_request; // Function Specification // // Name: task_apss_start_pwr_meas @@ -315,6 +321,7 @@ void task_apss_start_pwr_meas(struct task *i_self) do { +/* TEMP -- NO MORE PORE if (!async_request_is_idle(&G_meas_start_request.request)) { if (!L_idle_traced) @@ -324,7 +331,7 @@ void task_apss_start_pwr_meas(struct task *i_self) } break; } - +*/ // Check if we need to try recovering the apss if(G_apss_recovery_requested) { @@ -335,7 +342,8 @@ void task_apss_start_pwr_meas(struct task *i_self) if (L_scheduled) { - if ((ASYNC_REQUEST_STATE_COMPLETE != G_meas_start_request.request.completion_state) || +// TEMP -- UNCOMMENT ONCE G_meas_start_request is defined again +/* if ((ASYNC_REQUEST_STATE_COMPLETE != G_meas_start_request.request.completion_state) || (0 != G_gpe_start_pwr_meas_read_args.error.error)) { //error should only be non-zero in the case where the GPE timed out waiting for @@ -360,7 +368,7 @@ void task_apss_start_pwr_meas(struct task *i_self) * @userdata1 GPE returned rc code * @userdata4 ERC_APSS_COMPLETE_FAILURE * @devdesc Failure getting power measurement data from APSS - */ + */ /* l_err = createErrl(PSS_MID_APSS_START_MEAS, // i_modId APSS_GPE_FAILURE, // i_reasonCode ERC_APSS_COMPLETE_FAILURE, @@ -383,6 +391,7 @@ void task_apss_start_pwr_meas(struct task *i_self) L_ffdc_collected = TRUE; } } +*/ } // Clear these out prior to starting the GPE (GPE only sets them) @@ -390,7 +399,8 @@ void task_apss_start_pwr_meas(struct task *i_self) G_gpe_start_pwr_meas_read_args.error.ffdc = 0; // Submit the next request - l_rc = pore_flex_schedule(&G_meas_start_request); +// TEMP -- NO MORE PORE +// l_rc = pore_flex_schedule(&G_meas_start_request); if (0 != l_rc) { errlHndl_t l_err = NULL; @@ -439,7 +449,8 @@ void task_apss_start_pwr_meas(struct task *i_self) // Note: The complete request must be global, since it must stick around until after the // GPE program has completed (in order to do the callback). -PoreFlex G_meas_cont_request; +// TEMP -- NO MORE PORE +//PoreFlex G_meas_cont_request; // Function Specification // // Name: task_apss_continue_pwr_meas @@ -463,6 +474,7 @@ void task_apss_continue_pwr_meas(struct task *i_self) do { +/* TEMP -- NO MORE PORE if (!async_request_is_idle(&G_meas_cont_request.request)) { if (!L_idle_traced) @@ -472,7 +484,7 @@ void task_apss_continue_pwr_meas(struct task *i_self) } break; } - +*/ //Don't run anything if apss recovery is in progress if(G_apss_recovery_requested) { @@ -481,6 +493,7 @@ void task_apss_continue_pwr_meas(struct task *i_self) if (L_scheduled) { +/* TEMP -- UNCOMMENT ONCE G_meas_cont_request IS DEFINED AGAIN if ((ASYNC_REQUEST_STATE_COMPLETE != G_meas_cont_request.request.completion_state) || (0 != G_gpe_continue_pwr_meas_read_args.error.error)) { @@ -508,7 +521,7 @@ void task_apss_continue_pwr_meas(struct task *i_self) * @userdata2 0 * @userdata4 ERC_APSS_COMPLETE_FAILURE * @devdesc Failure getting power measurement data from APSS - */ + */ /* l_err = createErrl(PSS_MID_APSS_CONT_MEAS, // i_modId APSS_GPE_FAILURE, // i_reasonCode ERC_APSS_COMPLETE_FAILURE, @@ -531,6 +544,7 @@ void task_apss_continue_pwr_meas(struct task *i_self) L_ffdc_collected = TRUE; } } +*/ } // Clear these out prior to starting the GPE (GPE only sets them) @@ -538,6 +552,7 @@ void task_apss_continue_pwr_meas(struct task *i_self) G_gpe_continue_pwr_meas_read_args.error.ffdc = 0; // Submit the next request +/* TEMP -- UNCOMMENT ONCE G_meas_cont_request IS DEFINED AGAIN l_rc = pore_flex_schedule(&G_meas_cont_request); if (0 != l_rc) { @@ -554,7 +569,7 @@ void task_apss_continue_pwr_meas(struct task *i_self) * @userdata2 0 * @userdata4 ERC_APSS_SCHEDULE_FAILURE * @devdesc task_apss_continue_pwr_meas schedule failed - */ + */ /* l_err = createErrl(PSS_MID_APSS_CONT_MEAS, SSX_GENERIC_FAILURE, ERC_APSS_SCHEDULE_FAILURE, @@ -571,7 +586,7 @@ void task_apss_continue_pwr_meas(struct task *i_self) } L_scheduled = TRUE; - +*/ }while (0); APSS_DBG("task_apss_continue_pwr_meas: finished w/rc=0x%08X\n", G_gpe_continue_pwr_meas_read_args.error.rc); @@ -619,7 +634,9 @@ void reformat_meas_data() } // Don't do the copy unless this is the master OCC - if(G_occ_role == OCC_MASTER) +// if(G_occ_role == OCC_MASTER) + // TEMP -- IN PHASE 1 WE ARE ALWAYS MASTER + if (TRUE) { // Fail every 16 seconds @@ -656,7 +673,8 @@ void reformat_meas_data() // Note: The complete request must be global, since it must stick around until after the // GPE program has completed (in order to do the callback). -PoreFlex G_meas_complete_request; +// TEMP -- NO MORE PORE +//PoreFlex G_meas_complete_request; // Function Specification // @@ -680,6 +698,8 @@ void task_apss_complete_pwr_meas(struct task *i_self) do { +// TEMP -- UNCOMMENT ONCE G_meas_complete_request IS DEFINED AGAIN +/* if (!async_request_is_idle(&G_meas_complete_request.request)) { if (!L_idle_traced) @@ -689,7 +709,7 @@ void task_apss_complete_pwr_meas(struct task *i_self) } break; } - +*/ if(G_apss_recovery_requested) { // Allow apss measurement to proceed on next tick @@ -700,6 +720,8 @@ void task_apss_complete_pwr_meas(struct task *i_self) if (L_scheduled) { +// TEMP -- UNCOMMENT ONCE G_meas_complete_request IS DEFINED AGAIN +/* if ((ASYNC_REQUEST_STATE_COMPLETE != G_meas_complete_request.request.completion_state) || (0 != G_gpe_complete_pwr_meas_read_args.error.error)) { @@ -726,7 +748,7 @@ void task_apss_complete_pwr_meas(struct task *i_self) * @userdata2 0 * @userdata4 ERC_APSS_COMPLETE_FAILURE * @devdesc Failure getting power measurement data from APSS - */ + */ /* l_err = createErrl(PSS_MID_APSS_COMPLETE_MEAS, // i_modId APSS_GPE_FAILURE, // i_reasonCode ERC_APSS_COMPLETE_FAILURE, @@ -749,6 +771,7 @@ void task_apss_complete_pwr_meas(struct task *i_self) L_ffdc_collected = TRUE; } } +*/ } // Clear these out prior to starting the GPE (GPE only sets them) @@ -756,7 +779,9 @@ void task_apss_complete_pwr_meas(struct task *i_self) G_gpe_complete_pwr_meas_read_args.error.ffdc = 0; // Submit the next request - l_rc = pore_flex_schedule(&G_meas_complete_request); +// TEMP -- UNCOMMENT ONCE G_meas_complete_request IS DEFINED AGAIN +/* + l_rc = pore_flex_schedule(&G_meas_complete_request); if (0 != l_rc) { errlHndl_t l_err = NULL; @@ -772,7 +797,7 @@ void task_apss_complete_pwr_meas(struct task *i_self) * @userdata2 0 * @userdata4 ERC_APSS_SCHEDULE_FAILURE * @devdesc task_apss_complete_pwr_meas schedule failed - */ + */ /* l_err = createErrl(PSS_MID_APSS_COMPLETE_MEAS, SSX_GENERIC_FAILURE, ERC_APSS_SCHEDULE_FAILURE, @@ -787,7 +812,7 @@ void task_apss_complete_pwr_meas(struct task *i_self) L_scheduled = FALSE; break; } - +*/ L_scheduled = TRUE; @@ -809,6 +834,8 @@ bool apss_gpio_get(uint8_t i_pin_number, uint8_t *o_pin_value) // The default value is all 0, so check if it's no-zero bool l_dcom_data_valid = FALSE; int i=0; +// TEMP -- NO DCOM IN PHASE1 +/* for(;i<sizeof(G_dcom_slv_inbox_rx);i++) { if( ((char*)&G_dcom_slv_inbox_rx)[i] != 0 ) @@ -817,7 +844,7 @@ bool apss_gpio_get(uint8_t i_pin_number, uint8_t *o_pin_value) break; } } - +*/ if( l_dcom_data_valid == TRUE) { uint8_t l_gpio_port = i_pin_number/NUM_OF_APSS_PINS_PER_GPIO_PORT; diff --git a/src/occ_405/reset.c b/src/occ_405/reset.c index f99fc40..5ec2e81 100755 --- a/src/occ_405/reset.c +++ b/src/occ_405/reset.c @@ -102,7 +102,8 @@ void reset_state_request(uint8_t i_request) // Post the semaphore to wakeup the thread that // will put us into SAFE state. - ssx_semaphore_post(&G_dcomThreadWakeupSem); +// TEMP -- THIS THREAD ISN"T ACTUALLY RUNNING IN PHASE1 +// ssx_semaphore_post(&G_dcomThreadWakeupSem); // Set RTL Flags here too, depending how urgent it is that we stop // running tasks. @@ -149,7 +150,8 @@ void reset_state_request(uint8_t i_request) // End Function Specification void task_check_for_checkstop(task_t *i_self) { - pore_status_t l_gpe0_status; +// TEMP -- NO MORE PORE +// pore_status_t l_gpe0_status; ocb_oisr0_t l_oisr0_status; static bool L_checkstop_traced = FALSE; uint8_t l_reason_code = 0; @@ -165,6 +167,7 @@ void task_check_for_checkstop(task_t *i_self) // Looked for a frozen GPE, a sign that the chip has stopped working or // check-stopped. This check also looks for an interrupt status flag that // indicates if the system has check-stopped. +/* TEMP -- NO MORE PORE / check_stop field no longer exists l_gpe0_status.value = in64(PORE_GPE0_STATUS); l_oisr0_status.value = in32(OCB_OISR0); @@ -203,7 +206,7 @@ void task_check_for_checkstop(task_t *i_self) * @userdata1 High order word of PORE_GPE0_STATUS * @userdata2 OCB_OISR0 * @devdesc OCC detected system checkstop - */ + */ /* l_err = createErrl(MAIN_SYSTEM_HALTED_MID, l_reason_code, OCC_NO_EXTENDED_RC, @@ -217,6 +220,7 @@ void task_check_for_checkstop(task_t *i_self) // checkstop conditions and take appropriate actions. commitErrl(&l_err); } +*/ } while(0); } diff --git a/src/occ_405/rtls/rtls.c b/src/occ_405/rtls/rtls.c index df303c9..b0f7bbf 100755 --- a/src/occ_405/rtls/rtls.c +++ b/src/occ_405/rtls/rtls.c @@ -27,8 +27,8 @@ #include "rtls_service_codes.h" #include "threadSch.h" // for DEFAULT_TRACE_SIZE #include "occ_service_codes.h" // for SSX_GENERIC_FAILURE -#include <pgp_common.h> // OCB interrupt controller -#include <pgp_ocb.h> // OCB timer +#include <occhw_common.h> // OCB interrupt controller +#include <occhw_ocb.h> // OCB timer #include <errl.h> // Error logging #include "amec_external.h" #include <trac.h> // Traces @@ -51,7 +51,8 @@ uint32_t G_run_mask_deferred = GLOBAL_RUN_MASK; uint32_t G_current_tick = 0xFFFFFFFF; // The durations measured within the current tick -fw_timing_t G_fw_timing; +// TEMP -- PORE ISSUES +//fw_timing_t G_fw_timing; // The global TICK table // See notes regarding this table in rtls_tables.c. @@ -303,7 +304,8 @@ void rtl_do_tick( void *private, SsxIrqId irq, int priority ) CURRENT_TICK++; // Save off start time of RTL tick - G_fw_timing.rtl_start = l_start; +// TEMP -- COMMENTED OUT DUE TO PORE ISSUES +// G_fw_timing.rtl_start = l_start; // Set global run mask point to deferred mask so that any modification // to the deferred mask flag is taken into effect for this tick. @@ -312,7 +314,8 @@ void rtl_do_tick( void *private, SsxIrqId irq, int priority ) RTLS_DBG("#### Tick %d ####\n",CURRENT_TICK); // Execute ARL Test Code before we run any tasks. TODO: Remove when no longer needed. - arl_test(); +// TEMP -- DON'T THINK THIS IS NEEDED IN PHASE1 +// arl_test(); // Index into the tick table to get a pointer to the tick sequence for the current tick. l_taskid_ptr = G_tick_table[ (MAX_NUM_TICKS - 1) & CURRENT_TICK ]; @@ -386,7 +389,8 @@ void rtl_do_tick( void *private, SsxIrqId irq, int priority ) } while(TRUE); // Save timing of RTL tick - G_fw_timing.rtl_dur = DURATION_IN_US_UNTIL_NOW_FROM(l_start); +// TEMP -- PORE ISSUES +// G_fw_timing.rtl_dur = DURATION_IN_US_UNTIL_NOW_FROM(l_start); RTLS_DBG("RTL Tick Duration: %d us\n",(int)G_fw_timing.rtl_dur); diff --git a/src/occ_405/rtls/rtls.h b/src/occ_405/rtls/rtls.h index a685883..5ecb24c 100755 --- a/src/occ_405/rtls/rtls.h +++ b/src/occ_405/rtls/rtls.h @@ -63,6 +63,7 @@ typedef enum { } task_id_t; // Structure containing the durations measured within a tick +/* TEMP -- PoreFlex object no longer exists typedef struct { uint32_t rtl_dur; // Duration of RTL tick interrupt @@ -75,6 +76,7 @@ typedef struct PoreFlex * gpe0_timing_request; // GPE Request that facilitates GPE WC meas PoreFlex * gpe1_timing_request; // GPE Request that facilitates GPE WC meas } fw_timing_t; +*/ // Bit flags to define when a task can run // NOTE: whenever new flag is added, it must also be added to the @@ -112,7 +114,7 @@ typedef struct extern uint32_t G_current_tick; // The durations measured within the current tick -extern fw_timing_t G_fw_timing; +// extern fw_timing_t G_fw_timing; // Preferred macro for accessing the current tick value #define CURRENT_TICK G_current_tick diff --git a/src/occ_405/rtls/rtls_tables.c b/src/occ_405/rtls/rtls_tables.c index e0414a4..63c083f 100755 --- a/src/occ_405/rtls/rtls_tables.c +++ b/src/occ_405/rtls/rtls_tables.c @@ -89,24 +89,38 @@ task_t G_task_table[TASK_END] = { // flags, func_ptr, data_ptr,// task_id_t { FLAGS_APSS_START_MEAS, task_apss_start_pwr_meas, NULL }, // TASK_ID_APSS_START - { FLAGS_LOW_CORES_DATA, task_core_data, (void *) &G_low_cores}, +// TEMP -- PORE ISSUES +// { FLAGS_LOW_CORES_DATA, task_core_data, (void *) &G_low_cores}, { FLAGS_APSS_CONT_MEAS, task_apss_continue_pwr_meas, NULL }, // TASK_ID_APSS_CONT - { FLAGS_HIGH_CORES_DATA, task_core_data, (void *) &G_high_cores}, +// TEMP -- PORE ISSUES +// { FLAGS_HIGH_CORES_DATA, task_core_data, (void *) &G_high_cores}, { FLAGS_APSS_DONE_MEAS, task_apss_complete_pwr_meas, NULL }, // TASK_ID_APSS_DONE - { FLAGS_FAST_CORES_DATA, task_fast_core_data, NULL }, - { FLAGS_DCOM_RX_SLV_INBX, task_dcom_rx_slv_inbox, NULL }, // TASK_ID_DCOM_RX_INBX - { FLAGS_DCOM_TX_SLV_INBX, task_dcom_tx_slv_inbox, NULL }, // TASK_ID_DCOM_TX_INBX +// TEMP -- NOT SUPPORTED YET IN PHASE1 +// { FLAGS_FAST_CORES_DATA, task_fast_core_data, NULL }, +// TEMP -- NOT SUPPORTED YET IN PHASE1 +// { FLAGS_DCOM_RX_SLV_INBX, task_dcom_rx_slv_inbox, NULL }, // TASK_ID_DCOM_RX_INBX +// TEMP -- NOT SUPPORTED YET IN PHASE1 +// { FLAGS_DCOM_TX_SLV_INBX, task_dcom_tx_slv_inbox, NULL }, // TASK_ID_DCOM_TX_INBX { FLAGS_POKE_WDT, task_poke_watchdogs, NULL }, // TASK_ID_POKE_WDT - { FLAGS_DCOM_WAIT_4_MSTR, task_dcom_wait_for_master, NULL }, // TASK_ID_DCOM_WAIT_4_MSTR - { FLAGS_DCOM_RX_SLV_OUTBOX, task_dcom_rx_slv_outboxes, NULL }, // TASK_ID_DCOM_RX_OUTBX - { FLAGS_DCOM_TX_SLV_OUTBOX, task_dcom_tx_slv_outbox, NULL }, // TASK_ID_DCOM_TX_OUTBX - { FLAGS_DCOM_PARSE_OCC_FW_MSG, task_dcom_parse_occfwmsg, NULL }, // TASK_ID_DCOM_PARSE_FW_MSG +// TEMP -- NOT SUPPORTED YET IN PHASE1 +// { FLAGS_DCOM_WAIT_4_MSTR, task_dcom_wait_for_master, NULL }, // TASK_ID_DCOM_WAIT_4_MSTR +// TEMP -- NOT SUPPORTED YET IN PHASE1 +// { FLAGS_DCOM_RX_SLV_OUTBOX, task_dcom_rx_slv_outboxes, NULL }, // TASK_ID_DCOM_RX_OUTBX +// TEMP -- NOT SUPPORTED YET IN PHASE1 +// { FLAGS_DCOM_TX_SLV_OUTBOX, task_dcom_tx_slv_outbox, NULL }, // TASK_ID_DCOM_TX_OUTBX +// TEMP -- NOT SUPPORTED YET IN PHASE1 +// { FLAGS_DCOM_PARSE_OCC_FW_MSG, task_dcom_parse_occfwmsg, NULL }, // TASK_ID_DCOM_PARSE_FW_MSG { FLAGS_CHECK_FOR_CHECKSTOP, task_check_for_checkstop, NULL }, // TASK_ID_CHECK_FOR_CHECKSTOP - { FLAGS_AMEC_SLAVE, task_amec_slave, NULL }, // TASK_ID_AMEC_SLAVE - { FLAGS_AMEC_MASTER, task_amec_master, NULL }, // TASK_ID_AMEC_MASTER - { FLAGS_CENTAUR_DATA, task_centaur_data, (void *) &G_centaur_data_task}, // TASK_ID_CENTAUR_DATA - { FLAGS_CORE_DATA_CONTROL, task_core_data_control, NULL }, // TASK_ID_CORE_DATA_CONTROL - { FLAGS_CENTAUR_CONTROL, task_centaur_control, (void *) &G_centaur_control_task }, // TASK_ID_CENTAUR_CONTROL +// TEMP -- NOT SUPPORTED YET IN PHASE1 +// { FLAGS_AMEC_SLAVE, task_amec_slave, NULL }, // TASK_ID_AMEC_SLAVE +// TEMP -- NOT SUPPORTED YET IN PHASE1 +// { FLAGS_AMEC_MASTER, task_amec_master, NULL }, // TASK_ID_AMEC_MASTER +// TEMP -- PORE ISSUES +// { FLAGS_CENTAUR_DATA, task_centaur_data, (void *) &G_centaur_data_task}, // TASK_ID_CENTAUR_DATA +// TEMP -- NOT SUPPORTED YET IN PHASE1 +// { FLAGS_CORE_DATA_CONTROL, task_core_data_control, NULL }, // TASK_ID_CORE_DATA_CONTROL +// TEMP -- PORE ISSUES +// { FLAGS_CENTAUR_CONTROL, task_centaur_control, (void *) &G_centaur_control_task }, // TASK_ID_CENTAUR_CONTROL }; const uint8_t G_tick0_seq[] = { diff --git a/src/occ_405/ssx_app_cfg.h b/src/occ_405/ssx_app_cfg.h index d619f34..8b5a8d8 100755 --- a/src/occ_405/ssx_app_cfg.h +++ b/src/occ_405/ssx_app_cfg.h @@ -5,7 +5,7 @@ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2011,2015 */ +/* Contributors Listed Below - COPYRIGHT 2015 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -22,56 +22,154 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ - #ifndef __SSX_APP_CFG_H__ #define __SSX_APP_CFG_H__ +//----------------------------------------------------------------------------- +// *! (C) Copyright International Business Machines Corp. 2014 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +//----------------------------------------------------------------------------- -// These versions of SSX_PANIC are being changed so that they exactly -// mirror each other and are exactly structured at 8 instructions only and -// make only one branch to outside code. -#ifndef __ASSEMBLER__ -#ifndef SSX_PANIC -#define SSX_PANIC(code) \ -do { \ - barrier(); \ - asm volatile ("stw %r3, __occ_panic_save_r3@sda21(0)"); \ - asm volatile ("mflr %r3"); \ - asm volatile ("stw %r4, __occ_panic_save_r4@sda21(0)"); \ - asm volatile ("lis %%r4, %0"::"i" (code >> 16)); \ - asm volatile ("ori %%r4, %%r4, %0"::"i" (code & 0xffff)); \ - asm volatile ("bl __ssx_checkpoint_panic_and_save_ffdc"); \ - asm volatile ("trap"); \ - asm volatile (".long %0" : : "i" (code)); \ -} while (0) -#endif // SSX_PANIC -#else /* __ASSEMBLER__ */ -#ifndef SSX_PANIC -// This macro cannot be more than 8 instructions long, but it can be less than -// 8. -#define SSX_PANIC(code) _ssx_panic code - .macro _ssx_panic, code - stw %r3, __occ_panic_save_r3@sda21(0) - mflr %r3 - stw %r4, __occ_panic_save_r4@sda21(0) - lis %r4, \code@h - ori %r4, %r4, \code@l - bl __ssx_checkpoint_panic_and_save_ffdc - trap - .long \code - .endm -#endif // SSX_PANIC -#endif /* __ASSEMBLER__ */ +/// \file ssx_app_cfg.h +/// \brief Application specific overrides go here. +/// -#define INIT_SEC_NM_STR "initSection" -#define INIT_SECTION __attribute__ ((section (INIT_SEC_NM_STR))) +#include "global_app_cfg.h" + +/// Static configuration data for external interrupts: +/// +/// IRQ#, TYPE, POLARITY, ENABLE +/// +#define APPCFG_EXT_IRQS_CONFIG \ + OCCHW_IRQ_CHECK_STOP_PPC405 OCCHW_IRQ_TYPE_EDGE OCCHW_IRQ_POLARITY_RISING OCCHW_IRQ_MASKED \ + OCCHW_IRQ_EXTERNAL_TRAP OCCHW_IRQ_TYPE_LEVEL OCCHW_IRQ_POLARITY_HI OCCHW_IRQ_MASKED \ + OCCHW_IRQ_OCC_TIMER0 OCCHW_IRQ_TYPE_EDGE OCCHW_IRQ_POLARITY_RISING OCCHW_IRQ_MASKED \ + OCCHW_IRQ_OCC_TIMER1 OCCHW_IRQ_TYPE_EDGE OCCHW_IRQ_POLARITY_RISING OCCHW_IRQ_MASKED \ + OCCHW_IRQ_IPI4_HI_PRIORITY OCCHW_IRQ_TYPE_EDGE OCCHW_IRQ_POLARITY_RISING OCCHW_IRQ_MASKED \ + OCCHW_IRQ_PBAX_OCC_SEND OCCHW_IRQ_TYPE_EDGE OCCHW_IRQ_POLARITY_RISING OCCHW_IRQ_MASKED \ + OCCHW_IRQ_PBAX_OCC_PUSH0 OCCHW_IRQ_TYPE_EDGE OCCHW_IRQ_POLARITY_RISING OCCHW_IRQ_MASKED \ + OCCHW_IRQ_PBAX_OCC_PUSH1 OCCHW_IRQ_TYPE_EDGE OCCHW_IRQ_POLARITY_RISING OCCHW_IRQ_MASKED \ + OCCHW_IRQ_PBA_BCDE_ATTN OCCHW_IRQ_TYPE_EDGE OCCHW_IRQ_POLARITY_RISING OCCHW_IRQ_MASKED \ + OCCHW_IRQ_PBA_BCUE_ATTN OCCHW_IRQ_TYPE_EDGE OCCHW_IRQ_POLARITY_RISING OCCHW_IRQ_MASKED \ + OCCHW_IRQ_STRM0_PULL OCCHW_IRQ_TYPE_EDGE OCCHW_IRQ_POLARITY_RISING OCCHW_IRQ_MASKED \ + OCCHW_IRQ_STRM0_PUSH OCCHW_IRQ_TYPE_EDGE OCCHW_IRQ_POLARITY_RISING OCCHW_IRQ_MASKED \ + OCCHW_IRQ_STRM1_PULL OCCHW_IRQ_TYPE_EDGE OCCHW_IRQ_POLARITY_RISING OCCHW_IRQ_MASKED \ + OCCHW_IRQ_STRM1_PUSH OCCHW_IRQ_TYPE_EDGE OCCHW_IRQ_POLARITY_RISING OCCHW_IRQ_MASKED \ + OCCHW_IRQ_STRM2_PULL OCCHW_IRQ_TYPE_EDGE OCCHW_IRQ_POLARITY_RISING OCCHW_IRQ_MASKED \ + OCCHW_IRQ_STRM2_PUSH OCCHW_IRQ_TYPE_EDGE OCCHW_IRQ_POLARITY_RISING OCCHW_IRQ_MASKED \ + OCCHW_IRQ_STRM3_PULL OCCHW_IRQ_TYPE_EDGE OCCHW_IRQ_POLARITY_RISING OCCHW_IRQ_MASKED \ + OCCHW_IRQ_STRM3_PUSH OCCHW_IRQ_TYPE_EDGE OCCHW_IRQ_POLARITY_RISING OCCHW_IRQ_MASKED \ + OCCHW_IRQ_IPI4_LO_PRIORITY OCCHW_IRQ_TYPE_EDGE OCCHW_IRQ_POLARITY_RISING OCCHW_IRQ_MASKED \ + +/// The Instance ID of the occ processor that this application is intended to run on +/// 0-3 -> GPE, 4 -> 405 +#define APPCFG_OCC_INSTANCE_ID 4 + + +// Common configuration groups for verification. Bypass time-consuming setup +// or setup done by procedures for simulation environments, and set up special +// I/O configurations for simulation environments. + +#ifndef VERIFICATION +#define VERIFICATION 0 +#endif + +#ifndef OCC_UNIT_VERIFICATION +#define OCC_UNIT_VERIFICATION 0 +#endif + +#ifndef EPM_VERIFICATION +#define EPM_VERIFICATION 0 +#endif + +#ifndef VBU_VERIFICATION +#define VBU_VERIFICATION 0 +#endif + +#ifndef LAB_VALIDATION +#define LAB_VALIDATION 0 +#endif + +#if VERIFICATION || LAB_VALIDATION + +#if !LAB_VALIDATION +#define SSX_STACK_CHECK 0 +#endif #define SIMICS_ENVIRONMENT 0 -/// Since OCC Firmware desires time intervals longer than 7 seconds, we will -/// change the interval to be a uint64_t instead of a uint32_t so we don't -/// hit the overflow condition -#define SSX_TIME_INTERVAL_TYPE uint64_t +#else + +#define INITIALIZE_PBA_SLAVES 1 +#define INITIALIZE_PBA_BARS 1 + +#endif /* VERIFICATION */ + -#endif /* __SSX_APP_CFG_H__ */ +#if OCC_UNIT_VERIFICATION +#define USE_RTX_IO 1 +#endif +#if EPM_VERIFICATION +#define USE_EPM_IO 1 +#endif + +// VBU and the lab use trace buffer I/O. The DBCR0 is left untouched so VBU +// can use instruction/data breakpoints. + +#if VBU_VERIFICATION || LAB_VALIDATION +#define USE_TRACE_IO 1 +#define NO_INIT_DBCR0 1 +#endif + +// Default initializations for validation that affect SSX and library code + +#ifndef SIMICS_ENVIRONMENT +#define SIMICS_ENVIRONMENT 1 +#endif + +#ifndef USE_SIMICS_IO +#define USE_SIMICS_IO 1 +#endif + +#ifndef USE_RTX_IO +#define USE_RTX_IO 0 +#endif + +#ifndef USE_TRACE_IO +#define USE_TRACE_IO 0 +#endif + +#ifndef USE_EPM_IO +#define USE_EPM_IO 0 +#endif + + +/// The buffer used for 'ssxout' in VBU and lab applications +/// +/// The buffer is defined to be quite large in order to accomodate full kernel +/// and application dumps in the event of problems. +#ifndef SSXOUT_TRACE_BUFFER_SIZE +#define SSXOUT_TRACE_BUFFER_SIZE (32 * 1024) +#endif + +#ifndef APPCFG_USE_EXT_TIMEBASE_FOR_TRACE +#define APPCFG_USE_EXT_TIMEBASE_FOR_TRACE 1 +#endif + +#ifndef PPC405_TIMEBASE_HZ +#define PPC405_TIMEBASE_HZ 600000000 +#endif + +//If we are using the external timebase for traces, assume it is 37500000 Hz. +//Otherwise, it will use the PPC405 timebase. +#if APPCFG_USE_EXT_TIMEBASE_FOR_TRACE +#define SSX_TRACE_TIMEBASE_HZ 37500000 +#else +#define SSX_TRACE_TIMEBASE_HZ PPC405_TIMEBASE_HZ +#endif /* APPCFG_USE_EXT_TIMEBASE_FOR_TRACE */ + +#define INIT_SEC_NM_STR "initSection" +#define INIT_SECTION __attribute__ ((section (INIT_SEC_NM_STR))) +#endif /*__SSX_APP_CFG_H__*/ diff --git a/src/occ_405/state.c b/src/occ_405/state.c index 716c10c..4333195 100755 --- a/src/occ_405/state.c +++ b/src/occ_405/state.c @@ -1,4 +1,4 @@ -/* IBM_PROLOG_BEGIN_TAG */ +\/* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ /* $Source: src/occ/state.c $ */ @@ -36,9 +36,11 @@ #include "cmdh_fsp_cmds_datacnfg.h" #include "cmdh_fsp.h" #include "proc_data.h" -#include "heartbeat.h" +// TEMP -- Doesn't exist anymore +//#include "heartbeat.h" #include "scom.h" -#include <fir_data_collect.h> +// TEMP -- Not supported in phase1 +//#include <fir_data_collect.h> extern proc_gpsm_dcm_sync_occfw_t G_proc_dcm_sync_state; extern bool G_mem_monitoring_allowed; @@ -241,6 +243,7 @@ errlHndl_t SMGR_observation_to_standby() errlHndl_t SMGR_observation_to_active() { errlHndl_t l_errlHndl = NULL; +/* TEMP -- UNNECCESSARY IN PHASE1 static bool l_error_logged = FALSE; // To prevent trace and error log happened over and over int l_extRc = OCC_NO_EXTENDED_RC; int l_rc = 0; @@ -271,17 +274,20 @@ errlHndl_t SMGR_observation_to_active() { if(FALSE == l_error_logged) { +/* TEMP -- UNRESOLVED TRACE ERRORS TRAC_ERR("SMGR: Timeout waiting for Pstates to be enabled, master state=%d, slave state=%d, pmc_mode[%08x], chips_present[%02x], pmc_deconfig[%08x]", //gm034 G_proc_dcm_sync_state.sync_state_master, G_proc_dcm_sync_state.sync_state_slave, in32(PMC_MODE_REG), G_sysConfigData.is_occ_present, in32(PMC_CORE_DECONFIGURATION_REG)); +*/ /* } l_extRc = ERC_GENERIC_TIMEOUT; break; } - proc_gpsm_dcm_sync_enable_pstates_smh(); +// TEMP -- We don't support Pstates in Phase1 +// proc_gpsm_dcm_sync_enable_pstates_smh(); ssx_sleep(SSX_MICROSECONDS(500)); } if(proc_is_hwpstate_enabled() && G_sysConfigData.system_type.kvm) @@ -306,6 +312,7 @@ errlHndl_t SMGR_observation_to_active() rtl_clr_run_mask_deferred(RTL_FLAG_OBS); rtl_set_run_mask_deferred(RTL_FLAG_ACTIVE); +/* TEMP -- NOT SUPPORTED IN PHASE1 // Ensure that the dpll override (enabled when mfg biases freq) has been disabled. int l_core; uint32_t l_configured_cores; @@ -324,7 +331,7 @@ errlHndl_t SMGR_observation_to_active() break; } } - +*/ /* if(!l_rc) { @@ -344,6 +351,8 @@ errlHndl_t SMGR_observation_to_active() TRAC_IMP("Configuring PCBS heartbeat for configured cores=0x%8.8x", l_cfgd_cores); TRAC_IMP("OCC configuration view: G_present_hw_cores=0x%8.8x, G_present_cores=0x%8.8x", G_present_hw_cores, G_present_cores); + +/* TEMP -- NOT SUPPORTED IN PHASE1 // Setup the pcbs heartbeat timer l_rc = pcbs_hb_config(1, // enable = yes l_cfgd_cores, @@ -366,7 +375,7 @@ errlHndl_t SMGR_observation_to_active() PCBS_HEARBEAT_TIME_US, l_actual_pcbs_hb_time); } - +*/ /* // TODO: #state_c_001 Manually configuring the PMC // heartbeat until pmc_hb_config is shown to be working // Reference SW238882 for more information on updates needed in @@ -381,11 +390,13 @@ errlHndl_t SMGR_observation_to_active() // This combined with the hang pulse count and pre-divider yields // about a 2 second timeout pohr.fields.pmc_occ_heartbeat_time = 0xffff; +/* TEMP -- UNRESOLVED TRACE ERROR: "sizeof applied to a bitfield" TRAC_IMP("Configure PMC heartbeat, heartbeat_time=0x%x", pohr.fields.pmc_occ_heartbeat_time); ppr0.fields.hangpulse_predivider = 1; TRAC_IMP("Configure PMC parm reg predivider=%d", ppr0.fields.hangpulse_predivider); +*/ /* // Write registers twice, known issue with heartbeat reg out32(PMC_OCC_HEARTBEAT_REG, pohr.value); out32(PMC_OCC_HEARTBEAT_REG, pohr.value); @@ -423,7 +434,7 @@ errlHndl_t SMGR_observation_to_active() * @userdata2 valid states * @userdata4 ERC_STATE_FROM_OBS_TO_STB_FAILURE * @devdesc Failed changing from observation to standby - */ + */ /* l_errlHndl = createErrl(MAIN_STATE_TRANSITION_MID, //modId INTERNAL_FAILURE, //reasoncode l_extRc, //Extended reason code @@ -439,6 +450,7 @@ errlHndl_t SMGR_observation_to_active() ERRL_COMPONENT_ID_FIRMWARE, ERRL_CALLOUT_PRIORITY_HIGH); } +*/ return l_errlHndl; } @@ -553,7 +565,9 @@ errlHndl_t SMGR_all_to_safe() // If we are master, make sure we are broadcasting that the requested // state is "safe state" - if (OCC_MASTER == G_occ_role) +// TEMP -- IN PHASE1 WE ARE ALWAYS MASTER +// if (OCC_MASTER == G_occ_role) + if (TRUE) { G_occ_external_req_state = OCC_STATE_SAFE; } @@ -697,6 +711,7 @@ errlHndl_t SMGR_set_state(OCC_STATE i_new_state) uint8_t SMGR_validate_get_valid_states(void) { uint8_t l_valid_states = 0; +/* TEMP -- NOT SUPPORTED IN PHASE1 uint32_t l_datamask = DATA_get_present_cnfgdata(); static BOOLEAN l_throttle_traced = FALSE; @@ -727,7 +742,9 @@ uint8_t SMGR_validate_get_valid_states(void) } // If we are master OCC, set this bit - if(OCC_MASTER == G_occ_role) +// TEMP -- IN PHASE 1 WE ARE ALWAYS MASTER +// if(OCC_MASTER == G_occ_role) + if (TRUE) { l_valid_states |= SMGR_MASK_MASTER_OCC; } @@ -737,7 +754,7 @@ uint8_t SMGR_validate_get_valid_states(void) { l_valid_states |= OCC_ROLE_FIR_MASTER_MASK; } - +*/ return l_valid_states; } diff --git a/src/occ_405/thread/threadSch.c b/src/occ_405/thread/threadSch.c index cfb996e..48fb419 100755 --- a/src/occ_405/thread/threadSch.c +++ b/src/occ_405/thread/threadSch.c @@ -147,13 +147,14 @@ void initThreadScheduler(void) // threads in G_scheduledThreads ie highest priority thread should be // index 0 of G_scheduledThreads +/* TEMP -- NOT USED IN PHASE1 l_cmdThreadRc = createAndResumeThreadHelper(&Cmd_Hndl_thread, Cmd_Hndl_thread_routine, (void *)0, (SsxAddress)Cmd_hndl_thread_stack, THREAD_STACK_SIZE, THREAD_PRIORITY_3); - +*/ l_appThreadRc = createAndResumeThreadHelper(&App_thread, App_thread_routine, (void *)&G_apltPdtType, @@ -167,14 +168,14 @@ void initThreadScheduler(void) (SsxAddress)testAppletThreadStack, THREAD_STACK_SIZE, THREAD_PRIORITY_5); - +/* TEMP -- NOT USED IN PHASE1 l_dcomThreadRc = createAndResumeThreadHelper(&Dcom_thread, Dcom_thread_routine, (void *)0, (SsxAddress)dcomThreadStack, THREAD_STACK_SIZE, THREAD_PRIORITY_6); - +*/ // Create the thread scheduler timer l_timerRc = ssx_timer_create(&G_threadSchTimer, threadSwapcallback, 0); @@ -189,10 +190,9 @@ void initThreadScheduler(void) { TRAC_INFO("Error creating timer: RC: %d", l_timerRc); } - +/* TEMP -- NOT USED IN PHASE1 // Create snapshot timer l_snapshotTimerRc = ssx_timer_create(&G_snapshotTimer, cmdh_snapshot_callback, 0); - // Check for errors creating the timer if(l_snapshotTimerRc == SSX_OK) { @@ -207,6 +207,7 @@ void initThreadScheduler(void) { TRAC_INFO("Error creating timer: RC: %d", l_snapshotTimerRc); } +*/ // If there are any errors creating the threads or starting the // timer create an error log to pass back. @@ -217,10 +218,12 @@ void initThreadScheduler(void) || l_timerRc || l_snapshotTimerRc ) { - TRAC_ERR("Error creating thread: l_appThreadRc: %d, " +// TEMP -- UNRESOLVED TRACE ERROR +/* TRAC_ERR("Error creating thread: l_appThreadRc: %d, " "l_testAppletThreadRc: %d, l_cmdThreadRc: %d, " "l_dcomThreadRc: %d", l_appThreadRc,l_testAppletThreadRc, l_timerRc,l_cmdThreadRc,l_dcomThreadRc); +*/ TRAC_ERR("Error starting timers: timerRc: %d, snapshotTimerRc: %d.", l_timerRc, l_snapshotTimerRc); // Create error log and log it diff --git a/src/occ_405/timer/timer.c b/src/occ_405/timer/timer.c index a85eaf8..4f1a7e8 100755 --- a/src/occ_405/timer/timer.c +++ b/src/occ_405/timer/timer.c @@ -23,35 +23,35 @@ /* */ /* IBM_PROLOG_END_TAG */ -//************************************************************************* +//*************************************************************************/ // Includes -//************************************************************************* +//*************************************************************************/ #include <timer.h> // timer defines #include "ssx.h" #include <trac.h> // Trace macros -#include <pgp_common.h> // PGP common defines -#include <pgp_ocb.h> // OCB timer interfaces +#include <occhw_common.h> // PGP common defines +#include <occhw_ocb.h> // OCB timer interfaces #include <occ_service_codes.h> // Reason codes #include <timer_service_codes.h> // Module Id #include <cmdh_fsp.h> // for RCs in the checkpoint macros -//************************************************************************* +//*************************************************************************/ // Externs -//************************************************************************* +//*************************************************************************/ // Variable holding main thread loop count extern uint32_t G_mainThreadLoopCounter; -//************************************************************************* +//*************************************************************************/ // Macros -//************************************************************************* +//*************************************************************************/ // PPC405 watchdog timer handler SSX_IRQ_FAST2FULL(ppc405WDTHndler, ppc405WDTHndlerFull); // OCB timer handler SSX_IRQ_FAST2FULL(ocbTHndler, ocbTHndlerFull); -//************************************************************************* +//*************************************************************************/ // Defines/Enums -//************************************************************************* +//*************************************************************************/ // Change watchdog reset control to take no action on state TSR[WIS]=1 // and TSR[ENW]=1 // Watchdog reset control set to "No reset" @@ -61,22 +61,22 @@ SSX_IRQ_FAST2FULL(ocbTHndler, ocbTHndlerFull); // 4ms represented in nanoseconds #define OCB_TIMER_TIMOUT 4000000 -//************************************************************************* +//*************************************************************************/ // Structures -//************************************************************************* +//*************************************************************************/ -//************************************************************************* +//*************************************************************************/ // Globals -//************************************************************************* +//*************************************************************************/ bool G_wdog_enabled = FALSE; -//************************************************************************* +//*************************************************************************/ // Function Prototypes -//************************************************************************* +//*************************************************************************/ -//************************************************************************* +//*************************************************************************/ // Functions -//************************************************************************* +//*************************************************************************/ // Function Specification // @@ -215,7 +215,10 @@ void ppc405WDTHndlerFull(void * i_arg, SsxIrqId i_irq, int i_priority) } else { - OCC_HALT(ERRL_RC_WDOG_TIMER); + +// TEMP -- NOT SUPPORTED IN PHASE1 +// OCC_HALT(ERRL_RC_WDOG_TIMER); +TRAC_ERR("Should have halted here due to WDOG"); } } } @@ -231,5 +234,7 @@ void ppc405WDTHndlerFull(void * i_arg, SsxIrqId i_irq, int i_priority) void ocbTHndlerFull(void * i_arg, SsxIrqId i_irq, int i_priority) { // OCC_HALT with exception code passed in. - OCC_HALT(ERRL_RC_OCB_TIMER); +// TEMP -- NOT SUPPORTED IN PHASE1 +// OCC_HALT(ERRL_RC_OCB_TIMER); +TRAC_ERR("Should have halted here due to THndlerFull"); } diff --git a/src/occ_405/gpefiles.mk b/src/occ_405/topfiles.mk index 5e51458..5fa952c 100755..100644 --- a/src/occ_405/gpefiles.mk +++ b/src/occ_405/topfiles.mk @@ -1,11 +1,11 @@ # IBM_PROLOG_BEGIN_TAG # This is an automatically generated prolog. # -# $Source: src/occ_405/gpefiles.mk $ +# $Source: src/occ_405/topfiles.mk $ # # OpenPOWER OnChipController Project # -# Contributors Listed Below - COPYRIGHT 2011,2015 +# Contributors Listed Below - COPYRIGHT 2015 # [+] International Business Machines Corp. # # @@ -22,15 +22,25 @@ # permissions and limitations under the License. # # IBM_PROLOG_END_TAG +TOP-C-SOURCES = aplt/appletManager.c \ + cmdh/cmdh_fsp.c \ + cmdh/cmdh_fsp_cmds_datacnfg.c \ + errl/errl.c \ + homer.c \ + main.c \ + occ_sys_config.c \ + occbuildname.c \ + pss/apss.c \ + reset.c \ + rtls/rtls.c \ + rtls/rtls_tables.c \ + scom.c \ + state.c \ + thread/threadSch.c \ + timer/timer.c \ + trac/trac_interface.c \ -# Using .pS for gnu assembler. +TOP-S-SOURCES = -occ_GPEFILES = gpe/apss_init.pS \ - gpe/apss_composite.pS \ - gpe/apss_meas_read_start.pS \ - gpe/apss_meas_read_cont.pS \ - gpe/pore_nop.pS \ - gpe/apss_meas_read_complete.pS - -all_gpefiles = ${occ_GPEFILES:.pS=.o} +TOP_OBJECTS = $(TOP-C-SOURCES:.c=.o) $(TOP-S-SOURCES:.S=.o) diff --git a/src/occ_405/trac/trac.h b/src/occ_405/trac/trac.h index 87f669b..ea9961c 100755 --- a/src/occ_405/trac/trac.h +++ b/src/occ_405/trac/trac.h @@ -58,6 +58,7 @@ // TRAC_DBG must be used for debug purpose only. This traces will be // turned OFF with product code. #ifdef TRAC_TO_SIMICS + #define TRAC_ERR(frmt,args...) \ printf(ERR_MRK "%s: "frmt "\n",__FUNCTION__,##args) #define TRAC_INFO(frmt,args...) \ @@ -74,6 +75,7 @@ extern void dumpHexString(const void *i_data, const unsigned int len, const char #else //TRAC_TO_SIMICS +/* #define TRAC_ERR(frmt,args...) \ TRACE(g_trac_err,ERR_MRK frmt,##args) #define TRAC_INFO(frmt,args...) \ @@ -84,7 +86,12 @@ extern void dumpHexString(const void *i_data, const unsigned int len, const char TRACE(g_trac_inf,DBG_MRK fmt,##args) #define DEBUG_HEXDUMP(data, len, string) \ TRACEBIN(g_trac_inf, string, data,len) - +*/ +#define TRAC_ERR SSX_TRACE +#define TRAC_INFO SSX_TRACE +#define TRAC_IMP SSX_TRACE +#define DBG_PRINT SSX_TRACE +#define DEBUG_HEXDUMP SSX_TRACE_BIN #endif //TRAC_TO_SIMICS diff --git a/src/occ_405/trac/trac_interface.c b/src/occ_405/trac/trac_interface.c index 56a7cfb..c524d79 100755 --- a/src/occ_405/trac/trac_interface.c +++ b/src/occ_405/trac/trac_interface.c @@ -466,7 +466,8 @@ UINT trac_write_int(tracDesc_t io_td,const trace_hash_val i_hash, l_entry_size = l_entry_size + ((1 - i_num_args)*4); // fill trace field - l_entry.head.hash = trace_adal_hash("IMP: ISR Circular Buffer is full, %d entries lost", -1); +// TEMP -- I don't think we use this... +// l_entry.head.hash = trace_adal_hash("IMP: ISR Circular Buffer is full, %d entries lost", -1); l_entry.head.line = __LINE__; // one argument for this trace diff --git a/src/occ_405/trac/trac_interface.h b/src/occ_405/trac/trac_interface.h index d448a0e..f573899 100755 --- a/src/occ_405/trac/trac_interface.h +++ b/src/occ_405/trac/trac_interface.h @@ -41,11 +41,15 @@ //************************************************************************* /* Used to trace 0 - 5 arguments or a binary buffer when using a hash value. */ + #define TRACE(i_td,i_string,args...) \ - trace_adal_write_all(i_td,trace_adal_hash(i_string,-1),__LINE__,0,##args) + SSX_TRACE(i_string, args...) +// trace_adal_write_all(i_td,trace_adal_hash(i_string,-1),__LINE__,0,##args) #define TRACEBIN(i_td,i_string,i_ptr,i_size) \ - trac_write_bin(i_td,trace_adal_hash(i_string,0),__LINE__,i_ptr,i_size) + SSX_TRACE_BIN(i_string, i_ptr, i_size) +// trac_write_bin(i_td,trace_adal_hash(i_string,0),__LINE__,i_ptr,i_size) + #ifndef NO_TRAC_STRINGS diff --git a/src/occ_gpe0/img_defs.mk b/src/occ_gpe0/img_defs.mk index 21c0de7..8233a22 100644 --- a/src/occ_gpe0/img_defs.mk +++ b/src/occ_gpe0/img_defs.mk @@ -81,7 +81,7 @@ export GLOBAL_INCLUDES = -I$(IMAGE_SRCDIR)/.. endif ifndef BASE_OBJDIR -export BASE_OBJDIR = $(abspath ../../../obj) +export BASE_OBJDIR = $(abspath ../../obj) endif export IMG_OBJDIR = $(BASE_OBJDIR)/$(IMAGE_NAME) |