OCC Centaur disable deadman timer and clean up code

Change-Id: I7d79dd2112de2e28f9b748add6626b231ff236bb
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56660
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>

6 files changed, 35 insertions, 254 deletions

diff --git a/src/common/centaur_configuration.h b/src/common/centaur_configuration.h
index 43f2792..12b8072 100644
--- a/src/common/centaur_configuration.h
+++ b/src/common/centaur_configuration.h
@@ -60,7 +60,7 @@ typedef struct
     /// \note One and Only one of the MCS units can be targeted with SYNC
     /// commands. The design includes a private bus connecting all MCS on the
     /// chip that allows this "SYNC master" to broadcast the SYNC to all other
-    /// MCS on the chip.
+    /// MCS on the chip.  Currently not used in P9
     pba_slvctln_t syncSlaveControl;
 
     /// A GpePbaParms parameter block for gpe_mem_data()
@@ -177,29 +177,6 @@ typedef enum
     /// Centaur. Currently unsupported for gpe_scom_p8().
     CENTAUR_SCOM_RMW_ALL,
 
-    /// Issue a generic Centaur SYNC
-    ///
-    /// This command is only valid for IPC_ST_CENTAUR_SCOM(). This command creates
-    /// and issues a generic SYNC command to Centaur.  The caller is completely
-    /// responsible for creating the contents of the data packet sent as part of
-    /// the Centaur SYNC. The data packet is taken verbatim from the \a data field
-    /// of the scomList_t, and sent to the MCS designated as the SYNC MCS in the
-    /// global G_centaurConfiguration.  For further details see the comments with
-    /// the procedure IPC_ST_CENTAUR_SCOM() and the CentaurConfiguration structure.
-    CENTAUR_SCOM_CENTAUR_SYNC,
-
-    /// Issue a Centaur SYNC to all configured Centaur
-    ///
-    /// This command is only valid for IPC_ST_CENTAUR_SCOM(). This command creates
-    /// and issues a SYNC command to all configured Centaur. The data packet is
-    /// taken from the \a data field of the scomList_t, and sent to the MCS
-    /// designated as the SYNC MCS in the global G_centaurConfiguration. The
-    /// caller is responsible for setting the SYNC command bits (bits 8:N); The
-    /// procedure will fill bits 0:7 with a mask of all configured Centaur.  For
-    /// further details see the comments with the procedure IPC_ST_CENTAUR_SCOM() and
-    /// the CentaurConfiguration structure.
-    CENTAUR_SCOM_CENTAUR_SYNC_ALL,
-
 }  centaur_scom_operation_t;
 
 
@@ -219,27 +196,4 @@ typedef enum
 
 #endif
 
-/// \defgroup centaur_sync_commands Centaur SYNC Command Bits
-///
-/// The Centaur SYNC command is an 8-byte word written to a specific in-band
-/// address. SYNC commands are generated by the gpe_scom_centaur() procedure
-/// in response to the GPE_SCOM_CENTAUR_SYNC and GPE_SCOM_CENTAUR_SYNC_ALL
-/// commands (which see).
-///
-/// \note From the MCS Unit Workbook: Note that only the N/M Throttle sync
-/// command will be used operationally in P-series, although if will be
-/// possible to test all the sync commands in P-series lab testing. Z-series
-/// will use all specified sync command types. ... Valid combinations of bits
-/// (8:15) are: b00000000, bVVVVVV0V, and b00000010, where V = 0 or 1.
-///
-/// @{
-
-#define CENTAUR_GENERATE_REFRESH_COUNTER_SYNC    0x0080000000000000ull
-#define CENTAUR_RESET_CALIBRATION_COUNTER_1_SYNC 0x0040000000000000ull
-#define CENTAUR_RESET_CALIBRATION_COUNTER_2_SYNC 0x0020000000000000ull
-#define CENTAUR_RESET_CALIBRATION_COUNTER_3_SYNC 0x0010000000000000ull
-#define CENTAUR_RESET_N_M_THROTTLE_COUNTER_SYNC  0x0008000000000000ull
-#define CENTAUR_RESET_MB_TIMEBASE_SYNC           0x0004000000000000ull
-#define CENTAUR_SUPER_SYNC                       0x0002000000000000ull
-#define CENTAUR_MYSTERY_SYNC                     0x0001000000000000ull
 
diff --git a/src/occ_405/cent/centaur_control.c b/src/occ_405/cent/centaur_control.c
index 534aa9e..e5f37ef 100755
--- a/src/occ_405/cent/centaur_control.c
+++ b/src/occ_405/cent/centaur_control.c
@@ -62,8 +62,7 @@ typedef enum
 {
   NM_THROTTLE_MBA01       = 0,
   NM_THROTTLE_MBA23       = 1,
-  MBS_THROTTLE_SYNC       = 2,
-  NUM_CENT_THROTTLE_SCOMS = 3,
+  NUM_CENT_THROTTLE_SCOMS = 2,
 } eCentaurThrottleRegs;
 
 
@@ -287,7 +286,6 @@ bool centaur_control( memory_control_task_t * i_memControlTask )
         /// Set up Centuar Scom Registers - array of Scoms
         ///   [0]:  N/M Throttle MBA01
         ///   [1]:  N/M Throttle MBA23
-        ///   [2]:  MB SYNC
 
         //only write to MBA01 if configured
         if(MBA_CONFIGURED(l_cent, 0))
@@ -321,20 +319,9 @@ bool centaur_control( memory_control_task_t * i_memControlTask )
             G_centaurThrottle[NM_THROTTLE_MBA23].commandType = CENTAUR_SCOM_NOP;
         }
 
-
-        /// [2]: Set up the SYNC
-        ///
-        ///    0:7  select mask of MCS units
-        ///    8:15 select the sync type (12 = N/M throttle)
-        ///   57:63 must be zeros to address DW0 in cacheline
-        //G_centaurThrottle[MBS_THROTTLE_SYNC].commandType = CENTAUR_SCOM_NOP;
-        G_centaurThrottle[MBS_THROTTLE_SYNC].commandType = CENTAUR_SCOM_CENTAUR_SYNC_ALL;
-        G_centaurThrottle[MBS_THROTTLE_SYNC].data = CENTAUR_RESET_N_M_THROTTLE_COUNTER_SYNC |
-                                                    CENTAUR_MYSTERY_SYNC; //This is the "PC" sync bit
-
         /// Set up GPE parameters
         l_parms->scomList     = G_centaurThrottle;
-        l_parms->entries      = 2;
+        l_parms->entries      = NUM_CENT_THROTTLE_SCOMS;
         l_parms->error.ffdc   = 0;
 
         // Update the last sent throttle value, this will get
@@ -415,7 +402,7 @@ void centaur_control_init( void )
 
     if( l_rc_gpe )
     {
-        //If fail to create pore flex object then there is a problem.
+        //If fail to create gpe request  then there is a problem.
         TRAC_ERR("centaur_control_init: Failed to initialize centaur control task [l_rc_gpe=0x%x]", l_rc_gpe);
 
         /* @
@@ -424,13 +411,13 @@ void centaur_control_init( void )
          * @reasoncode  SSX_GENERIC_FAILURE
          * @userdata1   l_rc_gpe  - Return code of failing function
          * @userdata2   0
-         * @userdata4   ERC_CENTAUR_PORE_FLEX_CREATE_FAILURE
+         * @userdata4   ERC_CENTAUR_GPE_REQUEST_CREATE_FAILURE
          * @devdesc     Failed to initialize GPE routine
          */
         l_err = createErrl(
                 CENTAUR_INIT_MOD,                           //modId
                 SSX_GENERIC_FAILURE,                        //reasoncode
-                ERC_CENTAUR_PORE_FLEX_CREATE_FAILURE,       //Extended reason code
+                ERC_CENTAUR_GPE_REQUEST_CREATE_FAILURE,     //Extended reason code
                 ERRL_SEV_PREDICTIVE,                        //Severity
                 NULL,                                       //Trace Buf
                 DEFAULT_TRACE_SIZE,                         //Trace Size
diff --git a/src/occ_405/cent/centaur_data.c b/src/occ_405/cent/centaur_data.c
index 4228c03..9ee60b0 100755
--- a/src/occ_405/cent/centaur_data.c
+++ b/src/occ_405/cent/centaur_data.c
@@ -838,13 +838,13 @@ void centaur_data( void )
                  * @reasoncode  SSX_GENERIC_FAILURE
                  * @userdata1   rc - Return code of failing function
                  * @userdata2   0
-                 * @userdata4   ERC_CENTAUR_PORE_FLEX_SCHEDULE_FAILURE
+                 * @userdata4   ERC_CENTAUR_GPE_REQUEST_SCHEDULE_FAILURE
                  * @devdesc     Failed to get centaur data
                  */
                 l_err = createErrl(
                         CENT_TASK_DATA_MOD,                     //modId
                         SSX_GENERIC_FAILURE,                    //reasoncode
-                        ERC_CENTAUR_PORE_FLEX_SCHEDULE_FAILURE, //Extended reason code
+                        ERC_CENTAUR_GPE_REQUEST_SCHEDULE_FAILURE, //Extended reason code
                         ERRL_SEV_PREDICTIVE,                    //Severity
                         NULL,                                   //Trace Buf
                         DEFAULT_TRACE_SIZE,                     //Trace Size
@@ -1065,7 +1065,8 @@ void centaur_init( void )
         L_scomList[0].mask = l_mbscfg.value;
 
         //set up the data bits
-        l_mbscfg.fields.occ_deadman_timer_sel = CENT_DEADMAN_TIMER_2SEC;
+        // TODO RTC 190643 disable until phyp has centaur support
+        l_mbscfg.fields.occ_deadman_timer_sel = 0; // CENT_DEADMAN_TIMER_2SEC;
         L_scomList[0].data = l_mbscfg.value;
 
         /// Set up Centaur Scom Registers - array of Scoms
diff --git a/src/occ_405/occ_service_codes.h b/src/occ_405/occ_service_codes.h
index f2d3417..202b1b8 100644
--- a/src/occ_405/occ_service_codes.h
+++ b/src/occ_405/occ_service_codes.h
@@ -180,8 +180,8 @@ enum occExtReasonCode
 
     ERC_PROC_CONTROL_TASK_FAILURE               = 0x001a,
 
-    ERC_CENTAUR_PORE_FLEX_CREATE_FAILURE        = 0x0021,
-    ERC_CENTAUR_PORE_FLEX_SCHEDULE_FAILURE      = 0x0022,
+    ERC_CENTAUR_GPE_REQUEST_CREATE_FAILURE      = 0x0021,
+    ERC_CENTAUR_GPE_REQUEST_SCHEDULE_FAILURE    = 0x0022,
     ERC_CENTAUR_INTERNAL_FAILURE                = 0x0023,
 
     ERC_APSS_GPIO_OUT_OF_RANGE_FAILURE          = 0x0024,
diff --git a/src/occ_gpe1/gpe_centaur_configuration.c b/src/occ_gpe1/gpe_centaur_configuration.c
index 83ac500..cfd4a76 100644
--- a/src/occ_gpe1/gpe_centaur_configuration.c
+++ b/src/occ_gpe1/gpe_centaur_configuration.c
@@ -165,13 +165,8 @@ int gpe_centaur_configuration_create(CentaurConfiguration_t* o_config)
     int rc = 0;
     unsigned int i  = 0;
     mcfgpr_t   mcfgpr;
-    // mcifir_t   mcifir;
-    // mcsmode0_t mcsmode0;
-    pba_slvctln_t slvctl;
-    int         designatedSync = -1;
     uint64_t    bar = 0;
     uint64_t    mask = 0;
-    uint64_t    base = 0;
     uint64_t*   ptr = (uint64_t*)o_config;
 
     // Prevent unwanted interrupts from scom errors
@@ -187,9 +182,10 @@ int gpe_centaur_configuration_create(CentaurConfiguration_t* o_config)
 
     do
     {
-        // Create the setups for the GPE procedures. The 'dataParms' are the
-        // setup for accessing the Centaur sensor cache.  The 'scomParms' are
-        // the setup for accessing Centaur SCOMs.
+        // Create the PBASLV configurations for the GPE procedures.
+        // The 'dataParms' define the PBASLV setup needed to access the
+        // Centaur sensor cache.  The 'scomParms' define the PBASLV setup
+        // needed to access the Centaur SCOMs.
 
         rc = gpe_pba_parms_create(&(o_config->dataParms),
                                   PBA_SLAVE_CENTAUR,
@@ -215,49 +211,33 @@ int gpe_centaur_configuration_create(CentaurConfiguration_t* o_config)
             break;
         }
 
-        // Go into each MCS on the chip, and for all enabled MCS get a couple
-        // of SCOMs and check configuration items for correctness. If any of
-        // the Centaur are configured, exactly one of the MCS must be
-        // designated to receive the SYNC commands.
+        // Iterate through each MCS on the chip and check configuration.
 
         // Note that the code uniformly treats SCOM failures of the MCFGPR
-        // registers as an unconfigured Centaur. This works both for Murano,
-        // which only defines the final 4 MCS, as well as for our VBU models
-        // where some of the "valid" MCS are not in the simulation models.
+        // registers as an unconfigured Centaur. This works both for real 
+        // hardware,  as well as for our VBU models where some of the "valid"
+        // MCS are not in the simulation models.
 
         for (i = 0; i < OCCHW_NCENTAUR; ++i)
         {
             uint64_t val64;
 
-            // If can't scom then assume not configured
-            //rc = getscom_abs(MCFIR[i / 2], &(mcifir.value));
-
-            //if (rc)
-            //{
-            //    rc = 0;
-            //    continue;
-            //}
-
-            // See Cumulus MC "Datapath Fault Isolation Register"  Is it right???
-            //FIR bits have changed from p8 TODO do we need to look at the fir
-            //for P9 ??
-            //if (mcifir.fields.channel_fail_signal_active)
-            //{
-            //    continue;
-            //}
-
-            // Routine p9c_set_inband_addr.C uses MCRSVDE and MCRSVDF to set
-            //   inband address (MCFGPR)
-            //
+            //FIR bits have changed from p8 TODO Marc Golub to provide what
+            //firchecks need to be done for P9 
+
+            // Verify that inband scom has been setup. If not then
+            // assume the centaur is either non-existant or not configured.
+            // Setup is provided by HWP p9c_set_inband_addr.C
             rc = getscom_abs(MCFGPR[i], &(mcfgpr.value));
 
             if (rc)
             {
+                // ignore if can't be scomed.
                 rc = 0;
                 continue;
             }
 
-            // TODO ENGD work-around until gets pushed up.
+            // TODO RTC 190643 ENGD work-around until change gets pushed up into a driver.
             // Turn on bit 25 in mode0 regs. They should all have the same value
             rc = getscom_abs(0x05010811, &val64);
             val64 |= 0x0000004000000000ull;
@@ -273,7 +253,7 @@ int gpe_centaur_configuration_create(CentaurConfiguration_t* o_config)
             }
 
 
-            // The 31-bit base-address is moved to begin at bit 8 in the
+            // The 31-bit base-address (inband scom BAR) corresponds to bits [8:38] in the
             // 64-bit PowerBus address.
             // Set the HOST/OCC bit in the address.
             o_config->baseAddress[i] =
@@ -282,26 +262,9 @@ int gpe_centaur_configuration_create(CentaurConfiguration_t* o_config)
             PK_TRACE_DBG("Centar[%d] Base Address: %016llx",i,o_config->baseAddress[i]);
 
 
-            // TODO this bit no longer exists
-            // If this MCS is configured to be the designated SYNC unit, it
-            // must be the only one.
-
-            //if (mcsmode0.fields.enable_centaur_sync)
-            //{
-            //    if (designatedSync > 0)
-            //    {
-            //        PK_TRACE_DBG("Both MCS %d and %d are designated "
-            //                     "for Centaur Sync",
-            //                     designatedSync, i);
-            //        rc = CENTAUR_MULTIPLE_DESIGNATED_SYNC;
-            //        break;
-
-            //    }
-            //    else
-            //    {
-            //        designatedSync = i;
-            //    }
-            //}
+            // NOTE: P9 no longer has a mode bit to specify a "designated SYNC"
+            // Centaur Spec says SYNC is needed for Z series, and for POR.
+            // Since neither applys here, it will not longer be done by OCC.
 
 
             // Add the Centaur to the configuration
@@ -314,85 +277,6 @@ int gpe_centaur_configuration_create(CentaurConfiguration_t* o_config)
         }
 
 
-        // In p9 the enable_centaur_sync is no longer available as a mode bit.
-        // TODO  Anything to do?
-        // P8:
-        // If Centaur are configured, make sure at least one of the MCS will
-        // handle the SYNC. If so, convert its base address into an address
-        // for issuing SYNC commands by setting bits 27 (OCC) 28 and 29
-        // (Sync), then insert this address into the extended address field of
-        // a PBA slave control register image. gsc_scom_centaur() then merges
-        // this extended address into the PBA slave control register (which
-        // has been set up for Centaur SCOM) to do the SYNC.
-
-        // In the override mode (i_setup > 1) we tag the first valid MCS
-        // to recieve the sync if the firmware has not set it up correctly.
-
-        if (o_config->config)
-        {
-#if defined(__P8_DESIGNATED_SYNC__)
-
-            if (designatedSync < 0)
-            {
-                if (i_setup <= 1)
-                {
-                    PK_TRACE_DBG("No MCS is designated for Centaur SYNC");
-                    rc = CENTAUR_NO_DESIGNATED_SYNC;
-                    break;
-
-                }
-                else
-                {
-
-                    designatedSync =
-                        cntlz32(o_config->config << CHIP_CONFIG_MCS_BASE);
-
-                    rc = _getscom(designatedSync, MCSMODE0, &(mcsmode0.value));
-
-                    if (rc)
-                    {
-                        PK_TRACE_DBG("Unexpected rc = 0x%08x "
-                                     "SCOMing MCSMODE0(%d)",
-                                     (uint32_t)rc,
-                                     designatedSync);
-
-                        rc = CENTAUR_MCSMODE0_SCOM_FAILURE;
-                        break;
-                    }
-
-                    mcsmode0.fields.enable_centaur_sync = 1;
-
-                    rc = _putscom(designatedSync, MCSMODE0, mcsmode0.value);
-
-                    if (rc)
-                    {
-                        PK_TRACE_DBG("Unexpected rc = 0x%08x "
-                                     "SCOMing MCSMODE0(%d)",
-                                     (uint32_t)rc,
-                                     designatedSync);
-
-                        rc = CENTAUR_MCSMODE0_SCOM_FAILURE;
-                        break;
-                    }
-                }
-            }
-
-#else
-            // first centaur found
-            designatedSync = cntlz32(o_config->config << CHIP_CONFIG_MCS_BASE);
-#endif
-            // Set the OCC/HOST bit in the PBA
-            base = o_config->baseAddress[designatedSync] | PBA_HOST_OCC_CFG;
-
-            //Pick out the PBA address sub field that will be set by the slvctl extaddr
-            //bits [23:36]
-            slvctl.value = 0;
-            slvctl.fields.extaddr = base >> 27;
-
-            o_config->syncSlaveControl.value = slvctl.value;
-        }
-
-
         // Configure the PBA BAR and PBA BARMSK.
         // Set the BARMSK bits such that:
         // -PBA[8:22] are provided by the PBABAR.
diff --git a/src/occ_gpe1/gpe_centaur_scom.c b/src/occ_gpe1/gpe_centaur_scom.c
index cef0977..1817a19 100644
--- a/src/occ_gpe1/gpe_centaur_scom.c
+++ b/src/occ_gpe1/gpe_centaur_scom.c
@@ -327,10 +327,6 @@ int centaur_scom_rmw(CentaurConfiguration_t* i_config,
         data64 |= *i_data;
 
         rc = putscom_abs(oci_addr, data64);
-        if(i_scom_address == 0x3010416)
-        {
-            PK_TRACE("N/M RMW PUTSCOM: %08x%08x",(uint32_t)(data64>>32),(uint32_t)data64);
-        }
     }
 
     pbaslvctl_reset(&(i_config->scomParms));
@@ -377,38 +373,6 @@ int centaur_scom_rmw_all(CentaurConfiguration_t* i_config,
 }
 
 
-int centaur_scom_sync(CentaurConfiguration_t* i_config,
-                      uint64_t i_data)
-{
-    int rc = 0;
-    uint32_t addr = (PBA_BAR_CENTAUR << 28);
-    uint64_t pba_slvctln_save;
-
-    pbaslvctl_reset(&(i_config->scomParms));
-    pba_slvctln_save = pbaslvctl_setup(&(i_config->scomParms));
-
-    // sync setup
-    pba_slvctln_t slvctl;
-    PPE_LVD((i_config->scomParms).slvctl_address, slvctl.value);
-    slvctl.fields.extaddr = (i_config->syncSlaveControl).fields.extaddr;
-    PPE_STVD((i_config->scomParms).slvctl_address, slvctl.value);
-
-    PPE_STVD(addr, i_data);
-
-    pbaslvctl_reset(&(i_config->scomParms));
-    PPE_STVD((i_config->scomParms).slvctl_address, pba_slvctln_save);
-
-    return rc;
-}
-
-
-int centaur_scom_sync_all(CentaurConfiguration_t* i_config,
-                          uint64_t i_data)
-{
-    return centaur_scom_sync(i_config,
-                             (uint64_t)(i_config->config << 24) | i_data);
-}
-
 // read centaur data sensor cache
 int centaur_get_mem_data(CentaurConfiguration_t* i_config,
                          CentaurGetMemDataParms_t* i_parms)
@@ -481,9 +445,10 @@ int centaur_get_mem_data(CentaurConfiguration_t* i_config,
 
     // TODO if RC then check for centaur channel checkstop
     // The MCFIR reg no longer contains a bit for CHANNEL_FAIL_SIGNAL_ACTIVE.
-    // No equivalent has been identified yet for P9.
+    // No equivalent has been identified yet for P9. Marc Gollub will provide
+    // if needed.
     // Return rc = CENTAUR_CHANNEL_CHECKSTOP
-    
+
     // HW bug work-around
     rc = putscom_abs(PBA_BARMSKN(PBA_BAR_CENTAUR), barMskOrg);
     if(rc)
@@ -554,16 +519,6 @@ void gpe_scom_centaur(CentaurConfiguration_t* i_config,
                                      i_parms->scomList[i].data);
                 break;
 
-            case CENTAUR_SCOM_CENTAUR_SYNC:
-                centaur_scom_sync(i_config,
-                                  i_parms->scomList[i].data);
-                break;
-
-            case CENTAUR_SCOM_CENTAUR_SYNC_ALL:
-                centaur_scom_sync(i_config,
-                                  i_parms->scomList[i].data);
-                break;
-
             default:
                 break;
         };