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authorGuillermo J Silva <guilsilv@us.ibm.com>2015-03-12 10:44:30 -0500
committerStephan Broyles <sbroyles@us.ibm.com>2015-03-13 12:01:35 -0500
commitf157786b99c6d9cde22b7d362f482acb911f3d56 (patch)
tree9e4dcaecdbcc1c5300a7b42d608c06c935b6d518
parentcc8376d863afd715ea13346d5841610a9fad1bd2 (diff)
downloadtalos-occ-f157786b99c6d9cde22b7d362f482acb911f3d56.tar.gz
talos-occ-f157786b99c6d9cde22b7d362f482acb911f3d56.zip
Fixes for extra DIMM callout during channel checkstop
Added a new function that checks if a given Centaur has a channel checkstop. This function can be used during error scenarios in data collection from Centaurs and DIMMs. Change-Id: I77c725064cad8bf27cedff550215bfcd48972511 CQ: SW279249 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/16319 Reviewed-by: Stephan Broyles <sbroyles@us.ibm.com> Tested-by: Stephan Broyles <sbroyles@us.ibm.com>
-rwxr-xr-xsrc/occ/cent/centaur_control.c95
-rwxr-xr-xsrc/occ/cent/centaur_data.c329
-rwxr-xr-xsrc/occ/cent/centaur_data.h9
-rw-r--r--src/ssx/pgp/pgp_centaur.c49
-rwxr-xr-xsrc/ssx/pgp/registers/mcs_firmware_registers.h51
-rwxr-xr-xsrc/ssx/pgp/registers/mcs_register_addresses.h34
6 files changed, 384 insertions, 183 deletions
diff --git a/src/occ/cent/centaur_control.c b/src/occ/cent/centaur_control.c
index 901217c..825de18 100755
--- a/src/occ/cent/centaur_control.c
+++ b/src/occ/cent/centaur_control.c
@@ -5,10 +5,10 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* COPYRIGHT International Business Machines Corp. 2011,2014 */
-/* [+] Google Inc. */
+/* Contributors Listed Below - COPYRIGHT 2014,2015 */
/* [+] International Business Machines Corp. */
/* */
+/* */
/* Licensed under the Apache License, Version 2.0 (the "License"); */
/* you may not use this file except in compliance with the License. */
/* You may obtain a copy of the License at */
@@ -302,51 +302,56 @@ void task_centaur_control( task_t * i_task )
{
if(!async_request_completed(&l_centControlTask->gpe_req.request) || l_parms->rc)
{
-
if(!(L_gpe_fail_logged & (CENTAUR0_PRESENT_MASK >> l_cent)))
{
- L_gpe_fail_logged |= CENTAUR0_PRESENT_MASK >> l_cent;
- TRAC_ERR("task_centaur_control: gpe_scom_centaur failed. l_cent=%d rc=%x, index=0x%08x", l_cent, l_parms->rc, l_parms->errorIndex);
-
- /* @
- * @errortype
- * @moduleid CENT_TASK_CONTROL_MOD
- * @reasoncode CENT_SCOM_ERROR
- * @userdata1 rc - Return code of scom operation
- * @userdata2 index of scom operation that failed
- * @userdata4 OCC_NO_EXTENDED_RC
- * @devdesc OCC access to centaur failed
- */
- l_err = createErrl(
- CENT_TASK_CONTROL_MOD, // modId
- CENT_SCOM_ERROR, // reasoncode
- OCC_NO_EXTENDED_RC, // Extended reason code
- ERRL_SEV_PREDICTIVE, // Severity
- NULL, // Trace Buf
- DEFAULT_TRACE_SIZE, // Trace Size
- l_parms->rc, // userdata1
- l_parms->errorIndex // userdata2
- );
-
- addUsrDtlsToErrl(l_err, //io_err
- (uint8_t *) &(l_centControlTask->gpe_req.ffdc), //i_dataPtr,
- sizeof(PoreFfdc), //i_size
- ERRL_USR_DTL_STRUCT_VERSION_1, //version
- ERRL_USR_DTL_BINARY_DATA); //type
-
- //callout the centaur
- addCalloutToErrl(l_err,
- ERRL_CALLOUT_TYPE_HUID,
- G_sysConfigData.centaur_huids[l_cent],
- ERRL_CALLOUT_PRIORITY_MED);
-
- //callout the processor
- addCalloutToErrl(l_err,
- ERRL_CALLOUT_TYPE_HUID,
- G_sysConfigData.proc_huid,
- ERRL_CALLOUT_PRIORITY_MED);
-
- commitErrl(&l_err);
+ // Check if the centaur has a channel checkstop. If it does,
+ // then do not log any errors. We also don't want to throttle
+ // a centaur that is in this condition.
+ if(!(cent_chan_checkstop(l_cent)))
+ {
+ L_gpe_fail_logged |= CENTAUR0_PRESENT_MASK >> l_cent;
+ TRAC_ERR("task_centaur_control: gpe_scom_centaur failed. l_cent=%d rc=%x, index=0x%08x", l_cent, l_parms->rc, l_parms->errorIndex);
+
+ /* @
+ * @errortype
+ * @moduleid CENT_TASK_CONTROL_MOD
+ * @reasoncode CENT_SCOM_ERROR
+ * @userdata1 rc - Return code of scom operation
+ * @userdata2 index of scom operation that failed
+ * @userdata4 OCC_NO_EXTENDED_RC
+ * @devdesc OCC access to centaur failed
+ */
+ l_err = createErrl(
+ CENT_TASK_CONTROL_MOD, // modId
+ CENT_SCOM_ERROR, // reasoncode
+ OCC_NO_EXTENDED_RC, // Extended reason code
+ ERRL_SEV_PREDICTIVE, // Severity
+ NULL, // Trace Buf
+ DEFAULT_TRACE_SIZE, // Trace Size
+ l_parms->rc, // userdata1
+ l_parms->errorIndex // userdata2
+ );
+
+ addUsrDtlsToErrl(l_err, //io_err
+ (uint8_t *) &(l_centControlTask->gpe_req.ffdc), //i_dataPtr,
+ sizeof(PoreFfdc), //i_size
+ ERRL_USR_DTL_STRUCT_VERSION_1, //version
+ ERRL_USR_DTL_BINARY_DATA); //type
+
+ //callout the centaur
+ addCalloutToErrl(l_err,
+ ERRL_CALLOUT_TYPE_HUID,
+ G_sysConfigData.centaur_huids[l_cent],
+ ERRL_CALLOUT_PRIORITY_MED);
+
+ //callout the processor
+ addCalloutToErrl(l_err,
+ ERRL_CALLOUT_TYPE_HUID,
+ G_sysConfigData.proc_huid,
+ ERRL_CALLOUT_PRIORITY_MED);
+
+ commitErrl(&l_err);
+ }
}//if(l_gpe_fail_logged & (CENTAUR0_PRESENT_MASK >> l_cent))
//Request failed. Keep count of failures and request a reset if we reach a
diff --git a/src/occ/cent/centaur_data.c b/src/occ/cent/centaur_data.c
index e6bede7..9be48e1 100755
--- a/src/occ/cent/centaur_data.c
+++ b/src/occ/cent/centaur_data.c
@@ -5,10 +5,10 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* COPYRIGHT International Business Machines Corp. 2011,2014 */
-/* [+] Google Inc. */
+/* Contributors Listed Below - COPYRIGHT 2014,2015 */
/* [+] International Business Machines Corp. */
/* */
+/* */
/* Licensed under the Apache License, Version 2.0 (the "License"); */
/* you may not use this file except in compliance with the License. */
/* You may obtain a copy of the License at */
@@ -173,6 +173,60 @@ uint8_t G_centaur_nest_lfir6 = 0;
//number of SC polls to wait between i2c recovery attempts
#define CENT_SC_MAX_INTERVAL 256
+//determine scom address of MCIFIR register for given Centaur n
+#define MCS0_MCIFIR_N(n) \
+ ( (n<4)? (MCS0_MCIFIR + ((MCS1_MCIFIR - MCS0_MCIFIR) * (n))) : (MCS4_MCIFIR + ((MCS5_MCIFIR - MCS4_MCIFIR) * (n-4))) )
+
+//mask for channel checkstop
+#define MCIFIR_CHAN_CKSTOP_MASK 0x0000000100000000
+
+bool cent_chan_checkstop(const uint8_t i_cent)
+{
+ uint32_t l_scom_addr = 0;
+ bool l_rc = FALSE;
+ uint64_t l_data;
+ int l_scom_rc = 0;
+
+ // Determine scom address of MCIFIR register
+ l_scom_addr = MCS0_MCIFIR_N(i_cent);
+
+ // Do a getscom on MCIFIR register for i_cent
+ l_scom_rc = getscom_ffdc(l_scom_addr, &l_data, 0);
+ if(!l_scom_rc)
+ {
+ //check for channel checkstop (bit 31)
+ if(l_data & MCIFIR_CHAN_CKSTOP_MASK)
+ {
+ l_rc = TRUE;
+
+ if(CENTAUR_PRESENT(i_cent))
+ {
+ //remove checkstopped centaur from presence bitmap
+ G_present_centaurs &= ~(CENTAUR_BY_MASK(i_cent));
+
+ //remove the dimm temperature sensors behind this centaur from presence bitmap
+ G_cent_enabled_sensors.bytes[i_cent] = 0x00;
+
+ TRAC_IMP("Channel checkstop detected on Centaur[%d] scom_addr[0x%08X] G_present_centaurs[0x%08X]",
+ i_cent,
+ l_scom_addr,
+ G_present_centaurs);
+
+ TRAC_IMP("Updated bitmap of enabled dimm temperature sensors: 0x%08X %08X",
+ G_cent_enabled_sensors.words[0],
+ G_cent_enabled_sensors.words[1]);
+ }
+ }
+ }
+ else
+ {
+ TRAC_ERR("cent_chan_checkstop: Error accessing MCIFIR register for Centaur[%d] scom_addr[0x%08X]",
+ i_cent,
+ l_scom_addr);
+ }
+ return l_rc;
+}
+
void cent_recovery(uint32_t i_cent)
{
int l_rc = 0;
@@ -231,55 +285,60 @@ void cent_recovery(uint32_t i_cent)
(!async_request_completed(&G_cent_scom_req.request) || G_cent_scom_gpe_parms.rc) &&
(!(L_cent_callouts & l_cent_mask)))
{
- //Mark the centaur as being called out
- L_cent_callouts |= l_cent_mask;
+ // Check if the centaur has a channel checkstop. If it does, then do not
+ // log any errors
+ if(!(cent_chan_checkstop(l_prev_cent)))
+ {
+ //Mark the centaur as being called out
+ L_cent_callouts |= l_cent_mask;
- // There was an error doing the recovery scoms
- TRAC_ERR("cent_recovery: gpe_scom_centaur failed. rc[0x%08x] cent[%d] entries[%d] errorIndex[0x%08X]",
- G_cent_scom_gpe_parms.rc,
- l_prev_cent,
- G_cent_scom_gpe_parms.entries,
- G_cent_scom_gpe_parms.errorIndex);
+ // There was an error doing the recovery scoms
+ TRAC_ERR("cent_recovery: gpe_scom_centaur failed. rc[0x%08x] cent[%d] entries[%d] errorIndex[0x%08X]",
+ G_cent_scom_gpe_parms.rc,
+ l_prev_cent,
+ G_cent_scom_gpe_parms.entries,
+ G_cent_scom_gpe_parms.errorIndex);
- /* @
- * @errortype
- * @moduleid CENT_RECOVERY_MOD
- * @reasoncode CENT_SCOM_ERROR
- * @userdata1 rc - Return code of failing scom
- * @userdata2 index of failing scom
- * @userdata4 0
- * @devdesc OCC to Centaur communication failure
- */
- l_err = createErrl(
- CENT_RECOVERY_MOD, //modId
- CENT_SCOM_ERROR, //reasoncode
- OCC_NO_EXTENDED_RC, //Extended reason code
- ERRL_SEV_PREDICTIVE, //Severity
- NULL, //Trace Buf
- DEFAULT_TRACE_SIZE, //Trace Size
- G_cent_scom_gpe_parms.rc, //userdata1
- G_cent_scom_gpe_parms.errorIndex //userdata2
- );
-
- //dump ffdc contents collected by ssx
- addUsrDtlsToErrl(l_err, //io_err
- (uint8_t *) &(G_cent_scom_req.ffdc), //i_dataPtr,
- sizeof(PoreFfdc), //i_size
- ERRL_USR_DTL_STRUCT_VERSION_1, //version
- ERRL_USR_DTL_BINARY_DATA); //type
-
- //callout the centaur
- addCalloutToErrl(l_err,
- ERRL_CALLOUT_TYPE_HUID,
- G_sysConfigData.centaur_huids[l_prev_cent],
- ERRL_CALLOUT_PRIORITY_MED);
-
- //callout the processor
- addCalloutToErrl(l_err,
- ERRL_CALLOUT_TYPE_HUID,
- G_sysConfigData.proc_huid,
- ERRL_CALLOUT_PRIORITY_MED);
- commitErrl(&l_err);
+ /* @
+ * @errortype
+ * @moduleid CENT_RECOVERY_MOD
+ * @reasoncode CENT_SCOM_ERROR
+ * @userdata1 rc - Return code of failing scom
+ * @userdata2 index of failing scom
+ * @userdata4 0
+ * @devdesc OCC to Centaur communication failure
+ */
+ l_err = createErrl(
+ CENT_RECOVERY_MOD, //modId
+ CENT_SCOM_ERROR, //reasoncode
+ OCC_NO_EXTENDED_RC, //Extended reason code
+ ERRL_SEV_PREDICTIVE, //Severity
+ NULL, //Trace Buf
+ DEFAULT_TRACE_SIZE, //Trace Size
+ G_cent_scom_gpe_parms.rc, //userdata1
+ G_cent_scom_gpe_parms.errorIndex //userdata2
+ );
+
+ //dump ffdc contents collected by ssx
+ addUsrDtlsToErrl(l_err, //io_err
+ (uint8_t *) &(G_cent_scom_req.ffdc), //i_dataPtr,
+ sizeof(PoreFfdc), //i_size
+ ERRL_USR_DTL_STRUCT_VERSION_1, //version
+ ERRL_USR_DTL_BINARY_DATA); //type
+
+ //callout the centaur
+ addCalloutToErrl(l_err,
+ ERRL_CALLOUT_TYPE_HUID,
+ G_sysConfigData.centaur_huids[l_prev_cent],
+ ERRL_CALLOUT_PRIORITY_MED);
+
+ //callout the processor
+ addCalloutToErrl(l_err,
+ ERRL_CALLOUT_TYPE_HUID,
+ G_sysConfigData.proc_huid,
+ ERRL_CALLOUT_PRIORITY_MED);
+ commitErrl(&l_err);
+ }
}
#if 0 //set this to 1 for testing hard failures
@@ -381,7 +440,7 @@ void cent_recovery(uint32_t i_cent)
// Capture the scac_lfir as ffdc but only once
if(L_i2c_recovery_delay[l_prev_cent] == CENT_SC_MAX_INTERVAL)
{
- TRAC_ERR("cent_recovery: centaur[%d] scac_lfir[0x%08x%08x]",
+ TRAC_ERR("cent_recovery: centaur[%d] scac_lfir[0x%08x%08x]",
l_prev_cent,
(uint32_t)(G_cent_scom_list_entry[READ_SCAC_LFIR].data >> 32),
(uint32_t)(G_cent_scom_list_entry[READ_SCAC_LFIR].data));
@@ -588,7 +647,7 @@ void task_centaur_data( task_t * i_task )
{
//Request is idle
L_gpe_had_1_tick = FALSE;
- if( G_centaur_queue_not_idle_traced)
+ if(G_centaur_queue_not_idle_traced)
{
TRAC_INFO("task_centaur_data: GPE completed");
G_centaur_queue_not_idle_traced = FALSE;
@@ -613,101 +672,105 @@ void task_centaur_data( task_t * i_task )
//(as long as the request was scheduled).
if(!async_request_completed(&l_centaur_data_ptr->gpe_req.request) || l_parms->rc )
{
- //log an error the first time this happens but keep on running.
- //eventually, we will timeout on the dimm & centaur temps not being updated
- //and fans will go to max speed (probably won't be able to throttle for
- //same reason we can't access the centaur here).
- if(!L_gpe_error_logged)
+ // Check if the centaur has a channel checkstop. If it does, then do not
+ // log any errors
+ if(!(cent_chan_checkstop(l_centaur_data_ptr->prev_centaur)))
{
- L_gpe_error_logged = TRUE;
-
- // There was an error collecting the centaur sensor cache
- TRAC_ERR("task_centaur_data: gpe_get_mem_data failed. rc=0x%08x%08x, cur=%d, prev=%d",
- (uint32_t)(l_parms->rc >> 32),
- (uint32_t)(l_parms->rc),
- l_centaur_data_ptr->current_centaur,
- l_centaur_data_ptr->prev_centaur);
- /* @
- * @errortype
- * @moduleid CENT_TASK_DATA_MOD
- * @reasoncode CENT_SCOM_ERROR
- * @userdata1 l_parms->rc
- * @userdata2 0
- * @userdata4 OCC_NO_EXTENDED_RC
- * @devdesc Failed to get centaur data
- */
- l_err = createErrl(
- CENT_TASK_DATA_MOD, //modId
- CENT_SCOM_ERROR, //reasoncode
- OCC_NO_EXTENDED_RC, //Extended reason code
- ERRL_SEV_PREDICTIVE, //Severity
- NULL, //Trace Buf
- DEFAULT_TRACE_SIZE, //Trace Size
- l_parms->rc, //userdata1
- 0 //userdata2
- );
-
- addUsrDtlsToErrl(l_err, //io_err
- (uint8_t *) &(l_centaur_data_ptr->gpe_req.ffdc), //i_dataPtr,
- sizeof(PoreFfdc), //i_size
- ERRL_USR_DTL_STRUCT_VERSION_1, //version
- ERRL_USR_DTL_BINARY_DATA); //type
-
- //Callouts depend on the return code of the gpe_get_mem_data procedure
- if(l_parms->rc == GPE_GET_MEM_DATA_DIED)
- {
- //callout the processor
- addCalloutToErrl(l_err,
- ERRL_CALLOUT_TYPE_HUID,
- G_sysConfigData.proc_huid,
- ERRL_CALLOUT_PRIORITY_LOW);
- }
- else if(l_parms->rc == GPE_GET_MEM_DATA_SENSOR_CACHE_FAILED)
+ //log an error the first time this happens but keep on running.
+ //eventually, we will timeout on the dimm & centaur temps not being updated
+ //and fans will go to max speed (probably won't be able to throttle for
+ //same reason we can't access the centaur here).
+ if(!L_gpe_error_logged)
{
- //callout the previous centaur if present
- if(CENTAUR_PRESENT(l_centaur_data_ptr->prev_centaur))
+ L_gpe_error_logged = TRUE;
+
+ // There was an error collecting the centaur sensor cache
+ TRAC_ERR("task_centaur_data: gpe_get_mem_data failed. rc=0x%08x%08x, cur=%d, prev=%d",
+ (uint32_t)(l_parms->rc >> 32),
+ (uint32_t)(l_parms->rc),
+ l_centaur_data_ptr->current_centaur,
+ l_centaur_data_ptr->prev_centaur);
+ /* @
+ * @errortype
+ * @moduleid CENT_TASK_DATA_MOD
+ * @reasoncode CENT_SCOM_ERROR
+ * @userdata1 l_parms->rc
+ * @userdata2 0
+ * @userdata4 OCC_NO_EXTENDED_RC
+ * @devdesc Failed to get centaur data
+ */
+ l_err = createErrl(
+ CENT_TASK_DATA_MOD, //modId
+ CENT_SCOM_ERROR, //reasoncode
+ OCC_NO_EXTENDED_RC, //Extended reason code
+ ERRL_SEV_PREDICTIVE, //Severity
+ NULL, //Trace Buf
+ DEFAULT_TRACE_SIZE, //Trace Size
+ l_parms->rc, //userdata1
+ 0 //userdata2
+ );
+
+ addUsrDtlsToErrl(l_err, //io_err
+ (uint8_t *) &(l_centaur_data_ptr->gpe_req.ffdc), //i_dataPtr,
+ sizeof(PoreFfdc), //i_size
+ ERRL_USR_DTL_STRUCT_VERSION_1, //version
+ ERRL_USR_DTL_BINARY_DATA); //type
+
+ //Callouts depend on the return code of the gpe_get_mem_data procedure
+ if(l_parms->rc == GPE_GET_MEM_DATA_DIED)
{
+ //callout the processor
addCalloutToErrl(l_err,
ERRL_CALLOUT_TYPE_HUID,
- G_sysConfigData.centaur_huids[l_centaur_data_ptr->prev_centaur],
- ERRL_CALLOUT_PRIORITY_HIGH);
+ G_sysConfigData.proc_huid,
+ ERRL_CALLOUT_PRIORITY_LOW);
}
-
- //callout the processor
- addCalloutToErrl(l_err,
- ERRL_CALLOUT_TYPE_HUID,
- G_sysConfigData.proc_huid,
- ERRL_CALLOUT_PRIORITY_LOW);
- }
- else if(l_parms->rc == GPE_GET_MEM_DATA_UPDATE_FAILED)
- {
- //callout the current centaur if present
- if(CENTAUR_PRESENT(l_centaur_data_ptr->current_centaur))
+ else if(l_parms->rc == GPE_GET_MEM_DATA_SENSOR_CACHE_FAILED)
+ {
+ //callout the previous centaur if present
+ if(CENTAUR_PRESENT(l_centaur_data_ptr->prev_centaur))
+ {
+ addCalloutToErrl(l_err,
+ ERRL_CALLOUT_TYPE_HUID,
+ G_sysConfigData.centaur_huids[l_centaur_data_ptr->prev_centaur],
+ ERRL_CALLOUT_PRIORITY_HIGH);
+ }
+
+ //callout the processor
+ addCalloutToErrl(l_err,
+ ERRL_CALLOUT_TYPE_HUID,
+ G_sysConfigData.proc_huid,
+ ERRL_CALLOUT_PRIORITY_LOW);
+ }
+ else if(l_parms->rc == GPE_GET_MEM_DATA_UPDATE_FAILED)
{
+ //callout the current centaur if present
+ if(CENTAUR_PRESENT(l_centaur_data_ptr->current_centaur))
+ {
+ addCalloutToErrl(l_err,
+ ERRL_CALLOUT_TYPE_HUID,
+ G_sysConfigData.centaur_huids[l_centaur_data_ptr->current_centaur],
+ ERRL_CALLOUT_PRIORITY_HIGH);
+ }
+
+ //callout the processor
addCalloutToErrl(l_err,
ERRL_CALLOUT_TYPE_HUID,
- G_sysConfigData.centaur_huids[l_centaur_data_ptr->current_centaur],
- ERRL_CALLOUT_PRIORITY_HIGH);
+ G_sysConfigData.proc_huid,
+ ERRL_CALLOUT_PRIORITY_LOW);
+ }
+ else
+ {
+ //callout the firmware
+ addCalloutToErrl(l_err,
+ ERRL_CALLOUT_TYPE_COMPONENT_ID,
+ ERRL_COMPONENT_ID_FIRMWARE,
+ ERRL_CALLOUT_PRIORITY_MED);
}
- //callout the processor
- addCalloutToErrl(l_err,
- ERRL_CALLOUT_TYPE_HUID,
- G_sysConfigData.proc_huid,
- ERRL_CALLOUT_PRIORITY_LOW);
- }
- else
- {
- //callout the firmware
- addCalloutToErrl(l_err,
- ERRL_CALLOUT_TYPE_COMPONENT_ID,
- ERRL_COMPONENT_ID_FIRMWARE,
- ERRL_CALLOUT_PRIORITY_MED);
+ commitErrl(&l_err);
}
-
- commitErrl(&l_err);
}
-
}
else
{
diff --git a/src/occ/cent/centaur_data.h b/src/occ/cent/centaur_data.h
index c6a8bf3..2eec5fd 100755
--- a/src/occ/cent/centaur_data.h
+++ b/src/occ/cent/centaur_data.h
@@ -5,10 +5,10 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* COPYRIGHT International Business Machines Corp. 2011,2014 */
-/* [+] Google Inc. */
+/* Contributors Listed Below - COPYRIGHT 2014,2015 */
/* [+] International Business Machines Corp. */
/* */
+/* */
/* Licensed under the Apache License, Version 2.0 (the "License"); */
/* you may not use this file except in compliance with the License. */
/* You may obtain a copy of the License at */
@@ -160,6 +160,7 @@ extern uint8_t G_cent_temp_updated_bitmap;
//bitmap of configured MBA's (2 per centaur, lsb is centaur0/mba0)
extern uint16_t G_configured_mbas;
+
//*************************************************************************
// Function Prototypes
//*************************************************************************
@@ -174,6 +175,10 @@ void centaur_init( void );
//handles centaur i2c recovery and other workarounds
void cent_recovery(uint32_t i_cent);
+//Determines if a centaur has a channel checkstop (returns TRUE is it has a
+//channel checkstop, FALSE otherwise)
+bool cent_chan_checkstop(const uint8_t i_cent);
+
//Returns a pointer to the most up-to-date centaur data for the centaur
//associated with the specified OCC centaur id.
MemData * cent_get_centaur_data_ptr( const uint8_t i_centaur_id );
diff --git a/src/ssx/pgp/pgp_centaur.c b/src/ssx/pgp/pgp_centaur.c
index a47600a..85a0dd3 100644
--- a/src/ssx/pgp/pgp_centaur.c
+++ b/src/ssx/pgp/pgp_centaur.c
@@ -1,4 +1,28 @@
-// $Id: pgp_centaur.c,v 1.2 2013/12/13 23:01:15 bcbrock Exp $
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/ssx/pgp/pgp_centaur.c $ */
+/* */
+/* OpenPOWER OnChipController Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2014,2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+// $Id: pgp_centaur.c,v 1.6 2015/01/27 17:56:26 daviddu Exp $
// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ssx/pgp/pgp_centaur.c,v $
//-----------------------------------------------------------------------------
// *! (C) Copyright International Business Machines Corp. 2013
@@ -103,6 +127,7 @@ _centaur_configuration_create(int i_bar, int i_slave, int i_setup)
int i, designatedSync, diffInit;
int64_t rc; /* Must be copied to global struct. */
mcfgpr_t mcfgpr;
+ mcifir_t mcifir;
mcsmode0_t mcsmode0;
pba_slvctln_t slvctl;
uint64_t diffMask, addrAccum, bar, mask, base;
@@ -162,6 +187,28 @@ _centaur_configuration_create(int i_bar, int i_slave, int i_setup)
for (i = 0; i < PGP_NCENTAUR; i++) {
+ // SW273928: New function added for FW820, when centaur has channel
+ // checkstop, we consider centaur is not usable so treat it as
+ // deconfigured. Note that the current implementation assumes when
+ // centaur is dead, its mcs is also dead, which is wrong. However,
+ // it only concerns when MCS happens to be the SYNC master because
+ // the gpe procedure only tries to talk to centaurs regardless what
+ // MCS status it knows about. In this particular case,
+ // the procedure will turn on SYNC on a different MCS with
+ // valid centaur. According to Eric Retter, it would be ok for
+ // HW to have more MCS turned on as SYNC master as long as FW
+ // only send SYNC command to one of them.
+
+ rc = _getscom(MCS_ADDRESS(MCIFIR, i), &(mcifir.value),
+ SCOM_TIMEOUT);
+ if (rc) {
+ rc = 0;
+ config.baseAddress[i] = 0;
+ continue;
+ }
+
+ if (mcifir.fields.channel_fail_signal_active) continue;
+
rc = _getscom(MCS_ADDRESS(MCFGPR, i), &(mcfgpr.value),
SCOM_TIMEOUT);
if (rc) {
diff --git a/src/ssx/pgp/registers/mcs_firmware_registers.h b/src/ssx/pgp/registers/mcs_firmware_registers.h
index b71b888..23e04b8 100755
--- a/src/ssx/pgp/registers/mcs_firmware_registers.h
+++ b/src/ssx/pgp/registers/mcs_firmware_registers.h
@@ -1,7 +1,31 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/ssx/pgp/registers/mcs_firmware_registers.h $ */
+/* */
+/* OpenPOWER OnChipController Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2014,2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
#ifndef __MCS_FIRMWARE_REGISTERS_H__
#define __MCS_FIRMWARE_REGISTERS_H__
-// $Id: mcs_firmware_registers.h,v 1.1.1.1 2013/12/11 21:03:23 bcbrock Exp $
+// $Id: mcs_firmware_registers.h,v 1.4 2015/01/27 17:56:30 daviddu Exp $
// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ssx/pgp/registers/mcs_firmware_registers.h,v $
//-----------------------------------------------------------------------------
// *! (C) Copyright International Business Machines Corp. 2013
@@ -156,6 +180,31 @@ typedef union mcsmode0 {
#define MCSMODE0_WRITE_DATA_BUFFER_ECC_CORRECT_DISABLE SIXTYFOUR_BIT_CONSTANT(0x0000000000000001)
#ifndef __ASSEMBLER__
+typedef union mcifir {
+
+ uint64_t value;
+ struct {
+#ifdef _BIG_ENDIAN
+ uint32_t high_order;
+ uint32_t low_order;
+#else
+ uint32_t low_order;
+ uint32_t high_order;
+#endif // _BIG_ENDIAN
+ } words;
+ struct {
+#ifdef _BIG_ENDIAN
+ uint64_t _reserved0 : 30;
+ uint64_t channel_fail_signal_active : 1;
+ uint64_t _reserved1 : 33;
+#else
+ uint64_t _reserved1 : 33;
+ uint64_t channel_fail_signal_active : 1;
+ uint64_t _reserved0 : 30;
+#endif // _BIG_ENDIAN
+ } fields;
+} mcifir_t;
+
#endif // __ASSEMBLER__
#endif // __MCS_FIRMWARE_REGISTERS_H__
diff --git a/src/ssx/pgp/registers/mcs_register_addresses.h b/src/ssx/pgp/registers/mcs_register_addresses.h
index bc7f95c..197ecfb 100755
--- a/src/ssx/pgp/registers/mcs_register_addresses.h
+++ b/src/ssx/pgp/registers/mcs_register_addresses.h
@@ -1,7 +1,31 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/ssx/pgp/registers/mcs_register_addresses.h $ */
+/* */
+/* OpenPOWER OnChipController Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2014,2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
#ifndef __MCS_REGISTER_ADDRESSES_H__
#define __MCS_REGISTER_ADDRESSES_H__
-// $Id: mcs_register_addresses.h,v 1.1.1.1 2013/12/11 21:03:25 bcbrock Exp $
+// $Id: mcs_register_addresses.h,v 1.4 2015/01/27 17:56:30 daviddu Exp $
// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ssx/pgp/registers/mcs_register_addresses.h,v $
//-----------------------------------------------------------------------------
// *! (C) Copyright International Business Machines Corp. 2013
@@ -41,6 +65,14 @@
#define MCS5_MCSMODE0 0x02011c87
#define MCS6_MCSMODE0 0x02011d07
#define MCS7_MCSMODE0 0x02011d87
+#define MCS0_MCIFIR 0x02011840
+#define MCS1_MCIFIR 0x020118C0
+#define MCS2_MCIFIR 0x02011940
+#define MCS3_MCIFIR 0x020119C0
+#define MCS4_MCIFIR 0x02011C40
+#define MCS5_MCIFIR 0x02011CC0
+#define MCS6_MCIFIR 0x02011D40
+#define MCS7_MCIFIR 0x02011DC0
#endif // __MCS_REGISTER_ADDRESSES_H__
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