diff options
author | mbroyles <mbroyles@us.ibm.com> | 2016-12-13 13:44:23 -0600 |
---|---|---|
committer | Martha Broyles <mbroyles@us.ibm.com> | 2016-12-15 15:00:48 -0500 |
commit | e350693c96096f1e607423c974082bf3d0b2a7ae (patch) | |
tree | ee043c3573595eb2880119d5ef15fe46d6ed548a | |
parent | 48173d1181eb89c7efed5d6ffd30c8e89666aee5 (diff) | |
download | talos-occ-e350693c96096f1e607423c974082bf3d0b2a7ae.tar.gz talos-occ-e350693c96096f1e607423c974082bf3d0b2a7ae.zip |
command handler cleanup and reset prep support
Support power off option on reset prep command
RTC: 163360
Change-Id: I433584308773d4a5d2c6543514d880ce7e10c6ad
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33796
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
-rwxr-xr-x | src/occ_405/cmdh/cmdh_dbug_cmd.c | 7 | ||||
-rwxr-xr-x | src/occ_405/cmdh/cmdh_fsp.c | 19 | ||||
-rwxr-xr-x | src/occ_405/cmdh/cmdh_fsp_cmds.c | 40 | ||||
-rwxr-xr-x | src/occ_405/cmdh/cmdh_fsp_cmds.h | 5 | ||||
-rwxr-xr-x | src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c | 28 | ||||
-rwxr-xr-x | src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.h | 4 | ||||
-rwxr-xr-x | src/occ_405/cmdh/cmdh_mnfg_intf.c | 6 | ||||
-rw-r--r-- | src/occ_405/cmdh/ll_ffdc.S | 89 | ||||
-rw-r--r-- | src/occ_405/occLinkInputFile | 2 |
9 files changed, 75 insertions, 125 deletions
diff --git a/src/occ_405/cmdh/cmdh_dbug_cmd.c b/src/occ_405/cmdh/cmdh_dbug_cmd.c index 6469fbf..7b92a83 100755 --- a/src/occ_405/cmdh/cmdh_dbug_cmd.c +++ b/src/occ_405/cmdh/cmdh_dbug_cmd.c @@ -5,7 +5,7 @@ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015 */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -149,7 +149,7 @@ void dbug_err_inject(const cmdh_fsp_cmd_t * i_cmd_ptr, void dbug_centaur_dump(const cmdh_fsp_cmd_t * i_cmd_ptr, cmdh_fsp_rsp_t * i_rsp_ptr) { -/* TEMP -- NOT SUPPORTED (Don't have MemData structure anymore */ +/* TODO - RTC 163359 Centaur support */ #if 0 uint16_t l_datalen = 0; uint8_t l_jj=0; @@ -213,8 +213,6 @@ void dbug_apss_dump(const cmdh_fsp_cmd_t * i_cmd_ptr, void dbug_proc_data_dump(const cmdh_fsp_cmd_t * i_cmd_ptr, cmdh_fsp_rsp_t * i_rsp_ptr) { -/* TEMP -- NOT SUPPORTED (Don't have CoreData structure anymore) */ -#if 0 uint16_t l_datalen = 0; uint8_t l_jj=0; @@ -236,7 +234,6 @@ void dbug_proc_data_dump(const cmdh_fsp_cmd_t * i_cmd_ptr, i_rsp_ptr->data_length[0] = CONVERT_UINT16_UINT8_HIGH(l_datalen); i_rsp_ptr->data_length[1] = CONVERT_UINT16_UINT8_LOW(l_datalen); G_rsp_status = ERRL_RC_SUCCESS; -#endif return; } diff --git a/src/occ_405/cmdh/cmdh_fsp.c b/src/occ_405/cmdh/cmdh_fsp.c index 798826e..6896165 100755 --- a/src/occ_405/cmdh/cmdh_fsp.c +++ b/src/occ_405/cmdh/cmdh_fsp.c @@ -1,11 +1,11 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: src/occ/cmdh/cmdh_fsp.c $ */ +/* $Source: src/occ_405/cmdh/cmdh_fsp.c $ */ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2011,2015 */ +/* Contributors Listed Below - COPYRIGHT 2011,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -399,12 +399,16 @@ void cmdh_build_errl_rsp(const cmdh_fsp_cmd_t * i_cmd_ptr, */ //For invalid data, use INVALID_INPUT_DATA reason code. Use INTERNAL_FAILURE otherwise. l_reason = (i_rc == ERRL_RC_INVALID_DATA)? INVALID_INPUT_DATA: INTERNAL_FAILURE; + CMDH_TRAC_ERR("cmdh_build_errl_rsp: command 0x%02X failed with reason 0x%02X", + i_cmd_ptr->cmd_type, + l_reason); + *l_errlHndlPtr = createErrl( CMDH_GENERIC_CMD_FAILURE, //modId l_reason, //reasoncode ERC_CMDH_INTERNAL_FAILURE, //Extended reason code ERRL_SEV_UNRECOVERABLE, //Severity - NULL, //TODO: create trace //Trace Buf + NULL, //Trace Buf DEFAULT_TRACE_SIZE, //Trace Size CONVERT_UINT8_ARRAY_UINT32(i_cmd_ptr->cmd_type, i_cmd_ptr->data[0], @@ -893,7 +897,6 @@ errlHndl_t cmdh_processTmgtRequest (const cmdh_fsp_cmd_t * i_cmd_ptr, l_err = cmdh_amec_pass_through(i_cmd_ptr,i_rsp_ptr); break; -/* case CMDH_RESET_PREP: l_err = cmdh_reset_prep(i_cmd_ptr,i_rsp_ptr); break; @@ -902,28 +905,26 @@ errlHndl_t cmdh_processTmgtRequest (const cmdh_fsp_cmd_t * i_cmd_ptr, cmdh_mnfg_test_parse(i_cmd_ptr,i_rsp_ptr); break; -*/ case CMDH_GET_FIELD_DEBUG_DATA: l_err = cmdh_tmgt_get_field_debug_data(i_cmd_ptr,i_rsp_ptr); break; -/* case CMDH_TUNABLE_PARMS: l_err = cmdh_tunable_parms(i_cmd_ptr,i_rsp_ptr); break; + case CMDH_SNAPSHOT_SYNC: l_err = cmdh_snapshot_sync(i_cmd_ptr,i_rsp_ptr); break; + case CMDH_GET_SNAPSHOT_BUFFER: l_err = cmdh_get_snapshot_buffer(i_cmd_ptr,i_rsp_ptr); break; -*/ + case CMDH_SET_USER_PCAP: l_err = cmdh_set_user_pcap(i_cmd_ptr, i_rsp_ptr); break; - //case CMDH_GET_CPU_TEMPS: - default: CMDH_TRAC_INFO("Invalid or unsupported command 0x%02x",l_cmd_type); diff --git a/src/occ_405/cmdh/cmdh_fsp_cmds.c b/src/occ_405/cmdh/cmdh_fsp_cmds.c index b0be790..0f09151 100755 --- a/src/occ_405/cmdh/cmdh_fsp_cmds.c +++ b/src/occ_405/cmdh/cmdh_fsp_cmds.c @@ -180,7 +180,7 @@ ERRL_RC cmdh_poll_v20(cmdh_fsp_rsp_t * o_rsp_ptr) l_poll_rsp->ext_status.n_power = 1; } - // TEMP/TODO: Sync request bit set here + // TODO RTC 165947: Sync request bit set here // Byte 3 l_poll_rsp->occ_pres_mask = G_sysConfigData.is_occ_present; @@ -484,8 +484,6 @@ errlHndl_t cmdh_reset_prep (const cmdh_fsp_cmd_t * i_cmd_ptr, cmdh_fsp_rsp_t * o_rsp_ptr) { errlHndl_t l_errlHndl = NULL; -/* TEMP -- NOT ENABLED YET (NEED DCOM) */ -#if 0 cmdh_reset_prep_t * l_cmd_ptr = (cmdh_reset_prep_t *) i_cmd_ptr; ERRL_RC l_rc = ERRL_RC_SUCCESS; bool l_ffdc = FALSE; @@ -540,6 +538,21 @@ errlHndl_t cmdh_reset_prep (const cmdh_fsp_cmd_t * i_cmd_ptr, l_rc = ERRL_RC_SUCCESS; break; + case CMDH_PREP_POWER_OFF: + // System powering off, stop DCOM and other tasks that still run in standby + rtl_stop_task(TASK_ID_DCOM_WAIT_4_MSTR); + rtl_stop_task(TASK_ID_DCOM_RX_INBX); + rtl_stop_task(TASK_ID_DCOM_TX_INBX); + rtl_stop_task(TASK_ID_DCOM_RX_OUTBX); + rtl_stop_task(TASK_ID_DCOM_TX_OUTBX); + rtl_stop_task(TASK_ID_DCOM_PARSE_FW_MSG); + rtl_stop_task(TASK_ID_MISC_405_CHECKS); + rtl_stop_task(TASK_ID_POKE_WDT); + + l_rc = ERRL_RC_SUCCESS; + break; + + default: l_rc = ERRL_RC_INVALID_DATA; break; @@ -575,7 +588,8 @@ errlHndl_t cmdh_reset_prep (const cmdh_fsp_cmd_t * i_cmd_ptr, } } - if (G_sysConfigData.system_type.kvm && isSafeStateRequested()) + if (G_sysConfigData.system_type.kvm && isSafeStateRequested() && + (l_cmd_ptr->reason != CMDH_PREP_POWER_OFF)) { // Notify dcom thread to update opal table ssx_semaphore_post(&G_dcomThreadWakeupSem); @@ -612,7 +626,6 @@ errlHndl_t cmdh_reset_prep (const cmdh_fsp_cmd_t * i_cmd_ptr, // Build Error Response packet cmdh_build_errl_rsp(i_cmd_ptr, o_rsp_ptr, l_rc, &l_errlHndl); } -#endif // #if 0 return l_errlHndl; } @@ -1155,20 +1168,7 @@ errlHndl_t cmdh_tmgt_setmodestate(const cmdh_fsp_cmd_t * i_cmd_ptr, G_occ_external_req_mode = l_cmd_ptr->occ_mode; G_occ_external_req_state = l_cmd_ptr->occ_state; - // In case we need to transition state while - // master slave comm isn't working: - // This is a temporary hack to allow state and mode transitions - // until DCOM is enabled; commented out again once - // that happens. - // This is only valid during early code development. It should - // always be commented in p9. - // if(){ - // G_occ_master_state = l_cmd_ptr->occ_state; - // G_occ_master_mode = l_cmd_ptr->occ_mode; - // } // We need to wait and see if all Slaves correctly make it to state/mode. - // TODO: Also, if all slaves can't go to this mode (based on their state), - // we need to return PRESENT_STATE_PROHIBITS and do nothing. do { uint8_t l_slv_idx = 0; @@ -1375,8 +1375,6 @@ errlHndl_t cmdh_tmgt_get_field_debug_data(const cmdh_fsp_cmd_t * i_cmd_ptr, cmdh_fsp_rsp_t * o_rsp_ptr) { errlHndl_t l_err = NULL; -/* TEMP -- NOT YET SUPPORTED (NEED SENSORS) */ -#if 0 uint16_t i = 0; UINT l_rtLen = 0; uint16_t l_num_of_sensors = CMDH_FIELD_MAX_NUM_SENSORS; @@ -1408,7 +1406,6 @@ errlHndl_t cmdh_tmgt_get_field_debug_data(const cmdh_fsp_cmd_t * i_cmd_ptr, l_rtLen = CMDH_FIELD_TRACE_DATA_SIZE; TRAC_get_buffer_partial(TRAC_get_td("INF"), l_resp_ptr->trace_inf, &l_rtLen); - // TODO: Set "present" to 0 for testing (since no sensor presented now) querySensorListArg_t l_qsl_arg = { 0, // i_startGsid - start with sensor 0x0000 0, // i_present @@ -1477,7 +1474,6 @@ errlHndl_t cmdh_tmgt_get_field_debug_data(const cmdh_fsp_cmd_t * i_cmd_ptr, // Build Error Response packet cmdh_build_errl_rsp(i_cmd_ptr, o_rsp_ptr, l_rc, &l_err); } -#endif return l_err; } diff --git a/src/occ_405/cmdh/cmdh_fsp_cmds.h b/src/occ_405/cmdh/cmdh_fsp_cmds.h index d5448ad..7529a87 100755 --- a/src/occ_405/cmdh/cmdh_fsp_cmds.h +++ b/src/occ_405/cmdh/cmdh_fsp_cmds.h @@ -50,7 +50,6 @@ typedef enum CMDH_SET_USER_PCAP = 0x22, CMDH_RESET_PREP = 0x25, CMDH_SNAPSHOT_SYNC = 0x26, - CMDH_GET_CPU_TEMPS = 0x33, CMDH_GET_SNAPSHOT_BUFFER = 0x35, CMDH_DEBUGPT = 0x40, CMDH_AME_PASS_THROUGH = 0x41, @@ -96,7 +95,7 @@ typedef struct __attribute__ ((packed)) cmdh_poll_resp_v20 uint8_t fir_master : 1; // 1 => fir master. uint8_t _reserved_5 : 1; uint8_t _reserved_4 : 1; - uint8_t _reserved_3 : 1; + uint8_t simics : 1; // 1 => running in SIMICS environment uint8_t _reserved_2 : 1; uint8_t obs_ready : 1; // 1 => OCC received all data to support obs state. uint8_t active_ready : 1; // 1 => OCC received all data to support active state. @@ -306,6 +305,8 @@ typedef enum // FFDC error log should be generated. Current assumption is that an // OCC in a different node should never be reason for an OCC failure. CMDH_PREP_FAILON_OTHERNODE = 0x03, + // System is powering off, stop RTL tasks + CMDH_PREP_POWER_OFF = 0xFF, } eCmdhResetPrepReason; #define CMDH_RESET_PREP_TRACE_SIZE 3072 diff --git a/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c b/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c index 3dda966..b0d4cd2 100755 --- a/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c +++ b/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c @@ -34,7 +34,6 @@ #include "state.h" #include "cmdh_fsp_cmds.h" #include "cmdh_dbug_cmd.h" -//#include "gpsm.h" #include "proc_pstate.h" #include <amec_data.h> #include "amec_amester.h" @@ -2198,33 +2197,6 @@ errlHndl_t DATA_store_cnfgdata (const cmdh_fsp_cmd_t * i_cmd_ptr, } break; - case DATA_FORMAT_WOF_CORE_FREQ: - // TODO: RTC 130216 - WOF - break; - - case DATA_FORMAT_WOF_VRM_EFF: - // TODO: RTC 130216 - WOF - break; - - case DATA_FORMAT_CLEAR_ALL: - // Make sure not in ACTIVE - if(CURRENT_STATE() != OCC_STATE_ACTIVE) - { - // Clear all configuration data except for any data needed to support observation - CMDH_TRAC_INFO("Clear all active configuration data"); - G_data_cnfg->data_mask &= SMGR_VALIDATE_DATA_OBSERVATION_MASK; - - // Clear the frequencies config data - memset(&G_sysConfigData.sys_mode_freq.table[0], 0, sizeof(G_sysConfigData.sys_mode_freq.table)); - - } - else - { - CMDH_TRAC_ERR("Failed to clear all active configuration data because we are in ACTIVE state"); - l_rc = ERRL_RC_INVALID_STATE; - } - break; - default: // Build Error Response packet, we are calling this here // to generate the error log, it will get called again, below but diff --git a/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.h b/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.h index cc4614f..1a71b8c 100755 --- a/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.h +++ b/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.h @@ -34,7 +34,6 @@ #include "occ_common.h" #include "state.h" #include "cmdh_fsp.h" -//#include "gpsm.h" #include "cmdh_fsp_cmds.h" #include "apss.h" @@ -52,9 +51,6 @@ typedef enum DATA_FORMAT_MEM_THROT = 0x12, DATA_FORMAT_THRM_THRESHOLDS = 0x13, DATA_FORMAT_AVSBUS_CONFIG = 0x14, - DATA_FORMAT_WOF_CORE_FREQ = 0x30, - DATA_FORMAT_WOF_VRM_EFF = 0x31, - DATA_FORMAT_CLEAR_ALL = 0xff, } eConfigDataFormatVersion; // Enum of the various Cnfg Data Masks that are used diff --git a/src/occ_405/cmdh/cmdh_mnfg_intf.c b/src/occ_405/cmdh/cmdh_mnfg_intf.c index edaf3bb..2d78b68 100755 --- a/src/occ_405/cmdh/cmdh_mnfg_intf.c +++ b/src/occ_405/cmdh/cmdh_mnfg_intf.c @@ -137,7 +137,7 @@ uint8_t cmdh_mnfg_run_stop_slew(const cmdh_fsp_cmd_t * i_cmd_ptr, } else { - l_step_size = 20; // TODO: Need to find out the step size from Pstate table + l_step_size = (uint16_t)G_mhz_per_pstate; // Translate the step delay to internal OCC ticks l_temp = (l_cmd_ptr->step_delay * 1000) / AMEC_US_PER_TICK; @@ -363,7 +363,7 @@ uint8_t cmdh_mnfg_list_sensors(const cmdh_fsp_cmd_t * i_cmd_ptr, // Do sanity check on the function inputs if ((NULL == i_cmd_ptr) || (NULL == o_rsp_ptr)) { -// TODO: THESE TRACES NEED TO BE VERIFIED +// TODO RTC 132348: THESE TRACES NEED TO BE VERIFIED TRAC_ERR("cmdh_mnfg_list_sensors: invalid pointers. cmd[0x%08x] rsp[0x%08x]", (uint32_t) i_cmd_ptr, (uint32_t) o_rsp_ptr); l_rc = ERRL_RC_INTERNAL_FAIL; @@ -501,7 +501,7 @@ uint8_t cmdh_mnfg_get_sensor(const cmdh_fsp_cmd_t * i_cmd_ptr, // Do sanity check on the function inputs if ((NULL == i_cmd_ptr) || (NULL == o_rsp_ptr)) { -// TODO: THESE TRACES NEED TO BE VERIFIED +// TODO RTC 132348: THESE TRACES NEED TO BE VERIFIED TRAC_ERR("cmdh_mnfg_get_sensor: invalid pointers. cmd[0x%08x] rsp[0x%08x]", (uint32_t) i_cmd_ptr, (uint32_t) o_rsp_ptr); l_rc = ERRL_RC_INTERNAL_FAIL; diff --git a/src/occ_405/cmdh/ll_ffdc.S b/src/occ_405/cmdh/ll_ffdc.S index d610d30..2c3ccef 100644 --- a/src/occ_405/cmdh/ll_ffdc.S +++ b/src/occ_405/cmdh/ll_ffdc.S @@ -5,7 +5,7 @@ # # OpenPOWER OnChipController Project # -# Contributors Listed Below - COPYRIGHT 2011,2015 +# Contributors Listed Below - COPYRIGHT 2011,2016 # [+] International Business Machines Corp. # # @@ -137,22 +137,22 @@ # 256 (x100) 4 dbsr # 260 (x104) 4 OCB_OISR0 # 264 (x108) 4 OCB_OISR1 -# 268 (x10c) 4 OCB_OUDER0 -# 272 (x110) 4 OCB_OUDER1 +# 268 (x10c) 4 OCB_OCCMISC +# 272 (x110) 4 OCB_OHTMCR # 276 (x114) 4 OCB_OIMR0 # 280 (x118) 4 OCB_OIMR1 # 284 (x11c) 4 OCB_OITR0 # 288 (x120) 4 OCB_OITR1 # 292 (x124) 4 OCB_OIEPR0 # 296 (x128) 4 OCB_OIEPR1 -# 300 (x12c) 4 OCB_OCIR0 -# 304 (x130) 4 OCB_OCIR1 +# 300 (x12c) 4 OCB_OEHDR +# 304 (x130) 4 OCB_OCICFG # 308 (x134) 4 OCB_ONISR0 # 312 (x138) 4 OCB_ONISR1 # 316 (x13c) 4 OCB_OCISR0 # 320 (x140) 4 OCB_OCISR1 -# 324 (x144) 4 OCB_ODHER0 -# 328 (x148) 4 OCB_ODHER1 +# 324 (x144) 4 OCB_OCCFLG +# 328 (x148) 4 OCB_OCCHBR # 332 (x14c) 4 SSX timebase # 336 (x150) 16 Build name # 352 (x160) 8 OCCLFIR @@ -343,10 +343,10 @@ OISR0: .int .struct OISR0 + 4 OISR1: .int .struct OISR1 + 4 -OUDER0: .int - .struct OUDER0 + 4 -OUDER1: .int - .struct OUDER1 + 4 +OCCMISC: .int + .struct OCCMISC + 4 +OHTMCR: .int + .struct OHTMCR + 4 OIMR0: .int .struct OIMR0 + 4 OIMR1: .int @@ -359,10 +359,10 @@ OIEPR0: .int .struct OIEPR0 + 4 OIEPR1: .int .struct OIEPR1 + 4 -OCIR0: .int - .struct OCIR0 + 4 -OCIR1: .int - .struct OCIR1 + 4 +OEHDR: .int + .struct OEHDR + 4 +OCICFG: .int + .struct OCICFG + 4 ONISR0: .int .struct ONISR0 + 4 ONISR1: .int @@ -371,10 +371,10 @@ OCISR0: .int .struct OCISR0 + 4 OCISR1: .int .struct OCISR1 + 4 -ODHER0: .int - .struct ODHER0 + 4 -ODHER1: .int - .struct ODHER1 + 4 +OCCFLG: .int + .struct OCCFLG + 4 +OCCHBR: .int + .struct OCCHBR + 4 FFDC_TIMEBASE: .int .struct FFDC_TIMEBASE + 4 OCC_BUILD_NAME: .byte @@ -858,19 +858,13 @@ __save_ffdc_regs: _lwzi %r5, %r5, OCB_OISR1 _stwi %r5, %r3, OISR1 - # TODO/NOTE: These registers were commented out for P9 because - # they were removed from the headerfile, ocb_register_addresses.h: - # OUDER0, OUDER1, OCIR0, OCIR1, ODHER0, ODHER1 + # Save OCCMISC + _lwzi %r5, %r5, OCB_OCCMISC + _stwi %r5, %r3, OCCMISC - # TODO: DETERMINE IF THIS REGISTER EXISTS - # Save OUDER0 - #_lwzi %r5, %r5, OCB_OUDER0 - #_stwi %r5, %r3, OUDER0 - - # TODO: DETERMINE IF THIS REGISTER EXISTS - # Save OUDER1 - #_lwzi %r5, %r5, OCB_OUDER1 - #_stwi %r5, %r3, OUDER1 + # Save OHTMCR + _lwzi %r5, %r5, OCB_OHTMCR + _stwi %r5, %r3, OHTMCR # Save OIMR0 _lwzi %r5, %r5, OCB_OIMR0 @@ -890,17 +884,12 @@ __save_ffdc_regs: # Save OIEPR1 _lwzi %r5, %r5, OCB_OIEPR1 _stwi %r5, %r3, OIEPR1 - - # TODO: DETERMINE IF THIS REGISTER EXISTS - # Save OCIR0 - #_lwzi %r5, %r5, OCB_OCIR0 - #_stwi %r5, %r3, OCIR0 - - # TODO: DETERMINE IF THIS REGISTER EXISTS - # Save OCIR1 - #_lwzi %r5, %r5, OCB_OCIR1 - #_stwi %r5, %r3, OCIR1 - + # Save OEHDR + _lwzi %r5, %r5, OCB_OEHDR + _stwi %r5, %r3, OEHDR + # Save OCICFG + _lwzi %r5, %r5, OCB_OCICFG + _stwi %r5, %r3, OCICFG # Save ONISR0 _lwzi %r5, %r5, OCB_ONISR0 _stwi %r5, %r3, ONISR0 @@ -913,16 +902,12 @@ __save_ffdc_regs: # Save OCISR1 _lwzi %r5, %r5, OCB_OCISR1 _stwi %r5, %r3, OCISR1 - - # TODO: DETERMINE IF THIS REGISTER EXISTS - # Save ODHER0 - #_lwzi %r5, %r5, OCB_ODHER0 - #_stwi %r5, %r3, ODHER0 - - # TODO: DETERMINE IF THIS REGISTER EXISTS - # Save ODHER1 - #_lwzi %r5, %r5, OCB_ODHER1 - #_stwi %r5, %r3, ODHER1 + # Save OCCFLG + _lwzi %r5, %r5, OCB_OCCFLG + _stwi %r5, %r3, OCCFLG + # Save OCCHBR + _lwzi %r5, %r5, OCB_OCCHBR + _stwi %r5, %r3, OCCHBR # Save ssx timebase _lwzsd %r5, __ssx_timebase_frequency_mhz diff --git a/src/occ_405/occLinkInputFile b/src/occ_405/occLinkInputFile index ba2e047..acca23c 100644 --- a/src/occ_405/occLinkInputFile +++ b/src/occ_405/occLinkInputFile @@ -26,8 +26,10 @@ INPUT ( amec_amester.o cmdh_fsp_cmds_datacnfg.o cmdh_fsp_cmds.o cmdh_fsp.o + cmdh_mnfg_intf.o cmdh_snapshot.o cmdh_thread.o + cmdh_tunable_parms.o common.o dcom.o dcom_thread.o |