Enable system config command and sensor list

Added configuration data debug command

RTC: 141643
Change-Id: I3d98321508780c25795d66a8d353c36593448a6e
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22549
Tested-by: FSP CI Jenkins
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Wael Elessawy <welessa@us.ibm.com>

9 files changed, 328 insertions, 152 deletions

diff --git a/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c b/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c
index eadfafa..b492a41 100755
--- a/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c
+++ b/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c
@@ -35,7 +35,6 @@
 #include "cmdh_fsp_cmds.h"
 #include "cmdh_dbug_cmd.h"
 //#include "gpsm.h"
-//#include "pstates.h"
 #include "proc_pstate.h"
 #include <amec_data.h>
 #include "amec_amester.h"
@@ -56,8 +55,7 @@
 #define DATA_PCAP_VERSION_0        0
 #define DATA_PCAP_VERSION_10       0x10
 
-#define DATA_SYS_VERSION_0         0
-#define DATA_SYS_VERSION_10        0x10
+#define DATA_SYS_VERSION_20        0x20
 
 #define DATA_APSS_VERSION20        0x20
 
@@ -431,7 +429,7 @@ errlHndl_t data_store_freq_data(const cmdh_fsp_cmd_t * i_cmd_ptr,
 //
 // Name:  apss_store_adc_channel
 //
-// Description: TODO Add description
+// Description: Matches the functional ID (from MRW) to the APSS ADC channel
 //
 // End Function Specification
 errlHndl_t apss_store_adc_channel(const eApssAdcChannelAssignments i_func_id, const uint8_t i_channel_num )
@@ -545,7 +543,7 @@ errlHndl_t apss_store_adc_channel(const eApssAdcChannelAssignments i_func_id, co
 
             default:
                 // It should never happen
-                CMDH_TRAC_ERR("apss_store_gpio_pin: Invalid function ID: 0x%x", i_func_id);
+                CMDH_TRAC_ERR("apss_store_adc_channel: Invalid function ID: 0x%x", i_func_id);
                 break;
         }
 
@@ -556,6 +554,8 @@ errlHndl_t apss_store_adc_channel(const eApssAdcChannelAssignments i_func_id, co
             {
                 *l_adc_function = i_channel_num;
                 G_apss_ch_to_function[i_channel_num] = i_func_id;
+                CNFG_DBG("apss_store_adc_channel: func_id[0x%02X] stored as 0x%02X for channel %d",
+                         i_func_id, G_apss_ch_to_function[i_channel_num], *l_adc_function);
             }
             else
             {
@@ -706,6 +706,8 @@ void apss_store_ipmi_sensor_id(const uint16_t i_channel, const apss_cfg_adc_v20_
         if ((i_adc->assignment != ADC_12V_SENSE) && (i_adc->assignment != ADC_GND_REMOTE_SENSE))
         {
             AMECSENSOR_PTR(PWRAPSSCH0 + i_channel)->ipmi_sid = i_adc->ipmisensorId;
+            CNFG_DBG("apss_store_ipmi_sensor_id: SID[0x%08X] stored as 0x%08X for channel %d",
+                     i_adc->ipmisensorId, AMECSENSOR_PTR(PWRAPSSCH0 + i_channel)->ipmi_sid, i_channel);
         }
     }
 }
@@ -714,7 +716,7 @@ void apss_store_ipmi_sensor_id(const uint16_t i_channel, const apss_cfg_adc_v20_
 //
 // Name:  apss_store_gpio_pin
 //
-// Description: TODO Add description
+// Description: Matches the functional ID (from MRW) to the APSS GPIO pin
 //
 // End Function Specification
 errlHndl_t apss_store_gpio_pin(const eApssGpioAssignments i_func_id, const uint8_t i_gpio_num )
@@ -815,6 +817,7 @@ errlHndl_t apss_store_gpio_pin(const eApssGpioAssignments i_func_id, const uint8
             if( SYSCFG_INVALID_PIN == *l_gpio_function)
             {
                 *l_gpio_function = i_gpio_num;
+                CNFG_DBG("apss_store_gpio_pin: func_id[0x%02X] is mapped to pin 0x%02X", i_func_id, *l_gpio_function);
             }
             else
             {
@@ -883,7 +886,11 @@ errlHndl_t data_store_apss_config_v20(const cmdh_apss_config_v20_t * i_cmd_ptr,
             //Write sensor IDs to the appropriate powr sensors.
             apss_store_ipmi_sensor_id(l_channel, &(i_cmd_ptr->adc[l_channel]));
         }
-
+        CNFG_DBG("data_store_apss_config_v20: Channel %d: FuncID[0x%02X] SID[0x%08X]",
+                 l_channel, i_cmd_ptr->adc[l_channel].assignment, i_cmd_ptr->adc[l_channel].ipmisensorId);
+        CNFG_DBG("data_store_apss_config_v20: Channel %d: GND[0x%02X] Gain[0x%08X] Offst[0x%08X]",
+                 l_channel, G_sysConfigData.apss_cal[l_channel].gnd_select, G_sysConfigData.apss_cal[l_channel].gain,
+                 G_sysConfigData.apss_cal[l_channel].offset);
     }
 
     if(NULL == l_err)
@@ -1032,6 +1039,7 @@ errlHndl_t data_store_role(const cmdh_fsp_cmd_t * i_cmd_ptr,
             {
                 l_errlHndl = initialize_apss();
 
+                // Initialize APSS communication on the backup OCC (retries internally)
                 if( NULL != l_errlHndl )
                 {
                     // Don't request due to a backup apss failure. Just log the error.
@@ -1245,7 +1253,7 @@ errlHndl_t data_store_sys_config(const cmdh_fsp_cmd_t * i_cmd_ptr,
     errlHndl_t                      l_err = NULL;
 
     // Cast the command to the struct for this format
-    cmdh_sys_config_t * l_cmd_ptr = (cmdh_sys_config_t *)i_cmd_ptr;
+    cmdh_sys_config_v20_t * l_cmd_ptr = (cmdh_sys_config_v20_t *)i_cmd_ptr;
     uint16_t                        l_data_length = 0;
     uint32_t                        l_sys_data_sz = 0;
     bool                            l_invalid_input = TRUE; //Assume bad input
@@ -1254,17 +1262,9 @@ errlHndl_t data_store_sys_config(const cmdh_fsp_cmd_t * i_cmd_ptr,
     l_data_length = CMDH_DATALEN_FIELD_UINT16(l_cmd_ptr);
 
     // Check length and version
-    if(l_cmd_ptr->version == DATA_SYS_VERSION_0)
+    if(l_cmd_ptr->version == DATA_SYS_VERSION_20)
     {
-        l_sys_data_sz = sizeof(cmdh_sys_config_t) - sizeof(cmdh_fsp_cmd_header_t);
-        if(l_sys_data_sz == l_data_length)
-        {
-            l_invalid_input = FALSE;
-        }
-    }
-    else if(l_cmd_ptr->version == DATA_SYS_VERSION_10)
-    {
-        l_sys_data_sz = sizeof(cmdh_sys_config_v10_t) - sizeof(cmdh_fsp_cmd_header_t);
+        l_sys_data_sz = sizeof(cmdh_sys_config_v20_t) - sizeof(cmdh_fsp_cmd_header_t);
         if(l_sys_data_sz == l_data_length)
         {
             l_invalid_input = FALSE;
@@ -1303,30 +1303,25 @@ errlHndl_t data_store_sys_config(const cmdh_fsp_cmd_t * i_cmd_ptr,
     }
     else
     {
-        if(l_cmd_ptr->version == DATA_SYS_VERSION_0)
+        if(l_cmd_ptr->version == DATA_SYS_VERSION_20)
         {
             // Copy data
             G_sysConfigData.system_type.byte    = l_cmd_ptr->sys_config.system_type;
-            G_sysConfigData.proc_huid           = l_cmd_ptr->sys_config.proc_huid;
-            G_sysConfigData.backplane_huid      = l_cmd_ptr->sys_config.backplane_huid;
-            G_sysConfigData.apss_huid           = l_cmd_ptr->sys_config.apss_huid;
-            G_sysConfigData.dpss_huid           = l_cmd_ptr->sys_config.dpss_huid;
-        }
-        else if(l_cmd_ptr->version == DATA_SYS_VERSION_10)
-        {
-            // Copy data
-            cmdh_sys_config_v10_t * l_cmd2_ptr = (cmdh_sys_config_v10_t *)i_cmd_ptr;
-            G_sysConfigData.system_type.byte    = l_cmd2_ptr->sys_config.system_type;
-            G_sysConfigData.backplane_huid      = l_cmd2_ptr->sys_config.backplane_sid;
-            G_sysConfigData.apss_huid           = l_cmd2_ptr->sys_config.apss_sid;
-            G_sysConfigData.proc_huid           = l_cmd2_ptr->sys_config.proc_sid;
+            G_sysConfigData.backplane_huid      = l_cmd_ptr->sys_config.backplane_sid;
+            G_sysConfigData.apss_huid           = l_cmd_ptr->sys_config.apss_sid;
+            G_sysConfigData.proc_huid           = l_cmd_ptr->sys_config.proc_sid;
+            CNFG_DBG("data_store_sys_config: SystemType[0x%02X] BPSID[0x%08X] APSSSID[0x%08X] ProcSID[0x%08X]",
+                     G_sysConfigData.system_type.byte, G_sysConfigData.backplane_huid, G_sysConfigData.apss_huid,
+                     G_sysConfigData.proc_huid);
 
             //Write core temp and freq sensor ids
             //Core Temp and Freq sensors are always in sequence in the table
             for (l_coreIndex = 0; l_coreIndex < MAX_CORES; l_coreIndex++)
             {
-                AMECSENSOR_PTR(TEMP4MSP0C0 + l_coreIndex)->ipmi_sid = l_cmd2_ptr->sys_config.core_sid[(l_coreIndex * 2)];
-                AMECSENSOR_PTR(FREQA2MSP0C0 + l_coreIndex)->ipmi_sid = l_cmd2_ptr->sys_config.core_sid[(l_coreIndex * 2) + 1];
+                AMECSENSOR_PTR(TEMP4MSP0C0 + l_coreIndex)->ipmi_sid = l_cmd_ptr->sys_config.core_sid[(l_coreIndex * 2)];
+                AMECSENSOR_PTR(FREQA2MSP0C0 + l_coreIndex)->ipmi_sid = l_cmd_ptr->sys_config.core_sid[(l_coreIndex * 2) + 1];
+                CNFG_DBG("data_store_sys_config: Core[%d] TempSID[0x%08X] FreqSID[0x%08X]", l_coreIndex,
+                         AMECSENSOR_PTR(TEMP4MSP0C0 + l_coreIndex)->ipmi_sid, AMECSENSOR_PTR(FREQA2MSP0C0 + l_coreIndex)->ipmi_sid);
             }
         }
 
diff --git a/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.h b/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.h
index 7bab2ae..661eeb1 100755
--- a/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.h
+++ b/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.h
@@ -35,7 +35,6 @@
 #include "state.h"
 #include "cmdh_fsp.h"
 //#include "gpsm.h"
-//#include "pstates.h"
 #include "cmdh_fsp_cmds.h"
 #include "apss.h"
 
@@ -43,7 +42,6 @@
 // are sent to OCC over the TMGT<->OCC interface.
 typedef enum
 {
-   DATA_FORMAT_PSTATE_SUPERSTRUCTURE = 0x01,
    DATA_FORMAT_FREQ                  = 0x02,
    DATA_FORMAT_SET_ROLE              = 0x03,
    DATA_FORMAT_APSS_CONFIG           = 0x04,
@@ -63,7 +61,6 @@ typedef enum
 // to signal that OCC has received cnfg data
 typedef enum
 {
-   DATA_MASK_PSTATE_SUPERSTRUCTURE = 0x00000001,
    DATA_MASK_FREQ_PRESENT          = 0x00000002,
    DATA_MASK_SET_ROLE              = 0x00000004,
    DATA_MASK_APSS_CONFIG           = 0x00000008,
@@ -182,41 +179,22 @@ typedef struct __attribute__ ((packed))
     cmdh_pcap_config_data_v10_t   pcap_config;
 }cmdh_pcap_config_v10_t;
 
-// Used by TMGT to send OCC the System config data.
-typedef struct __attribute__ ((packed))
-{
-    uint8_t  system_type;     // OCC usage of this byte is TBD
-    uint64_t proc_huid;       // Processor HUID
-    uint64_t backplane_huid;  // Backplane HUID
-    uint64_t apss_huid;       // APSS HUID
-    uint64_t dpss_huid;       // DPSS HUID
-} cmdh_sys_config_data_t;
-
-// Used by TMGT to send OCC the system config data.
-typedef struct __attribute__ ((packed))
-{
-    struct cmdh_fsp_cmd_header;
-    uint8_t              format;
-    uint8_t              version;
-    cmdh_sys_config_data_t   sys_config;
-}cmdh_sys_config_t;
-
 typedef struct __attribute__ ((packed))
 {
     uint8_t  system_type;     // General system type
-    uint16_t proc_sid;        // Processor Sensor ID
-    uint16_t core_sid[24];    // 12 cores. 2 bytes for Temp, followed by 2 bytes for Frequency.
-    uint16_t backplane_sid;   // Backplane Sensor ID
-    uint16_t apss_sid;        // APSS Sensor ID
-} cmdh_sys_config_data_v10_t;
+    uint32_t proc_sid;        // Processor Sensor ID
+    uint32_t core_sid[MAX_CORES * 2];    // 24 cores. 4 bytes for Temp, followed by 4 bytes for Frequency.
+    uint32_t backplane_sid;   // Backplane Sensor ID
+    uint32_t apss_sid;        // APSS Sensor ID
+} cmdh_sys_config_data_v20_t;
 
 typedef struct __attribute__ ((packed))
 {
     struct cmdh_fsp_cmd_header;
     uint8_t              format;
     uint8_t              version;
-    cmdh_sys_config_data_v10_t   sys_config;
-}cmdh_sys_config_v10_t;
+    cmdh_sys_config_data_v20_t   sys_config;
+}cmdh_sys_config_v20_t;
 
 // Used by TMGT to send OCC the IPS config data.
 typedef struct __attribute__ ((packed))
diff --git a/src/occ_405/dcom/dcom.h b/src/occ_405/dcom/dcom.h
index 175f037..13ce50b 100755
--- a/src/occ_405/dcom/dcom.h
+++ b/src/occ_405/dcom/dcom.h
@@ -89,9 +89,9 @@
 // general defines
 #define TOD_SIZE 6
 #define NUM_TOD_SENSORS 3
-#define SLV_INBOX_RSV_SIZE 88
+#define SLV_INBOX_RSV_SIZE 64
 #define SLV_MAILBOX_SIZE 32
-#define SLV_OUTBOX_RSV_SIZE 758
+#define SLV_OUTBOX_RSV_SIZE 614
 #define DOORBELL_RSV_SIZE 1
 
 #define DCOM_250us_GAP 1
@@ -99,12 +99,12 @@
 #define DCOM_1S_GAP 4000
 
 // POB Id structure
-typedef struct 
-{ 
+typedef struct
+{
     uint8_t module_id  :2;
     uint8_t node_id    :3;
     uint8_t chip_id    :3;
-} pob_id_t; 
+} pob_id_t;
 
 // TODO may change in the future
 // For now pbax structure is same as pob id structure
@@ -118,41 +118,41 @@ typedef struct
     uint8_t  version;                                               // [1]
 
     // From APSS Power Measurement
-    uint16_t adc[MAX_APSS_ADC_CHANNELS];                            // [2]  - 32 bytes
-    uint16_t gpio[MAX_APSS_GPIO_PORTS];                             // [34] -  4 bytes
-    uint16_t ambient_temp;                                          // [38] -  2 bytes
-    uint16_t altitude;                                              // [40] -  2 bytes
-    uint8_t  tod[ TOD_SIZE ];                                       // [42] -  6 bytes
+    uint16_t adc[MAX_APSS_ADC_CHANNELS];                            // [2]   - 32 bytes
+    uint16_t gpio[MAX_APSS_GPIO_PORTS];                             // [34]  -  4 bytes
+    uint16_t ambient_temp;                                          // [38]  -  2 bytes
+    uint16_t altitude;                                              // [40]  -  2 bytes
+    uint8_t  tod[ TOD_SIZE ];                                       // [42]  -  6 bytes
 
     // AMEC Actuators
-    uint16_t freq250usp0cy[MAX_CORES];                              // [48] - 24 bytes
-    uint16_t memsp2msP0MxCyPz[MAX_CENTAUR_THROTTLES];               // [72] - 16 bytes
-    uint16_t memsp2msP0IGx[MAX_MEM_INTERLEAVE_GROUP_THROTTLES];     // [88] - 16 bytes
+    uint16_t freq250usp0cy[MAX_CORES];                              // [48]  - 48 bytes
+    uint16_t memsp2msP0MxCyPz[MAX_CENTAUR_THROTTLES];               // [96]  - 16 bytes
+    uint16_t memsp2msP0IGx[MAX_MEM_INTERLEAVE_GROUP_THROTTLES];     // [112] - 16 bytes
 
     // Manufacturing parameters
-    uint16_t foverride;                                             // [104] - 2 bytes
-    uint8_t  foverride_enable;                                      // [106] - 1 byte
-    uint8_t  emulate_oversub;                                       // [107] - 1 byte
+    uint16_t foverride;                                             // [128] -  2 bytes
+    uint8_t  foverride_enable;                                      // [130] -  1 byte
+    uint8_t  emulate_oversub;                                       // [131] -  1 byte
 
     // Idle Power Saver parameters
-    uint16_t ips_freq_request;                                      // [108] - 2 bytes
+    uint16_t ips_freq_request;                                      // [132] -  2 bytes
 
     // DPS Tunable Parameters
-    uint16_t alpha_up;                                              // [110] - 2 bytes
-    uint16_t alpha_down;                                            // [112] - 2 bytes
-    uint16_t sample_count_util;                                     // [114] - 2 bytes
-    uint16_t step_up;                                               // [116] - 2 bytes
-    uint16_t step_down;                                             // [118] - 2 bytes
-    uint16_t epsilon_perc;                                          // [120] - 2 bytes
-    uint16_t tlutil;                                                // [122] - 2 bytes
-    uint8_t  tunable_param_overwrite;                               // [124] - 1 byte
+    uint16_t alpha_up;                                              // [134] -  2 bytes
+    uint16_t alpha_down;                                            // [136] -  2 bytes
+    uint16_t sample_count_util;                                     // [138] -  2 bytes
+    uint16_t step_up;                                               // [140] -  2 bytes
+    uint16_t step_down;                                             // [142] -  2 bytes
+    uint16_t epsilon_perc;                                          // [144] -  2 bytes
+    uint16_t tlutil;                                                // [146] -  2 bytes
+    uint8_t  tunable_param_overwrite;                               // [148] -  1 byte
 
     // Soft frequency boundaries
-    uint16_t soft_fmin;                                             // [125] - 2 bytes
-    uint8_t  pad;                                                   // [127] - 1 bytes
-    uint16_t soft_fmax;                                             // [128] - 2 bytes
+    uint16_t soft_fmin;                                             // [149] -  2 bytes
+    uint8_t  pad;                                                   // [151] -  1 bytes
+    uint16_t soft_fmax;                                             // [152] -  2 bytes
 
-    // Reserved Bytes 
+    // Reserved Bytes
     union
     {
       struct
@@ -161,7 +161,7 @@ typedef struct
           freqConfig_t sys_mode_freq;
           uint8_t      tb_record;
       };
-      uint8_t  reserved[ SLV_INBOX_RSV_SIZE ];                      // [130] - 88 bytes
+      uint8_t  reserved[ SLV_INBOX_RSV_SIZE ];                      // [154] - 64 bytes
     };
 
     // GPSM DCM Synchronization
@@ -176,7 +176,7 @@ typedef struct
 
 // SLAVE OUTBOX structure
 typedef struct __attribute__ ((packed))
-{ 
+{
     // Packet Type & Sequence Information
     uint8_t  seq;                                                //   [0]
     uint8_t  version;                                            //   [1]
@@ -184,38 +184,38 @@ typedef struct __attribute__ ((packed))
     // Mini-sensors
     uint16_t freqa2msp0;                                         //   [2]
     uint16_t ips2msp0cy[MAX_CORES];                              //   [4]
-    uint16_t mcpifd2msp0cy[MAX_CORES];                           //  [28]
-    uint16_t mcpifi2msp0cy[MAX_CORES];                           //  [52]
-    uint16_t memsp2msp0mx[MAX_NUM_MEM_CONTROLLERS];              //  [76]
-    uint16_t pwr250usp0;                                         //  [92]
-    uint16_t pwr250usmemp0;                                      //  [94]
-    uint16_t sleepcnt2msp0;                                      //  [96]
-    uint16_t winkcnt2msp0;                                       //  [98]
-    uint16_t temp4msp0;                                          // [100]
-    uint16_t temp4msp0peak;                                      // [102]
-    uint16_t util2msp0cy[MAX_CORES];                             // [104]
-    uint16_t vrfan250usmem;                                      // [128]
-    uint16_t vrfan250usproc;                                     // [130]
-    uint16_t mrd2msp0mx[MAX_NUM_MEM_CONTROLLERS];                // [132]
-    uint16_t mwr2msp0mx[MAX_NUM_MEM_CONTROLLERS];                // [148]
-    uint16_t pwrpx250usp0cy[MAX_CORES];                          // [164]
-    uint16_t todclock[NUM_TOD_SENSORS];                          // [188]
-    uint16_t temp2mscent;                                        // [194]
-    uint16_t temp2msdimm;                                        // [196]
-    uint16_t util2msp0;                                          // [198]
-    uint16_t ips2msp0;                                           // [200]
-    uint16_t nutil3sp0cy[MAX_CORES];                             // [202] - 24 bytes
+    uint16_t mcpifd2msp0cy[MAX_CORES];                           //  [52]
+    uint16_t mcpifi2msp0cy[MAX_CORES];                           // [100]
+    uint16_t memsp2msp0mx[MAX_NUM_MEM_CONTROLLERS];              // [148]
+    uint16_t pwr250usp0;                                         // [164]
+    uint16_t pwr250usmemp0;                                      // [166]
+    uint16_t sleepcnt2msp0;                                      // [168]
+    uint16_t winkcnt2msp0;                                       // [170]
+    uint16_t temp4msp0;                                          // [172]
+    uint16_t temp4msp0peak;                                      // [174]
+    uint16_t util2msp0cy[MAX_CORES];                             // [176]
+    uint16_t vrfan250usmem;                                      // [224]
+    uint16_t vrfan250usproc;                                     // [226]
+    uint16_t mrd2msp0mx[MAX_NUM_MEM_CONTROLLERS];                // [228]
+    uint16_t mwr2msp0mx[MAX_NUM_MEM_CONTROLLERS];                // [244]
+    uint16_t pwrpx250usp0cy[MAX_CORES];                          // [260]
+    uint16_t todclock[NUM_TOD_SENSORS];                          // [308]
+    uint16_t temp2mscent;                                        // [314]
+    uint16_t temp2msdimm;                                        // [316]
+    uint16_t util2msp0;                                          // [318]
+    uint16_t ips2msp0;                                           // [320]
+    uint16_t nutil3sp0cy[MAX_CORES];                             // [322]
 
     // Fwish (i.e., desired frequency that this OCC slave wants based on DPS
     // algorithms)
-    uint16_t fwish;                                              // [226] - 2 bytes
+    uint16_t fwish;                                              // [370]
     // Factual (i.e., actual frequency requested by this OCC slave)
-    uint16_t factual;                                            // [228] - 2 bytes
+    uint16_t factual;                                            // [372]
 
-    // Reserved Bytes 
+    // Reserved Bytes
     union
     {
-        uint8_t  reserved[SLV_OUTBOX_RSV_SIZE];                  // [230] - 758 bytes
+        uint8_t  reserved[SLV_OUTBOX_RSV_SIZE];                  // [374] - 614 bytes
         struct __attribute__ ((packed))
         {
             uint8_t _reserved_1;
@@ -235,7 +235,7 @@ typedef struct __attribute__ ((packed))
 //   This must be aligned to 8 bytes since that is the unit
 //   that the PBAX unit uses to send
 typedef struct
-{ 
+{
     union
     {
         struct
@@ -323,7 +323,7 @@ typedef struct
         // How many Master Doorbell Broadcasts have been sent
         uint32_t    doorbellNumSent;
         // What is our "send" phase in relation to our SsxTimebase
-        uint16_t    doorbellPhase;  
+        uint16_t    doorbellPhase;
         // The Most Recent Master Doorbell Broadcast sequence number
         uint8_t     doorbellSeq;
         // Masks of the current status of the slaves
@@ -378,13 +378,13 @@ extern dcom_timing_t G_dcomTime;
 
 // Used to tell AMEC code that the slave inbox has been received.
 // This could just be a flag, doesn't have to be semaphore, since
-// the RTL Loop task can't block on Semaphore, it would just have 
+// the RTL Loop task can't block on Semaphore, it would just have
 // to loop until it got a good return code.
 extern bool G_slv_inbox_received;
 
 // Used to tell AMEC code that the slave outbox has been received.
 // This could just be a flag, doesn't have to be semaphore, since
-// the RTL Loop task can't block on Semaphore, it would just have 
+// the RTL Loop task can't block on Semaphore, it would just have
 // to loop until it got a good return code.
 extern uint8_t G_slv_outbox_complete;
 
@@ -426,7 +426,7 @@ extern SsxSemaphore G_dcomThreadWakeupSem;
 
 // Used to house the actuation & power measurement data from the master
 // before it is DMA'd to Main Memory from SRAM.
-extern dcom_slv_inbox_t  G_dcom_slv_inbox_tx[MAX_OCCS];  
+extern dcom_slv_inbox_t  G_dcom_slv_inbox_tx[MAX_OCCS];
 
 // Used to house the Slave Outboxes with the mini-sensor data in in the master
 // after it is DMA'd from main memory.
@@ -470,7 +470,7 @@ uint32_t dcom_calc_slv_inbox_addr(void);
 // Get address of slave outbox in main memory
 uint32_t dcom_calc_slv_outbox_addr( const dcom_slv_outbox_doorbell_t * i_doorbell, uint8_t * o_occ_id);
 
-// Determine if we are master or slave 
+// Determine if we are master or slave
 void dcom_initialize_roles(void) INIT_SECTION;
 
 // Copy slave inbox from main memory to sram
diff --git a/src/occ_405/incl/occ_common.h b/src/occ_405/incl/occ_common.h
index fbf6dd5..8dee795 100755
--- a/src/occ_405/incl/occ_common.h
+++ b/src/occ_405/incl/occ_common.h
@@ -276,7 +276,7 @@ enum
 
 #define DEFAULT_TRACE_SIZE 1536
 #define MAX_OCCS       8
-#define MAX_CORES      12
+#define MAX_CORES      24
 
 //Used by G_occ_interrupt_type to distinguish between FSP supported OCCs and other servers.
 #define FSP_SUPPORTED_OCC 0x00
diff --git a/src/occ_405/occ_sys_config.h b/src/occ_405/occ_sys_config.h
index 7e2f363..91a6369 100755
--- a/src/occ_405/occ_sys_config.h
+++ b/src/occ_405/occ_sys_config.h
@@ -37,7 +37,7 @@
 
 #define MAX_NUM_OCC              8
 #define MAX_NUM_NODES            4
-#define MAX_NUM_CORES           12
+#define MAX_NUM_CORES           24
 #define MAX_THREADS_PER_CORE     8
 #define MAX_NUM_CHIP_MODULES     4
 #define MAX_NUM_POWER_SUPPLIES   4
@@ -266,16 +266,16 @@ typedef struct
   eSystemType system_type;  // OCC usage of this byte is TBD
 
   // Processor HUID - HUID for this OCC processor, used by OCC for processor error call out
-  uint64_t proc_huid;
+  uint32_t proc_huid;
 
   // Backplane HUID - Used by OCC for system backplane error call out (i.e. VRM errors will call out backplane)
-  uint64_t backplane_huid;
+  uint32_t backplane_huid;
 
   // APSS HUID - Used by OCC for APSS error call out
-  uint64_t apss_huid;
+  uint32_t apss_huid;
 
   // DPSS HUID - Used by OCC for DPSS error call out
-  uint64_t dpss_huid;
+  uint32_t dpss_huid;
 
   // Contains how many OCCs & how many proc modules are present.
   uint8_t sys_num_proc_present;
diff --git a/src/occ_405/sensor/sensor.h b/src/occ_405/sensor/sensor.h
index 4459e08..8fa4e8e 100755
--- a/src/occ_405/sensor/sensor.h
+++ b/src/occ_405/sensor/sensor.h
@@ -51,7 +51,7 @@
 #define MAX_VECTOR_SENSORS          32
 #define MAX_SENSOR_NAME_SZ          16 // including NULL
 #define MAX_SENSOR_UNIT_SZ          4 // including NULL
-#define MAX_AMEC_SENSORS            500
+#define MAX_AMEC_SENSORS            710
 #define VECTOR_SENSOR_DEFAULT_VAL   0xFF
 
 typedef enum
@@ -152,7 +152,7 @@ struct sensor
     uint32_t update_tag;      // Count of the number of 'ticks' that have passed
                               // between updates to this sensor (used for time-
                               // derived sensor)
-    uint16_t ipmi_sid;        // Ipmi sensor id obtained from mrw
+    uint32_t ipmi_sid;        // Ipmi sensor id obtained from mrw
     vectorSensor_t * vector;  // Pointer to vector control structure. NULL if
                               // this is not a vector sensor.
     uint16_t * mini_sensor;   // Pointer to entry in mini-sensor table. NULL if
diff --git a/src/occ_405/sensor/sensor_enum.h b/src/occ_405/sensor/sensor_enum.h
index bbd46f1..e9a394a 100755
--- a/src/occ_405/sensor/sensor_enum.h
+++ b/src/occ_405/sensor/sensor_enum.h
@@ -140,6 +140,18 @@ enum e_gsid
     FREQ250USP0C9,
     FREQ250USP0C10,
     FREQ250USP0C11,
+    FREQ250USP0C12,
+    FREQ250USP0C13,
+    FREQ250USP0C14,
+    FREQ250USP0C15,
+    FREQ250USP0C16,
+    FREQ250USP0C17,
+    FREQ250USP0C18,
+    FREQ250USP0C19,
+    FREQ250USP0C20,
+    FREQ250USP0C21,
+    FREQ250USP0C22,
+    FREQ250USP0C23,
 
     FREQA2MSP0C0,
     FREQA2MSP0C1,
@@ -153,6 +165,18 @@ enum e_gsid
     FREQA2MSP0C9,
     FREQA2MSP0C10,
     FREQA2MSP0C11,
+    FREQA2MSP0C12,
+    FREQA2MSP0C13,
+    FREQA2MSP0C14,
+    FREQA2MSP0C15,
+    FREQA2MSP0C16,
+    FREQA2MSP0C17,
+    FREQA2MSP0C18,
+    FREQA2MSP0C19,
+    FREQA2MSP0C20,
+    FREQA2MSP0C21,
+    FREQA2MSP0C22,
+    FREQA2MSP0C23,
 
     IPS2MSP0C0,
     IPS2MSP0C1,
@@ -166,6 +190,18 @@ enum e_gsid
     IPS2MSP0C9,
     IPS2MSP0C10,
     IPS2MSP0C11,
+    IPS2MSP0C12,
+    IPS2MSP0C13,
+    IPS2MSP0C14,
+    IPS2MSP0C15,
+    IPS2MSP0C16,
+    IPS2MSP0C17,
+    IPS2MSP0C18,
+    IPS2MSP0C19,
+    IPS2MSP0C20,
+    IPS2MSP0C21,
+    IPS2MSP0C22,
+    IPS2MSP0C23,
 
     NOTBZE2MSP0C0,
     NOTBZE2MSP0C1,
@@ -179,6 +215,18 @@ enum e_gsid
     NOTBZE2MSP0C9,
     NOTBZE2MSP0C10,
     NOTBZE2MSP0C11,
+    NOTBZE2MSP0C12,
+    NOTBZE2MSP0C13,
+    NOTBZE2MSP0C14,
+    NOTBZE2MSP0C15,
+    NOTBZE2MSP0C16,
+    NOTBZE2MSP0C17,
+    NOTBZE2MSP0C18,
+    NOTBZE2MSP0C19,
+    NOTBZE2MSP0C20,
+    NOTBZE2MSP0C21,
+    NOTBZE2MSP0C22,
+    NOTBZE2MSP0C23,
 
     NOTFIN2MSP0C0,
     NOTFIN2MSP0C1,
@@ -192,6 +240,18 @@ enum e_gsid
     NOTFIN2MSP0C9,
     NOTFIN2MSP0C10,
     NOTFIN2MSP0C11,
+    NOTFIN2MSP0C12,
+    NOTFIN2MSP0C13,
+    NOTFIN2MSP0C14,
+    NOTFIN2MSP0C15,
+    NOTFIN2MSP0C16,
+    NOTFIN2MSP0C17,
+    NOTFIN2MSP0C18,
+    NOTFIN2MSP0C19,
+    NOTFIN2MSP0C20,
+    NOTFIN2MSP0C21,
+    NOTFIN2MSP0C22,
+    NOTFIN2MSP0C23,
 
     SPURR2MSP0C0,
     SPURR2MSP0C1,
@@ -205,6 +265,18 @@ enum e_gsid
     SPURR2MSP0C9,
     SPURR2MSP0C10,
     SPURR2MSP0C11,
+    SPURR2MSP0C12,
+    SPURR2MSP0C13,
+    SPURR2MSP0C14,
+    SPURR2MSP0C15,
+    SPURR2MSP0C16,
+    SPURR2MSP0C17,
+    SPURR2MSP0C18,
+    SPURR2MSP0C19,
+    SPURR2MSP0C20,
+    SPURR2MSP0C21,
+    SPURR2MSP0C22,
+    SPURR2MSP0C23,
 
     TEMP4MSP0C0,
     TEMP4MSP0C1,
@@ -218,6 +290,18 @@ enum e_gsid
     TEMP4MSP0C9,
     TEMP4MSP0C10,
     TEMP4MSP0C11,
+    TEMP4MSP0C12,
+    TEMP4MSP0C13,
+    TEMP4MSP0C14,
+    TEMP4MSP0C15,
+    TEMP4MSP0C16,
+    TEMP4MSP0C17,
+    TEMP4MSP0C18,
+    TEMP4MSP0C19,
+    TEMP4MSP0C20,
+    TEMP4MSP0C21,
+    TEMP4MSP0C22,
+    TEMP4MSP0C23,
 
     UTIL2MSP0C0,
     UTIL2MSP0C1,
@@ -231,6 +315,18 @@ enum e_gsid
     UTIL2MSP0C9,
     UTIL2MSP0C10,
     UTIL2MSP0C11,
+    UTIL2MSP0C12,
+    UTIL2MSP0C13,
+    UTIL2MSP0C14,
+    UTIL2MSP0C15,
+    UTIL2MSP0C16,
+    UTIL2MSP0C17,
+    UTIL2MSP0C18,
+    UTIL2MSP0C19,
+    UTIL2MSP0C20,
+    UTIL2MSP0C21,
+    UTIL2MSP0C22,
+    UTIL2MSP0C23,
 
     NUTIL3SP0C0,
     NUTIL3SP0C1,
@@ -244,6 +340,18 @@ enum e_gsid
     NUTIL3SP0C9,
     NUTIL3SP0C10,
     NUTIL3SP0C11,
+    NUTIL3SP0C12,
+    NUTIL3SP0C13,
+    NUTIL3SP0C14,
+    NUTIL3SP0C15,
+    NUTIL3SP0C16,
+    NUTIL3SP0C17,
+    NUTIL3SP0C18,
+    NUTIL3SP0C19,
+    NUTIL3SP0C20,
+    NUTIL3SP0C21,
+    NUTIL3SP0C22,
+    NUTIL3SP0C23,
 
     MSTL2MSP0C0,
     MSTL2MSP0C1,
@@ -257,6 +365,18 @@ enum e_gsid
     MSTL2MSP0C9,
     MSTL2MSP0C10,
     MSTL2MSP0C11,
+    MSTL2MSP0C12,
+    MSTL2MSP0C13,
+    MSTL2MSP0C14,
+    MSTL2MSP0C15,
+    MSTL2MSP0C16,
+    MSTL2MSP0C17,
+    MSTL2MSP0C18,
+    MSTL2MSP0C19,
+    MSTL2MSP0C20,
+    MSTL2MSP0C21,
+    MSTL2MSP0C22,
+    MSTL2MSP0C23,
 
     CMT2MSP0C0,
     CMT2MSP0C1,
@@ -270,6 +390,18 @@ enum e_gsid
     CMT2MSP0C9,
     CMT2MSP0C10,
     CMT2MSP0C11,
+    CMT2MSP0C12,
+    CMT2MSP0C13,
+    CMT2MSP0C14,
+    CMT2MSP0C15,
+    CMT2MSP0C16,
+    CMT2MSP0C17,
+    CMT2MSP0C18,
+    CMT2MSP0C19,
+    CMT2MSP0C20,
+    CMT2MSP0C21,
+    CMT2MSP0C22,
+    CMT2MSP0C23,
 
 
     CMBW2MSP0C0,
@@ -284,6 +416,18 @@ enum e_gsid
     CMBW2MSP0C9,
     CMBW2MSP0C10,
     CMBW2MSP0C11,
+    CMBW2MSP0C12,
+    CMBW2MSP0C13,
+    CMBW2MSP0C14,
+    CMBW2MSP0C15,
+    CMBW2MSP0C16,
+    CMBW2MSP0C17,
+    CMBW2MSP0C18,
+    CMBW2MSP0C19,
+    CMBW2MSP0C20,
+    CMBW2MSP0C21,
+    CMBW2MSP0C22,
+    CMBW2MSP0C23,
 
     PPICP0C0,
     PPICP0C1,
@@ -297,6 +441,18 @@ enum e_gsid
     PPICP0C9,
     PPICP0C10,
     PPICP0C11,
+    PPICP0C12,
+    PPICP0C13,
+    PPICP0C14,
+    PPICP0C15,
+    PPICP0C16,
+    PPICP0C17,
+    PPICP0C18,
+    PPICP0C19,
+    PPICP0C20,
+    PPICP0C21,
+    PPICP0C22,
+    PPICP0C23,
 
     PWRPX250USP0C0,
     PWRPX250USP0C1,
@@ -310,6 +466,18 @@ enum e_gsid
     PWRPX250USP0C9,
     PWRPX250USP0C10,
     PWRPX250USP0C11,
+    PWRPX250USP0C12,
+    PWRPX250USP0C13,
+    PWRPX250USP0C14,
+    PWRPX250USP0C15,
+    PWRPX250USP0C16,
+    PWRPX250USP0C17,
+    PWRPX250USP0C18,
+    PWRPX250USP0C19,
+    PWRPX250USP0C20,
+    PWRPX250USP0C21,
+    PWRPX250USP0C22,
+    PWRPX250USP0C23,
 
     // ------------------------------------------------------
     // Regulator Sensors
diff --git a/src/occ_405/sensor/sensor_table.c b/src/occ_405/sensor/sensor_table.c
index 8df70d0..c4978e1 100755
--- a/src/occ_405/sensor/sensor_table.c
+++ b/src/occ_405/sensor/sensor_table.c
@@ -44,7 +44,7 @@ extern amec_sys_t g_amec_sys;
 #define SENSOR_W_CENTAUR_NUM(sensor_name, memc,cent,pp) SENSOR_W_CENTAUR_NUM_HELPER(sensor_name,memc,C,cent,P,pp)
 
 // Will define a set of "core sensor pointers" by passing in base sensor name
-// and ptr to [0] entry of array of 12 core sensors
+// and ptr to [0] entry of array of 24 core sensors
 #define CORE_SENSOR_PTRS(sensor,ptrbase,ptrmember) \
   [SENSOR_W_NUM(sensor, 0)] = ptrbase[ 0].ptrmember, \
   [SENSOR_W_NUM(sensor, 1)] = ptrbase[ 1].ptrmember, \
@@ -57,7 +57,19 @@ extern amec_sys_t g_amec_sys;
   [SENSOR_W_NUM(sensor, 8)] = ptrbase[ 8].ptrmember, \
   [SENSOR_W_NUM(sensor, 9)] = ptrbase[ 9].ptrmember, \
   [SENSOR_W_NUM(sensor,10)] = ptrbase[10].ptrmember, \
-  [SENSOR_W_NUM(sensor,11)] = ptrbase[11].ptrmember
+  [SENSOR_W_NUM(sensor,11)] = ptrbase[11].ptrmember, \
+  [SENSOR_W_NUM(sensor,12)] = ptrbase[12].ptrmember, \
+  [SENSOR_W_NUM(sensor,13)] = ptrbase[13].ptrmember, \
+  [SENSOR_W_NUM(sensor,14)] = ptrbase[14].ptrmember, \
+  [SENSOR_W_NUM(sensor,15)] = ptrbase[15].ptrmember, \
+  [SENSOR_W_NUM(sensor,16)] = ptrbase[16].ptrmember, \
+  [SENSOR_W_NUM(sensor,17)] = ptrbase[17].ptrmember, \
+  [SENSOR_W_NUM(sensor,18)] = ptrbase[18].ptrmember, \
+  [SENSOR_W_NUM(sensor,19)] = ptrbase[19].ptrmember, \
+  [SENSOR_W_NUM(sensor,20)] = ptrbase[20].ptrmember, \
+  [SENSOR_W_NUM(sensor,21)] = ptrbase[21].ptrmember, \
+  [SENSOR_W_NUM(sensor,22)] = ptrbase[22].ptrmember, \
+  [SENSOR_W_NUM(sensor,23)] = ptrbase[23].ptrmember
 
 // Will define a set of "memory controller sensor pointers" by passing in
 // base sensor nameand ptr to [0] entry of array of 8 memcontroller sensors
@@ -110,7 +122,19 @@ extern amec_sys_t g_amec_sys;
   [SENSOR_W_NUM(sensor, 8)] = ptr[ 8], \
   [SENSOR_W_NUM(sensor, 9)] = ptr[ 9], \
   [SENSOR_W_NUM(sensor,10)] = ptr[10], \
-  [SENSOR_W_NUM(sensor,11)] = ptr[11]
+  [SENSOR_W_NUM(sensor,11)] = ptr[11], \
+  [SENSOR_W_NUM(sensor,12)] = ptr[12], \
+  [SENSOR_W_NUM(sensor,13)] = ptr[13], \
+  [SENSOR_W_NUM(sensor,14)] = ptr[14], \
+  [SENSOR_W_NUM(sensor,15)] = ptr[15], \
+  [SENSOR_W_NUM(sensor,16)] = ptr[16], \
+  [SENSOR_W_NUM(sensor,17)] = ptr[17], \
+  [SENSOR_W_NUM(sensor,18)] = ptr[18], \
+  [SENSOR_W_NUM(sensor,19)] = ptr[19], \
+  [SENSOR_W_NUM(sensor,20)] = ptr[20], \
+  [SENSOR_W_NUM(sensor,21)] = ptr[21], \
+  [SENSOR_W_NUM(sensor,22)] = ptr[22], \
+  [SENSOR_W_NUM(sensor,23)] = ptr[23]
 
 // Will define a set of "core mini-sensor pointers" as NULL, since not
 // every sensor must have a mini-sensor.
@@ -126,7 +150,19 @@ extern amec_sys_t g_amec_sys;
   [SENSOR_W_NUM(sensor, 8)] = NULL, \
   [SENSOR_W_NUM(sensor, 9)] = NULL, \
   [SENSOR_W_NUM(sensor,10)] = NULL, \
-  [SENSOR_W_NUM(sensor,11)] = NULL
+  [SENSOR_W_NUM(sensor,11)] = NULL, \
+  [SENSOR_W_NUM(sensor,12)] = NULL, \
+  [SENSOR_W_NUM(sensor,13)] = NULL, \
+  [SENSOR_W_NUM(sensor,14)] = NULL, \
+  [SENSOR_W_NUM(sensor,15)] = NULL, \
+  [SENSOR_W_NUM(sensor,16)] = NULL, \
+  [SENSOR_W_NUM(sensor,17)] = NULL, \
+  [SENSOR_W_NUM(sensor,18)] = NULL, \
+  [SENSOR_W_NUM(sensor,19)] = NULL, \
+  [SENSOR_W_NUM(sensor,20)] = NULL, \
+  [SENSOR_W_NUM(sensor,21)] = NULL, \
+  [SENSOR_W_NUM(sensor,22)] = NULL, \
+  [SENSOR_W_NUM(sensor,23)] = NULL
 
 // Will define a set of "memory controller mini sensor ptrs" by passing in
 // base sensor nameand ptr to [0] entry of array of 8 memcontroller sensors
@@ -283,7 +319,7 @@ const sensor_ptr_t G_amec_sensor_list[] =
   SENSOR_PTR( VRHOT250USPROC,       &g_amec_sys.sys.vrhot250usproc),
 
   // ------------------------------------------------------
-  // Core Sensors (12 of each)
+  // Core Sensors (24 of each)
   // ------------------------------------------------------
   CORE_SENSOR_PTRS( FREQ250USP0C ,  &g_amec_sys.proc[0].core, freq250us),
   CORE_SENSOR_PTRS( FREQA2MSP0C ,   &g_amec_sys.proc[0].core, freqa2ms),
@@ -435,7 +471,7 @@ const minisensor_ptr_t G_amec_mini_sensor_list[] INIT_SECTION =
   MINI_SENSOR_PTR( VRHOT250USPROC,  NULL),
 
   // ------------------------------------------------------
-  // Core Sensors (12 of each)
+  // Core Sensors (24 of each)
   // ------------------------------------------------------
   CORE_MINI_SENSOR_PTRS_NULL(  FREQ250USP0C ),
   CORE_MINI_SENSOR_PTRS_NULL(   FREQA2MSP0C ),
diff --git a/src/occ_405/trac/trac.h b/src/occ_405/trac/trac.h
index bec77b3..dad0ad4 100755
--- a/src/occ_405/trac/trac.h
+++ b/src/occ_405/trac/trac.h
@@ -50,7 +50,6 @@
 #define MAIN_MRK        "MAIN: "
 #define CMDH_MRK        "CMDH: "
 #define DCOM_MRK        "DCOM: "
-#define APLT_MRK        "APLT: "
 #define INTR_MRK        "INTR: "
 #define SNPS_MRK        "SNPS: "
 
@@ -208,16 +207,6 @@ extern void dumpHexString(const void *i_data, const unsigned int len, const char
   #define AMEC_DBG_HEXDUMP(data, len, string)
 #endif
 
-#ifdef APLT_DEBUG
-  #define APLT_DBG(frmt,args...)  \
-          DBG_PRINT(frmt,##args)
-  #define APLT_DBG_HEXDUMP(data, len, string)  \
-          DEBUG_HEXDUMP(data, len, string)
-#else
-  #define APLT_DBG(frmt,args...)
-  #define APLT_DBG_HEXDUMP(data, len, string)
-#endif
-
 #ifdef DCOM_DEBUG
   #define DCOM_DBG(frmt,args...)  \
           DBG_PRINT(frmt,##args)
@@ -288,6 +277,16 @@ extern void dumpHexString(const void *i_data, const unsigned int len, const char
   #define TMER_DBG_HEXDUMP(data, len, string)
 #endif
 
+#ifdef CNFG_DEBUG
+  #define CNFG_DBG(frmt,args...)  \
+          DBG_PRINT(frmt,##args)
+  #define CNFG_DBG_HEXDUMP(data, len, string)  \
+          DEBUG_HEXDUMP(data, len, string)
+#else
+  #define CNFG_DBG(frmt,args...)
+  #define CNFG_DBG_HEXDUMP(data, len, string)
+#endif
+
 #else // NO_TRAC_STRINGS
 
 #define TRAC_ERR(frmt,args...)
@@ -299,7 +298,6 @@ extern void dumpHexString(const void *i_data, const unsigned int len, const char
 #define PROC_DBG(frmt,args...)
 #define THRD_DBG(frmt,args...)
 #define AMEC_DBG(frmt,args...)
-#define APLT_DBG(frmt,args...)
 #define DCOM_DBG(frmt,args...)
 #define ERRL_DBG(frmt,args...)
 #define CENT_DBG(frmt,args...)
@@ -308,13 +306,13 @@ extern void dumpHexString(const void *i_data, const unsigned int len, const char
 #define DPSS_DBG(frmt,args...)
 #define SNSR_DBG(frmt,args...)
 #define TMER_DBG(frmt,args...)
+#define CNFG_DBG(frmt,args...)
 
 #define MAIN_DBG_HEXDUMP(frmt,args...)
 #define RTLS_DBG_HEXDUMP(frmt,args...)
 #define PROC_DBG_HEXDUMP(frmt,args...)
 #define THRD_DBG_HEXDUMP(frmt,args...)
 #define AMEC_DBG_HEXDUMP(frmt,args...)
-#define APLT_DBG_HEXDUMP(frmt,args...)
 #define DCOM_DBG_HEXDUMP(frmt,args...)
 #define ERRL_DBG_HEXDUMP(frmt,args...)
 #define CENT_DBG_HEXDUMP(frmt,args...)
@@ -323,6 +321,7 @@ extern void dumpHexString(const void *i_data, const unsigned int len, const char
 #define DPSS_DBG_HEXDUMP(frmt,args...)
 #define SNSR_DBG_HEXDUMP(frmt,args...)
 #define TMER_DBG_HEXDUMP(frmt,args...)
+#define CNFG_DBG_HEXDUMP(frmt,args...)
 
 #endif