OCC GPE0: HWP to read Core/Quad DTS

Updating the code with HWP, simulated under simics with core and quad
DTSs, and verified trace results.

Change-Id: I914d65687f7c26d7073edae846de6a2c6f84cc02
RTC: 140095
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22929
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Tested-by: Wael Elessawy <welessa@us.ibm.com>

3 files changed, 55 insertions, 68 deletions

diff --git a/src/include/core_data.h b/src/include/core_data.h
index fbc0e8e..3a8ce66 100644
--- a/src/include/core_data.h
+++ b/src/include/core_data.h
@@ -1,25 +1,19 @@
 /* IBM_PROLOG_BEGIN_TAG                                                   */
 /* This is an automatically generated prolog.                             */
 /*                                                                        */
-/* $Source: src/include/core_data.h $                                     */
+/* $Source: chips/p9/procedures/lib/pm/core_data.h $                      */
 /*                                                                        */
-/* OpenPOWER OnChipController Project                                     */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015                             */
-/* [+] International Business Machines Corp.                              */
+/* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
+/* EKB Project                                                            */
 /*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
+/* COPYRIGHT 2015                                                         */
+/* [+] International Business Machines Corp.                              */
 /*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
 /*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
 
@@ -40,11 +34,9 @@
 
 #include <stdint.h>
 
-// TODO RTC 141391 Define this in sensor_register_addresses.h
 #define THERM_DTS_RESULT    0x00050000
 
 
-// TODO RTC 141391 This probably needs to be in firmware regs
 typedef union dts_sensor_result_reg
 {
     uint64_t value;
@@ -122,20 +114,6 @@ typedef struct
     sensor_result_t reserved;
 } CoreDataDts;
 
-// TODO can this section be removed?
-typedef struct
-{
-    uint32_t unused;
-    uint32_t tod_2mhz;
-    //power_management_control_reg_t pmcr;    // not used in P8
-
-    //pmsr not needed in P9 as info available from PGPE
-    //power_management_status_reg_t pmsr;
-
-    // pm_history moved to STOP HISTORY in P9
-    //ppm_pmstatehistocc_reg_t pm_history;
-} CoreDataPcbSlave;
-
 
 //
 // The instance of this data object must be 8 byte aligned
@@ -147,9 +125,12 @@ typedef struct
     CoreDataThrottle           throttle;                //24
     CoreDataPerThread          per_thread[8];           //24 * 8
     CoreDataDts                dts;                     //16
-    CoreDataPcbSlave           pcb_slave;               //16
 } CoreData;
 
+#ifdef __cplusplus
+extern "C"
+{
+#endif
 
 /**
  * Get core data
@@ -157,7 +138,10 @@ typedef struct
  * @param[out] Data pointer for the result
  * @return result of scom operation
  */
-
 uint32_t  get_core_data(uint32_t i_core, CoreData* o_data);
 
+#ifdef __cplusplus
+};
+#endif
 #endif  /* __GPE_CORE_DATA_H__ */
+
diff --git a/src/occ_405/proc/proc_data.c b/src/occ_405/proc/proc_data.c
index 82ea53e..09073f9 100755
--- a/src/occ_405/proc/proc_data.c
+++ b/src/occ_405/proc/proc_data.c
@@ -449,9 +449,15 @@ void print_core_data_sensors(uint8_t core)
     {
         PROC_DBG("-------------------------------");
         PROC_DBG("Core [%d] Sensors Data", core);
-        PROC_DBG("Sensor Core[0] reading: 0x%04X [Valid:%d]", l_core_data->dts.core[0].fields.reading, l_core_data->dts.core[0].fields.valid);
-        PROC_DBG("Sensor Core[1] reading: 0x%04X [Valid:%d]", l_core_data->dts.core[1].fields.reading, l_core_data->dts.core[1].fields.valid);
-        PROC_DBG("Sensor Cache   reading: 0x%04X [Valid:%d]", l_core_data->dts.cache.fields.reading, l_core_data->dts.cache.fields.valid);
+        PROC_DBG("Sensor Core[0] reading: 0x%04X [Valid:%d][Spare:%d][Trip:%d]",
+                 l_core_data->dts.core[0].fields.reading, l_core_data->dts.core[0].fields.valid,
+                 l_core_data->dts.core[0].fields.spare, l_core_data->dts.core[0].fields.thermal_trip);
+        PROC_DBG("Sensor Core[1] reading: 0x%04X [Valid:%d][Spare:%d][Trip:%d]",
+                 l_core_data->dts.core[1].fields.reading, l_core_data->dts.core[1].fields.valid,
+                 l_core_data->dts.core[1].fields.spare, l_core_data->dts.core[1].fields.thermal_trip);
+        PROC_DBG("Sensor Cache   reading: 0x%04X [Valid:%d][Spare:%d][Trip:%d]",
+                 l_core_data->dts.cache.fields.reading, l_core_data->dts.cache.fields.valid,
+                 l_core_data->dts.cache.fields.spare, l_core_data->dts.cache.fields.thermal_trip);
         // TODO: Commented these out b/c they take too long to run in task.
         //dumpHexString(&l_core_data->sensors_tod, sizeof(l_core_data->sensors_tod), "Sensor TOD");
         //dumpHexString(&l_core_data->sensors_v0, sizeof(l_core_data->sensors_v0), "Sensor VO");
diff --git a/src/occ_gpe0/core_data.c b/src/occ_gpe0/core_data.c
index 5bf37fb..7d119a9 100644
--- a/src/occ_gpe0/core_data.c
+++ b/src/occ_gpe0/core_data.c
@@ -1,27 +1,29 @@
 /* IBM_PROLOG_BEGIN_TAG                                                   */
 /* This is an automatically generated prolog.                             */
 /*                                                                        */
-/* $Source: src/occ_gpe0/core_data.c $                                    */
+/* $Source: chips/p9/procedures/lib/pm/core_data.c $                      */
 /*                                                                        */
-/* OpenPOWER OnChipController Project                                     */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015                             */
-/* [+] International Business Machines Corp.                              */
+/* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
+/* EKB Project                                                            */
 /*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
+/* COPYRIGHT 2015                                                         */
+/* [+] International Business Machines Corp.                              */
 /*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
 /*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
+/// \file core_data.c
+/// \brief The GPE program that collect raw data for DTS and EMPATH
+///
+//  *HWP HWP Owner: Doug Gilbert <dgilbert@us.ibm.com>
+//  *HWP FW Owner: Martha Broyles <mbroyles@us.ibm.com>
+//  *HWP Team: PM
+//  *HWP Level: 1
+//  *HWP Consumed by: OCC
 #include "core_data.h"
 #include "ppe42_scom.h"
 #include "p9_config.h"
@@ -30,31 +32,25 @@ uint32_t get_core_data(uint32_t i_core,
                        CoreData* o_data)
 {
     uint32_t rc = 0;
-/*    uint32_t size = sizeof(CoreData) / 8;
+    uint32_t size = sizeof(CoreData) / 8;
     uint64_t* ptr = (uint64_t*)o_data;
-    uint32_t i = 0;
-*/
-    // Fake Sensor Initialization for testing
-
-    o_data->dts.core[0].fields.reading = 0x200+i_core*2;
-    o_data->dts.core[1].fields.reading = 0x200+i_core*2+1;
-
-    o_data->dts.cache.fields.reading   = 0x100+i_core;
+    uint32_t coreSelect = CHIPLET_CORE_ID(i_core);
+    uint32_t quadSelect = CHIPLET_CACHE_ID((i_core / 4));
 
-    o_data->dts.core[0].fields.valid = 1;
-    o_data->dts.core[1].fields.valid = 1;
-    o_data->dts.cache.fields.valid   = 1;
+    uint32_t i;
 
+    for(i = 0; i < size; ++i)
+    {
+        ptr[i] = 0;
+    }
 
-    /*   TODO RTC 141391 - No simics support to test this yet.
-    uint32_t coreSelect = CHIPLET_CORE_ID(i_core);
-    uint32_t quadSelect = CHIPLET_CACHE_ID((i_core / 4));
     dts_sensor_result_reg_t scom_data;
 
-    rc = getscom(quadSelect,THERM_DTS_RESULT, &(scom_data.value));
+    rc = getscom(quadSelect, THERM_DTS_RESULT, &(scom_data.value));
+
     if(!rc)
     {
-        // Pick the sensor reading closest to core TODO check this!
+        // Pick the sensor reading closest to core
         // first two cores - use cache dts0
         // last two cores -  use cache dts1
         if(i_core & 0x00000002)
@@ -66,13 +62,14 @@ uint32_t get_core_data(uint32_t i_core,
             o_data->dts.cache.result = scom_data.half_words.reading[0];
         }
 
-        rc = getscom(coreSelect,THERM_DTS_RESULT, &(scom_data.value));
+        rc = getscom(coreSelect, THERM_DTS_RESULT, &(scom_data.value));
+
         if(!rc)
         {
             o_data->dts.core[0].result = scom_data.half_words.reading[0];
             o_data->dts.core[1].result = scom_data.half_words.reading[1];
         }
     }
-    */
+
     return rc;
 }