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authorAndres Lugo-Reyes <aalugore@us.ibm.com>2018-01-12 11:10:09 -0600
committerAndres A. Lugo-Reyes <aalugore@us.ibm.com>2018-01-19 17:13:09 -0500
commitc04d58bd549c17bece70aff18e6cb01af26feb26 (patch)
tree3a097e0e50154b0a98e5e91f9ad83e98e963c770
parent00123c66a1d23b3a4fca98528989d4e35550fd3d (diff)
downloadtalos-occ-c04d58bd549c17bece70aff18e6cb01af26feb26.tar.gz
talos-occ-c04d58bd549c17bece70aff18e6cb01af26feb26.zip
WOF Phase 2: Use Vratio from PGPE
-Also enable WOF resets to be sent to ZZ platforms Change-Id: I7054c69fc1f287ea5184f7bf8576d198735481f6 RTC:184983 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52272 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
-rwxr-xr-xsrc/occ_405/cmdh/cmdh_fsp_cmds.c58
-rwxr-xr-xsrc/occ_405/cmdh/cmdh_fsp_cmds.h29
-rw-r--r--src/occ_405/pgpe/pgpe_interface.c9
-rw-r--r--src/occ_405/pgpe/pgpe_shared.h6
-rwxr-xr-xsrc/occ_405/proc/proc_data_control.c17
-rw-r--r--src/occ_405/wof/wof.c70
-rw-r--r--src/occ_405/wof/wof.h5
7 files changed, 158 insertions, 36 deletions
diff --git a/src/occ_405/cmdh/cmdh_fsp_cmds.c b/src/occ_405/cmdh/cmdh_fsp_cmds.c
index b1205f2..996b534 100755
--- a/src/occ_405/cmdh/cmdh_fsp_cmds.c
+++ b/src/occ_405/cmdh/cmdh_fsp_cmds.c
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2011,2017 */
+/* Contributors Listed Below - COPYRIGHT 2011,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -99,6 +99,7 @@ uint8_t G_mst_tunable_parameter_overwrite = 0;
//Reverse association of channel to function.
uint8_t G_apss_ch_to_function[MAX_APSS_ADC_CHANNELS] = {0};
+uint16_t G_allow_trace_flags = 0x0000;
ERRL_RC cmdh_poll_v20 (cmdh_fsp_rsp_t * i_rsp_ptr);
@@ -1413,6 +1414,57 @@ void cmdh_dbug_dump_wof_data( const cmdh_fsp_cmd_t * i_cmd_ptr,
// Function Specification
//
+// Name: cmdh_dbug_allow_trace
+//
+// Description: Set/Clear flags that allow/prevent certain traces to appear
+//
+// End Function Specification
+void cmdh_dbug_allow_trace( const cmdh_fsp_cmd_t * i_cmd_ptr,
+ cmdh_fsp_rsp_t * o_rsp_ptr )
+{
+ const cmdh_dbug_allow_trace_cmd_t * l_cmd_ptr =
+ (cmdh_dbug_allow_trace_cmd_t*)i_cmd_ptr;
+ cmdh_dbug_allow_trace_rsp_t * l_rsp_ptr =
+ (cmdh_dbug_allow_trace_rsp_t*)o_rsp_ptr;
+
+ uint8_t l_rc = ERRL_RC_SUCCESS;
+ uint16_t l_resp_data_length = sizeof(G_allow_trace_flags);
+
+ if((NULL == l_cmd_ptr) || (NULL == l_rsp_ptr))
+ {
+ l_rc = ERRL_RC_INTERNAL_FAIL;
+ }
+ else
+ {
+ if( l_cmd_ptr->action == SET )
+ {
+ G_allow_trace_flags |= l_cmd_ptr->trace_flags;
+ }
+ else
+ {
+ G_allow_trace_flags = 0x0000;
+ }
+ }
+
+ TRAC_INFO("DEBUG - allow_trace FLAGS 0x%04x Action: %d",
+ G_allow_trace_flags,
+ l_cmd_ptr->action);
+
+ // fill in response data length
+ if( l_rsp_ptr != NULL )
+ {
+ l_rsp_ptr->data_length[0] = CONVERT_UINT16_UINT8_HIGH(l_resp_data_length);
+ l_rsp_ptr->data_length[1] = CONVERT_UINT16_UINT8_LOW(l_resp_data_length);
+ }
+ G_rsp_status = l_rc;
+ return;
+}
+
+
+
+
+// Function Specification
+//
// Name: cmdh_dbug_clear_ame_sensor
//
// Description: Clears minimum and maximum fields in one sensor.
@@ -1594,6 +1646,10 @@ void cmdh_dbug_cmd (const cmdh_fsp_cmd_t * i_cmd_ptr,
cmdh_dbug_dump_wof_data(i_cmd_ptr, o_rsp_ptr);
break;
+ case DBUG_ALLOW_TRACE:
+ cmdh_dbug_allow_trace( i_cmd_ptr, o_rsp_ptr );
+ break;
+
case DBUG_POKE:
case DBUG_SET_PEXE_EVENT:
case DBUG_DUMP_THEMAL:
diff --git a/src/occ_405/cmdh/cmdh_fsp_cmds.h b/src/occ_405/cmdh/cmdh_fsp_cmds.h
index ae85339..c318e7b 100755
--- a/src/occ_405/cmdh/cmdh_fsp_cmds.h
+++ b/src/occ_405/cmdh/cmdh_fsp_cmds.h
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2011,2017 */
+/* Contributors Listed Below - COPYRIGHT 2011,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -374,9 +374,10 @@ typedef struct __attribute__ ((packed)) cmdh_reset_prep
typedef enum
{
DBUG_DUMP_WOF_DATA = 0x01,
+ // free = 0x02
DBUG_GET_TRACE = 0x03,
DBUG_CLEAR_TRACE = 0x04,
- // free = 0x05
+ DBUG_ALLOW_TRACE = 0x05,
DBUG_SET_PEXE_EVENT = 0x06,
DBUG_GET_AME_SENSOR = 0x07,
DBUG_DUMP_GPU_TIMINGS = 0x08,
@@ -389,7 +390,11 @@ typedef enum
DBUG_MEM_PWR_CTL = 0x0F,
DBUG_PERFCOUNT = 0x10,
DBUG_TEST_INTF = 0x11,
+ // free = 0x12
+ // free = 0x13
DBUG_INJECT_ERRL = 0x14,
+ // free = 0x15
+ // free = 0x16
DBUG_GPIO_READ = 0x17,
DBUG_FSP_ATTN = 0x18,
DBUG_CALCULATE_MAX_DIFF = 0x19,
@@ -398,7 +403,7 @@ typedef enum
DBUG_INJECT_ERR = 0x1C,
DBUG_VERIFY_V_F = 0x1D,
DBUG_DUMP_PPM_DATA = 0x1E,
-
+ // free = 0x1F
DBUG_FLUSH_DCACHE = 0x20,
DBUG_INVALIDATE_DCACHE = 0x21,
DBUG_CENTAUR_SENSOR_CACHE = 0x22,
@@ -574,6 +579,24 @@ typedef struct __attribute__ ((packed))
uint32_t wof_disabled;
uint8_t checksum[CMDH_FSP_CHECKSUM_SIZE];
} cmdh_dbug_wof_control_rsp_t;
+
+// DBUG_ALLOW_TRACE command struct
+typedef struct __attribute__ ((packed))
+{
+ struct cmdh_fsp_cmd_header;
+ uint8_t sub_cmd;
+ uint8_t action;
+ uint16_t trace_flags;
+}cmdh_dbug_allow_trace_cmd_t;
+
+// DBUG_ALLOW_TRACE response struct
+typedef struct __attribute__ ((packed))
+{
+ struct cmdh_fsp_rsp_header;
+ uint16_t trace_flags;
+ uint8_t checksum[CMDH_FSP_CHECKSUM_SIZE];
+}cmdh_dbug_allow_trace_rsp_t;
+
//---------------------------------------------------------
// Tunable Parameter Command
//---------------------------------------------------------
diff --git a/src/occ_405/pgpe/pgpe_interface.c b/src/occ_405/pgpe/pgpe_interface.c
index 13e1957..36d740c 100644
--- a/src/occ_405/pgpe/pgpe_interface.c
+++ b/src/occ_405/pgpe/pgpe_interface.c
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2011,2017 */
+/* Contributors Listed Below - COPYRIGHT 2011,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -36,6 +36,7 @@
#include "occ_sys_config.h"
#include "ssx.h"
#include "wof.h"
+#include "pgpe_shared.h"
#include "amec_sys.h"
#include "common.h" // For ignore_pgpe_error()
@@ -50,6 +51,7 @@ extern uint32_t G_present_cores;
extern bool G_simics_environment;
+extern uint8_t G_allow_trace_flags;
// IPC GPE Requests
GpeRequest G_clip_update_req;
GpeRequest G_pmcr_set_req;
@@ -654,9 +656,12 @@ int pgpe_clip_update(void)
}
else
{
- TRAC_INFO("pgpe_clip_update: Scheduling clip update: min[0x%02X], max[0x%08X%04X]",
+ if(G_allow_trace_flags & PGPE_ALLOW_CLIP_TRACE)
+ {
+ TRAC_INFO("pgpe_clip_update: Scheduling clip update: min[0x%02X], max[0x%08X%04X]",
G_clip_update_parms.ps_val_clip_min[0],
WORD_HIGH(pstate_list), WORD_LOW(pstate_list)>>16);
+ }
}
L_last_list = pstate_list;
}
diff --git a/src/occ_405/pgpe/pgpe_shared.h b/src/occ_405/pgpe/pgpe_shared.h
index 39db1ab..3003af4 100644
--- a/src/occ_405/pgpe/pgpe_shared.h
+++ b/src/occ_405/pgpe/pgpe_shared.h
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2011,2017 */
+/* Contributors Listed Below - COPYRIGHT 2011,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -43,6 +43,10 @@
#define PGPE_WOF_TBLS_ADDR_OFFSET 0x58
#define PGPE_WOF_TBLS_LEN_OFFSET 0x5C
+// PGPE Command Trace Masks
+#define PGPE_ALLOW_PMCR_TRACE 0x0001
+#define PGPE_ALLOW_CLIP_TRACE 0x0002
+#define PGPE_ALLOW_VFRT_TRACE 0x0004
// This size must be a multiple of 128
typedef struct __attribute__ ((packed))
diff --git a/src/occ_405/proc/proc_data_control.c b/src/occ_405/proc/proc_data_control.c
index ebd907d..a52cfac 100755
--- a/src/occ_405/proc/proc_data_control.c
+++ b/src/occ_405/proc/proc_data_control.c
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2011,2017 */
+/* Contributors Listed Below - COPYRIGHT 2011,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -37,6 +37,7 @@
#include "occ_sys_config.h"
#include "p9_pstates_common.h"
#include "pgpe_interface.h"
+#include "pgpe_shared.h"
#include "rtls_service_codes.h"
#include "proc_pstate.h"
#include "occ_util.h"
@@ -55,6 +56,7 @@ extern GpeRequest G_pmcr_set_req;
extern bool G_state_transition_occuring; // A state transition is currently going on?
+extern uint8_t G_allow_trace_flags;
// a global flag used by task_core_data_control() to indicate
// that the OCC is ready to transition to observation state
// (after initiatibg a clip update IPC task if needed)
@@ -121,7 +123,10 @@ void task_core_data_control( task_t * i_task )
// pclip of highest quad frequency corresponds to a frequency higher than legacy turbo
if(pclip < l_pstate)
{
- TRAC_INFO("task_core_data_control: updating clip max to pstate 0x%02X (from 0x%02X)", l_pstate, pclip);
+ if( G_allow_trace_flags & PGPE_ALLOW_CLIP_TRACE )
+ {
+ TRAC_INFO("task_core_data_control: updating clip max to pstate 0x%02X (from 0x%02X)", l_pstate, pclip);
+ }
// set the all quads to same pstate
memset(G_desired_pstate, l_pstate, MAXIMUM_QUADS);
//call PGPE IPC function to update the clips
@@ -192,8 +197,12 @@ void task_core_data_control( task_t * i_task )
if (L_last != pstateList)
{
L_last = pstateList;
- TRAC_INFO("task_core_data_control: calling pmcr_set() w/pstates: 0x%08X%04X",
- WORD_HIGH(pstateList), WORD_LOW(pstateList)>>16);
+
+ if( G_allow_trace_flags & PGPE_ALLOW_PMCR_TRACE )
+ {
+ TRAC_INFO("task_core_data_control: calling pmcr_set() w/pstates: 0x%08X%04X",
+ WORD_HIGH(pstateList), WORD_LOW(pstateList)>>16);
+ }
//call PGPE IPC function to update Pstates
pgpe_pmcr_set();
}
diff --git a/src/occ_405/wof/wof.c b/src/occ_405/wof/wof.c
index 9d58239..68b2f5c 100644
--- a/src/occ_405/wof/wof.c
+++ b/src/occ_405/wof/wof.c
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2017 */
+/* Contributors Listed Below - COPYRIGHT 2016,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -739,10 +739,9 @@ void read_shared_sram( void )
g_wof->f_clip_freq = (proc_pstate2freq(g_wof->f_clip_ps))/1000;
g_wof->v_clip = l_wofstate.fields.vclip_mv;
-// g_wof->f_ratio = l_wofstate.fields.fratio;
-// g_wof->v_ratio = l_wofstate.fields.vratio;
+
+ g_wof->v_ratio = l_wofstate.fields.vratio;
g_wof->f_ratio = 1;
- g_wof->v_ratio = 1;
// Get the requested active quad update
read_req_active_quads();
@@ -1117,11 +1116,17 @@ void calculate_ceff_ratio_vdd( void )
// Get Vturbo and convert to 100uV (mV -> 100uV) = mV*10
// Multiply by Vratio
g_wof->c_ratio_vdd_volt =
- (G_oppb.operating_points[TURBO].vdd_mv*10) * g_wof->v_ratio;
+ multiply_ratio( (G_oppb.operating_points[TURBO].vdd_mv*10),
+ g_wof->v_ratio );
// Get Fturbo and multiply by Fratio
g_wof->c_ratio_vdd_freq =
G_oppb.operating_points[TURBO].frequency_mhz * g_wof->f_ratio;
+ /* TODO Uncomment once we use f_ratio from PGPE
+ g_wof->c_ratio_vdd_freq =
+ multiply_ratio( G_oppb.operating_points[TURBO].frequency_mhz,
+ g_wof->f_ratio );
+ */
// Calculate ceff_tdp_vdd
// iac_tdp_vdd / ((Vturbo*Vratio)^1.3 * (Fturbo*Fratio))
@@ -1191,6 +1196,25 @@ inline uint32_t core_powered_on(uint8_t i_core_num)
return ( g_wof->core_pwr_on & (0x80000000 >> i_core_num));
}
+/** multiply_ratio
+ *
+ * Description: Helper function to multiply V/F Ratio's by their
+ * operating point preserving the correct granularity
+ *
+ * Param[in]: i_operating_point - Operating point taken from the OPPB
+ * Param[in]: i_ratio - the V/F ratio taken from shared OCC-PGPE SRAM
+ *
+ * Return: Operating point * ratio
+ */
+inline uint32_t multiply_ratio( uint32_t i_operating_point,
+ uint32_t i_ratio )
+{
+ // We get i_ratio from the PGPE ranging from 0x0000 to 0xffff
+ // These hex values conceptually translate from 0.0 to 1.0
+ // Extra math is used to convert units to avoid floating point math.
+ return ((((i_ratio*10000)/0xFFFF) * i_operating_point) / 10000);
+}
+
/**
* num_cores_on_in_quad
*
@@ -1485,28 +1509,26 @@ void set_clear_wof_disabled( uint8_t i_action,
g_wof->wof_disabled,
i_bit_mask );
- // Reset if on OpenPower
- if( G_occ_interrupt_type != FSP_SUPPORTED_OCC )
+ // Reset if on Reason Code requires it.
+ if(i_bit_mask & ~(IGNORE_WOF_RESET) )
{
- if(i_bit_mask & ~(IGNORE_WOF_RESET) )
- {
- //Callout firmware
- addCalloutToErrl(l_errl,
- ERRL_CALLOUT_TYPE_COMPONENT_ID,
- ERRL_COMPONENT_ID_FIRMWARE,
- ERRL_CALLOUT_PRIORITY_HIGH);
-
- //Callout processor
- addCalloutToErrl(l_errl,
- ERRL_CALLOUT_TYPE_HUID,
- G_sysConfigData.proc_huid,
- ERRL_CALLOUT_PRIORITY_MED);
-
- REQUEST_WOF_RESET( l_errl );
- }
+ //Callout firmware
+ addCalloutToErrl(l_errl,
+ ERRL_CALLOUT_TYPE_COMPONENT_ID,
+ ERRL_COMPONENT_ID_FIRMWARE,
+ ERRL_CALLOUT_PRIORITY_HIGH);
+
+ //Callout processor
+ addCalloutToErrl(l_errl,
+ ERRL_CALLOUT_TYPE_HUID,
+ G_sysConfigData.proc_huid,
+ ERRL_CALLOUT_PRIORITY_MED);
+
+ REQUEST_WOF_RESET( l_errl );
}
- else // Otherwise, just commit
+ else
{
+ // Just commit the error log
commitErrl( &l_errl );
}
diff --git a/src/occ_405/wof/wof.h b/src/occ_405/wof/wof.h
index 6d86e44..7d75bf1 100644
--- a/src/occ_405/wof/wof.h
+++ b/src/occ_405/wof/wof.h
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2017 */
+/* Contributors Listed Below - COPYRIGHT 2016,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -458,4 +458,7 @@ void print_oppb( void );
uint32_t prevent_over_current( uint32_t i_ceff_ratio );
void schedule_vfrt_request( void );
+
+inline uint32_t multiply_ratio( uint32_t i_operating_point,
+ uint32_t i_ratio );
#endif
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