Centaur SYNC required after changing throttle

Change-Id: I8bccc2a0971728d8d2582ba678de166c2591557a
CQ: SW426949
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58053
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>

6 files changed, 123 insertions, 55 deletions

diff --git a/src/common/centaur_configuration.h b/src/common/centaur_configuration.h
index 12b8072..65b556b 100644
--- a/src/common/centaur_configuration.h
+++ b/src/common/centaur_configuration.h
@@ -50,18 +50,13 @@ typedef struct
     /// APIs mb_id(), mb_chip_type() and mb_ec_level().
     centaur_device_id_t deviceId[OCCHW_NCENTAUR];
 
-    /// The image of the PBA slave control register to use for the SYNC command
-    ///
-    /// The PowerBus address used to accomplish a Centaur SYNC is
-    /// constant. To simplify the procedures the PBA slave control register
-    /// (containing the extended address portion of the address) is
-    /// pre-computed and stored here.
-    ///
+    /// Designated sync scom address
     /// \note One and Only one of the MCS units can be targeted with SYNC
     /// commands. The design includes a private bus connecting all MCS on the
     /// chip that allows this "SYNC master" to broadcast the SYNC to all other
-    /// MCS on the chip.  Currently not used in P9
-    pba_slvctln_t syncSlaveControl;
+    /// MCS on the chip.
+    uint32_t mcSyncAddr;
+    uint32_t reserved; // keep 8 byte aligned
 
     /// A GpePbaParms parameter block for gpe_mem_data()
     ///
@@ -177,8 +172,12 @@ typedef enum
     /// Centaur. Currently unsupported for gpe_scom_p8().
     CENTAUR_SCOM_RMW_ALL,
 
+    // Send Centaur SYNC to broadcast new throttle values.
+    CENTAUR_SCOM_CENTAUR_SYNC,
+
 }  centaur_scom_operation_t;
 
+#define MCS_MCSYNC_SYNC_GO 0x0000800000000000ull
 
 // BAR and PBA_SLAVE assigned to gpe1 centaur
 //  - @see POWER Energy Management Hcode/HWP spec
diff --git a/src/include/registers/p9_misc_scom_addresses.h b/src/include/registers/p9_misc_scom_addresses.h
index 4103d3b..7ce7684 100644
--- a/src/include/registers/p9_misc_scom_addresses.h
+++ b/src/include/registers/p9_misc_scom_addresses.h
@@ -30,6 +30,11 @@
 #define    MCS_3_MCRSVDE    0x0301088E
 #define    MCS_3_MCRSVDF    0x0301088F
 
+#define    MCS_0_MCSYNC     0x05010815
+#define    MCS_1_MCSYNC     0x05010895
+#define    MCS_2_MCSYNC     0x03010815
+#define    MCS_3_MCSYNC     0x03010895
+
 // MC Memory Configuration Register FIR/CFG
 #define    MCP_CHAN0_CHI_FIR        0x07010900
 #define    MCP_CHAN1_CHI_FIR        0x07010940
@@ -49,5 +54,4 @@
 #define    MCP_CHAN6_CHI_MCICFG1Q   0x0801098E
 #define    MCP_CHAN7_CHI_MCICFG1Q   0x080109CE
 
-
 #endif
diff --git a/src/occ_405/cent/centaur_control.c b/src/occ_405/cent/centaur_control.c
index 283a22b..e002bed 100755
--- a/src/occ_405/cent/centaur_control.c
+++ b/src/occ_405/cent/centaur_control.c
@@ -62,7 +62,8 @@ typedef enum
 {
   NM_THROTTLE_MBA01       = 0,
   NM_THROTTLE_MBA23       = 1,
-  NUM_CENT_THROTTLE_SCOMS = 2,
+  MBS_THROTTLE_SYNC       = 2,
+  NUM_CENT_THROTTLE_SCOMS = 3,
 } eCentaurThrottleRegs;
 
 
@@ -319,6 +320,8 @@ bool centaur_control( memory_control_task_t * i_memControlTask )
             G_centaurThrottle[NM_THROTTLE_MBA23].commandType = CENTAUR_SCOM_NOP;
         }
 
+        G_centaurThrottle[MBS_THROTTLE_SYNC].commandType = CENTAUR_SCOM_CENTAUR_SYNC;
+
         /// Set up GPE parameters
         l_parms->scomList     = G_centaurThrottle;
         l_parms->entries      = NUM_CENT_THROTTLE_SCOMS;
diff --git a/src/occ_405/occbuildname.c b/src/occ_405/occbuildname.c
index ac243eb..009e11b 100755
--- a/src/occ_405/occbuildname.c
+++ b/src/occ_405/occbuildname.c
@@ -34,6 +34,6 @@ volatile const char G_occ_buildname[16] __attribute__((section(".buildname"))) =
 
 #else
 
-volatile const char G_occ_buildname[16] __attribute__((section(".buildname"))) = /*<BuildName>*/  "op_occ_180503a\0"  /*</BuildName>*/ ;
+volatile const char G_occ_buildname[16] __attribute__((section(".buildname"))) = /*<BuildName>*/  "op_occ_180507a\0"  /*</BuildName>*/ ;
 
 #endif
diff --git a/src/occ_gpe1/gpe_centaur_configuration.c b/src/occ_gpe1/gpe_centaur_configuration.c
index fdf9927..b9866bb 100644
--- a/src/occ_gpe1/gpe_centaur_configuration.c
+++ b/src/occ_gpe1/gpe_centaur_configuration.c
@@ -50,6 +50,14 @@ const uint32_t MCFGPR[OCCHW_NCENTAUR] =
     MCS_3_MCRSVDF
 };
 
+const uint32_t MCSYNC[OCCHW_NCENTAUR/2] =
+{
+    MCS_0_MCSYNC,
+    MCS_1_MCSYNC,
+    MCS_2_MCSYNC,
+    MCS_3_MCSYNC
+};
+
 const uint32_t MCCHIFIR[OCCHW_NCENTAUR] =
 {
     MCP_CHAN0_CHI_FIR,
@@ -168,6 +176,7 @@ int gpe_centaur_configuration_create(CentaurConfiguration_t* o_config)
     uint64_t    bar = 0;
     uint64_t    mask = 0;
     uint64_t*   ptr = (uint64_t*)o_config;
+    int designated_sync = -1;
 
     // Prevent unwanted interrupts from scom errors
     const uint32_t orig_msr = mfmsr() & MSR_SEM;
@@ -220,8 +229,6 @@ int gpe_centaur_configuration_create(CentaurConfiguration_t* o_config)
 
         for (i = 0; i < OCCHW_NCENTAUR; ++i)
         {
-            uint64_t val64;
-
             // check for channel checkstop
             rc = check_channel_chkstp(i);
             if (rc)
@@ -244,15 +251,6 @@ int gpe_centaur_configuration_create(CentaurConfiguration_t* o_config)
                 continue;
             }
 
-            // TODO RTC 190643 ENGD work-around until change gets pushed up into a driver.
-            // Turn on bit 25 in mode0 regs. They should all have the same value
-            rc = getscom_abs(0x05010811, &val64);
-            val64 |= 0x0000004000000000ull;
-            rc = putscom_abs(0x05010811, val64);
-            rc = putscom_abs(0x05010891, val64);
-            rc = putscom_abs(0x03010811, val64);
-            rc = putscom_abs(0x03010891, val64);
-
             // If inband scom is not configured then assume the centaur does not exist
             if (!mcfgpr.fields.mcfgprq_valid)
             {
@@ -268,12 +266,6 @@ int gpe_centaur_configuration_create(CentaurConfiguration_t* o_config)
 
             PK_TRACE_DBG("Centar[%d] Base Address: %016llx",i,o_config->baseAddress[i]);
 
-
-            // NOTE: P9 no longer has a mode bit to specify a "designated SYNC"
-            // Centaur Spec says SYNC is needed for Z series, and for POR.
-            // Since neither applys here, it will not longer be done by OCC.
-
-
             // Add the Centaur to the configuration
             o_config->config |= (CHIP_CONFIG_MCS(i) | CHIP_CONFIG_CENTAUR(i));
         }
@@ -283,6 +275,32 @@ int gpe_centaur_configuration_create(CentaurConfiguration_t* o_config)
             break;
         }
 
+        // Find the designated sync
+        for (i = 0; i < (OCCHW_NCENTAUR/2); ++i)
+        {
+            uint64_t mcsync;
+            rc = getscom_abs(MCSYNC[i], &mcsync);
+            if (rc)
+            {
+                PK_TRACE("getscom failed on MCSYNC, rc = %d. The first configured MC will be the designated sync",rc);
+                rc = 0;
+            }
+            if (mcsync != 0)
+            {
+                designated_sync = i;
+                // There can only be one sync, so stop searching.
+                break;
+            }
+        }
+
+        if (designated_sync < 0)
+        {
+            designated_sync = cntlz32(o_config->config << CHIP_CONFIG_MCS_BASE);
+            PK_TRACE("No designated sync found, using MCS(%d)",designated_sync);
+        }
+
+        o_config->mcSyncAddr = MCSYNC[designated_sync];
+
 
         // Configure the PBA BAR and PBA BARMSK.
         // Set the BARMSK bits such that:
diff --git a/src/occ_gpe1/gpe_centaur_scom.c b/src/occ_gpe1/gpe_centaur_scom.c
index afe1d3b..4cd4cf5 100644
--- a/src/occ_gpe1/gpe_centaur_scom.c
+++ b/src/occ_gpe1/gpe_centaur_scom.c
@@ -536,15 +536,50 @@ int centaur_get_mem_data(CentaurConfiguration_t* i_config,
 }
 
 
-// CentaurConfiguration needs to be setup before this is called
+int centaur_scom_sync(CentaurConfiguration_t* i_config)
+{
+    uint64_t data;
+    int rc = 0;
+    do
+    {
+        rc = getscom_abs(i_config->mcSyncAddr,&data);
+        if (rc)
+        {
+            PK_TRACE("centaur_scom_sync: getscom failed. rc = %d",rc);
+            break;
+        }
+
+        data &= ~MCS_MCSYNC_SYNC_GO;
+
+        rc = putscom_abs(i_config->mcSyncAddr, data);
+        if (rc)
+        {
+            PK_TRACE("centaur_scom_sync: reset sync putscom failed. rc = %d",rc);
+            break;
+        }
+
+        data |= MCS_MCSYNC_SYNC_GO;
+
+        rc = putscom_abs(i_config->mcSyncAddr, data);
+        if (rc)
+        {
+            PK_TRACE("centaur_scom_sync: set sync putscom failed. rc = %d",rc);
+            break;
+        }
+    } while (0);
+
+    return rc;
+}
+
 
+// CentaurConfiguration needs to be setup before this is called
 void gpe_scom_centaur(CentaurConfiguration_t* i_config,
                       CentaurScomParms_t* i_parms)
 {
     int i;
+    int rc = 0;
     mtmsr((mfmsr() & ~(MSR_SIBRC | MSR_SIBRCA)) | MSR_SEM);
 
-    // Do reset and pba_setup here?
     for(i = 0; i < i_parms->entries; ++i)
     {
         switch(i_parms->scomList[i].commandType)
@@ -553,49 +588,58 @@ void gpe_scom_centaur(CentaurConfiguration_t* i_config,
                 break;
 
             case CENTAUR_SCOM_READ:
-                centaur_get_scom(i_config,
-                                 i_parms->scomList[i].instanceNumber,
-                                 i_parms->scomList[i].scom,
-                                 &(i_parms->scomList[i].data));
+                rc =centaur_get_scom(i_config,
+                                     i_parms->scomList[i].instanceNumber,
+                                     i_parms->scomList[i].scom,
+                                     &(i_parms->scomList[i].data));
                 break;
 
             case CENTAUR_SCOM_WRITE:
-                centaur_put_scom(i_config,
-                                 i_parms->scomList[i].instanceNumber,
-                                 i_parms->scomList[i].scom,
-                                 i_parms->scomList[i].data);
+                rc = centaur_put_scom(i_config,
+                                      i_parms->scomList[i].instanceNumber,
+                                      i_parms->scomList[i].scom,
+                                      i_parms->scomList[i].data);
                 break;
 
             case CENTAUR_SCOM_RMW:
-                centaur_scom_rmw(i_config,
-                                 i_parms->scomList[i].instanceNumber,
-                                 i_parms->scomList[i].scom,
-                                 i_parms->scomList[i].mask,
-                                 &(i_parms->scomList[i].data));
+                rc = centaur_scom_rmw(i_config,
+                                      i_parms->scomList[i].instanceNumber,
+                                      i_parms->scomList[i].scom,
+                                      i_parms->scomList[i].mask,
+                                      &(i_parms->scomList[i].data));
                 break;
 
             case CENTAUR_SCOM_READ_VECTOR:
-                centaur_get_scom_vector(i_config,
-                                        i_parms->scomList[i].scom,
-                                        i_parms->scomList[i].pData
-                                       );
+                rc = centaur_get_scom_vector(i_config,
+                                             i_parms->scomList[i].scom,
+                                             i_parms->scomList[i].pData
+                                            );
                 break;
 
             case CENTAUR_SCOM_WRITE_ALL:
-                centaur_put_scom_all(i_config,
-                                     i_parms->scomList[i].scom,
-                                     i_parms->scomList[i].data);
+                rc = centaur_put_scom_all(i_config,
+                                          i_parms->scomList[i].scom,
+                                          i_parms->scomList[i].data);
                 break;
 
             case CENTAUR_SCOM_RMW_ALL:
-                centaur_scom_rmw_all(i_config,
-                                     i_parms->scomList[i].scom,
-                                     i_parms->scomList[i].mask,
-                                     i_parms->scomList[i].data);
+                rc = centaur_scom_rmw_all(i_config,
+                                          i_parms->scomList[i].scom,
+                                          i_parms->scomList[i].mask,
+                                          i_parms->scomList[i].data);
+                break;
+
+            case CENTAUR_SCOM_CENTAUR_SYNC:
+                rc = centaur_scom_sync(i_config);
                 break;
 
             default:
                 break;
         };
+        i_parms->error.rc = rc;
+        if (rc)
+        {
+            break;
+        }
     }
 }