talos-occ/src/occ_405/dcom/dcom_thread.c, branch master

Characterization state meltbox support

2018-02-16T20:33:29+00:00

Prevent temperature timeout errors during state transition Misc state characterization and observation state change fixes Change-Id: Ideeaab96689b145ed960aef5743b8c3947e4ffeb Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53674 Tested-by: FSP CI Jenkins Reviewed-by: Andres A. Lugo-Reyes Reviewed-by: Christopher J. Cain

Fix excessive traces for BCE requests, slave data collection and opal updates

2017-07-19T21:07:26+00:00

Correct power cap information in OPAL shared memory Add non-zero error history counts to poll response Fix Characterization to Active State change failure Change-Id: I92b783b631e79786e6190a4def520fee32c2cc7c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43216 Tested-by: FSP CI Jenkins Reviewed-by: Christopher J. Cain Reviewed-by: William A. Bryan

dcom/ thread/ rtls/ TODO clean up

2016-12-15T20:49:58+00:00

Also moved files common to occ_405/, occ_gpe0/, occ_gpe1/, etc, to a new common directory to keep src/ clean Change-Id: Ib45d70d048a135832592953c955a325d20fa19ae RTC: 163363 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33640 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles Reviewed-by: William A. Bryan

OCC-OPAL Shared Memory Interface: Dynamic data updates

2016-11-17T15:09:22+00:00

update the following in OPAL shared memory when any of these pieces change: * OCC State * CPU Throttle status * memory throttle status * quick power drop * power shifting ratio * power cap type * Min power cap * Max power cap * current power cap *** When either throttle status bytes change alert OPAL of shared memory interface change via setting SCOM bits 3 in the ext_intr_reason field of OCC Misc register and bit 0 (core_ext_intr) to generate the interrupt. Change-Id: Ic88a38aba4b84fb247389e712da2e326c2cd9c53 RTC: 130202 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32688 Tested-by: FSP CI Jenkins Reviewed-by: Christopher J. Cain Reviewed-by: Martha Broyles Reviewed-by: Wael El-Essawy

Update SSX/PK time intervals

2016-11-02T19:40:37+00:00

RTC:163333 Change-Id: Ide9c51be81fa1e2bb076700203dbeb0b3f341e87 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32134 Tested-by: FSP CI Jenkins Reviewed-by: Wael El-Essawy Reviewed-by: Martha Broyles Reviewed-by: William A. Bryan

OCC Active state changes required for Simics

2016-10-14T21:14:58+00:00

Change-Id: Ic6e65bcddaefd5213042707feffcf1272133e532 RTC: 161266 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31190 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles Reviewed-by: William A. Bryan

Update SSX to latest in EKB

2016-06-13T23:18:11+00:00

RTC: 132999 Change-Id: I29478c074e3086e0bf09b402d55782e03cb1f787 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23394 Tested-by: FSP CI Jenkins Reviewed-by: Wael El-Essawy

Pstate Infrastructure & Support config data required for active state

2016-05-25T20:19:23+00:00

- Support all config data required for active state. - Set 'active ready' bit in poll response when all config data has been received. - Rewrite & rename proc_gpsm_pstate_initialize() - Delete GPSM, doesn't exist. - Put in TODO call PGPE to enable pstates this will also be telling PGPE how to set PMCR mode register (OCC control pstates or OPAL). - Initialize globals for fmax, fmin, pmax and mhz_per_pstate with temporary hard codes until PGPE is available. - Call to "proc_pstate_initialize()" moved to state transition to observation - Cleanup proc_freq2pstate() - rewrite amec_slv_freq_smh() - the calls to proc_set_core_bounds() and proc_set_core_pstate() will be replaced with 1 IPC call to the PGPE to set pmin/pmax given all cores or set pstate for all given cores. - Remove all DCM related code. Change-Id: I449d188b2cffc345afca19717dcbea037f159114 RTC:130224 RTC:150935 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23977 Tested-by: FSP CI Jenkins Reviewed-by: Wael El-Essawy

Fix Ping Pong and HOMER addresses, usign new P9 pba_region default value.

2016-05-13T16:42:50+00:00

The new P9 pba_region field in the PBA_MODE register is now 0b10 contrary to the P8 pba_region setting of 0b00. Addresses have been corrected for Ping Pong communications, HOMER Host Data, Sapphire Table, and HTMGT send and receive Buffers. Replaced Sapphire legacy term with OPAL. Defined COMMON_BASE_ADDRESS, and offset addresses relative to it. modified HOMER_HD_OFFSET, OCC_HTMGT_CMD_OFFSET_HOMER, OCC_HTMGT_RSP_OFFSET_HOMER, and OPAL_OFFSET_HOMER according to new P9 specifications. Change-Id: Ib233181c4ad1837b57c45144d1256b87799dc5bc Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24085 Tested-by: FSP CI Jenkins Reviewed-by: William A. Bryan Reviewed-by: Martha Broyles Reviewed-by: Wael El-Essawy

Enable state transition to observation

2015-12-15T20:39:03+00:00

Enabled DCOM thread RTC:140900 Change-Id: I857e2c4b2a15903ccddc2df5db910dddf155a8e5 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22658 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles Reviewed-by: Wael Elessawy