summaryrefslogtreecommitdiffstats
path: root/common/cmd_fpgad.c
blob: 1b25ed87475dd9aa7b0023ca0ff1822f2ffa1742 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
/*
 * (C) Copyright 2013
 * Dirk Eibach,  Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
 *
 * based on cmd_mem.c
 * (C) Copyright 2000
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <command.h>

#include <gdsys_fpga.h>

static uint	dp_last_fpga;
static uint	dp_last_addr;
static uint	dp_last_length = 0x40;

/*
 * FPGA Memory Display
 *
 * Syntax:
 *	fpgad {fpga} {addr} {len}
 */
#define DISP_LINE_LEN	16
int do_fpga_md(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	unsigned int k;
	unsigned int fpga;
	ulong	addr, length;
	int rc = 0;
	u16	linebuf[DISP_LINE_LEN/sizeof(u16)];

	/*
	 * We use the last specified parameters, unless new ones are
	 * entered.
	 */
	fpga = dp_last_fpga;
	addr = dp_last_addr;
	length = dp_last_length;

	if (argc < 3)
		return CMD_RET_USAGE;

	if ((flag & CMD_FLAG_REPEAT) == 0) {
		/*
		 * FPGA is specified since argc > 2
		 */
		fpga = simple_strtoul(argv[1], NULL, 16);

		/*
		 * Address is specified since argc > 2
		 */
		addr = simple_strtoul(argv[2], NULL, 16);

		/*
		 * If another parameter, it is the length to display.
		 * Length is the number of objects, not number of bytes.
		 */
		if (argc > 3)
			length = simple_strtoul(argv[3], NULL, 16);
	}

	/* Print the lines. */
	for (k = 0; k < DISP_LINE_LEN / sizeof(u16); ++k)
		fpga_get_reg(fpga, (u16 *)fpga_ptr[fpga] + k, k * sizeof(u16),
			     &linebuf[k]);
	print_buffer(addr, (void *)linebuf, sizeof(u16),
		     length, DISP_LINE_LEN / sizeof(u16));
	addr += sizeof(u16)*length;

	dp_last_fpga = fpga;
	dp_last_addr = addr;
	dp_last_length = length;
	return rc;
}

U_BOOT_CMD(
	fpgad,	4,	1,	do_fpga_md,
	"fpga register display",
	"fpga address [# of objects]"
);
OpenPOWER on IntegriCloud