summaryrefslogtreecommitdiffstats
path: root/board/matrix_vision/mergerbox/mergerbox.c
blob: 8616205af50e43fb85ab14f0bc529ab3dce9b489 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
/*
 * Copyright (C) 2007 Freescale Semiconductor, Inc.
 *
 * Copyright (C) 2011 Matrix Vision GmbH
 * Andre Schwarz <andre.schwarz@matrix-vision.de>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 */

#include <common.h>
#include <hwconfig.h>
#include <i2c.h>
#include <spi.h>
#include <asm/io.h>
#include <asm/fsl_mpc83xx_serdes.h>
#include <fdt_support.h>
#include <spd_sdram.h>
#include "mergerbox.h"
#include "fpga.h"
#include "../common/mv_common.h"

static void setup_serdes(void)
{
	fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
		FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
	fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX,
		FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
}

#if defined(CONFIG_SYS_DRAM_TEST)
int testdram(void)
{
	uint *pstart = (uint *) CONFIG_SYS_MEMTEST_START;
	uint *pend = (uint *) CONFIG_SYS_MEMTEST_END;
	uint *p;

	printf("Testing DRAM from 0x%08x to 0x%08x\n",
		CONFIG_SYS_MEMTEST_START, CONFIG_SYS_MEMTEST_END);

	printf("DRAM test phase 1:\n");
	for (p = pstart; p < pend; p++)
		*p = 0xaaaaaaaa;

	for (p = pstart; p < pend; p++) {
		if (*p != 0xaaaaaaaa) {
			printf("DRAM test fails at: %08x\n", (uint) p);
			return 1;
		}
	}

	printf("DRAM test phase 2:\n");
	for (p = pstart; p < pend; p++)
		*p = 0x55555555;

	for (p = pstart; p < pend; p++) {
		if (*p != 0x55555555) {
			printf("DRAM test fails at: %08x\n", (uint) p);
			return 1;
		}
	}

	printf("DRAM test passed.\n");
	return 0;
}
#endif

phys_size_t initdram(int board_type)
{
	u32 msize;

	volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
	volatile clk83xx_t *clk = (clk83xx_t *)&immr->clk;

	/* Enable PCI_CLK[0:1] */
	clk->occr |= 0xc0000000;
	udelay(2000);

#if defined(CONFIG_SPD_EEPROM)
	msize = spd_sdram();
#else
	immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
	u32 msize_log2;

	msize = CONFIG_SYS_DDR_SIZE;
	msize_log2 = __ilog2(msize);

	im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000;
	im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1);

	im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR_VALUE;
	udelay(50000);

	im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL;
	udelay(1000);

	im->ddr.csbnds[0].csbnds = CONFIG_SYS_DDR_CS0_BNDS;
	im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG;
	udelay(1000);

	im->ddr.timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0;
	im->ddr.timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1;
	im->ddr.timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2;
	im->ddr.timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3;
	im->ddr.sdram_cfg = CONFIG_SYS_DDR_SDRAM_CFG;
	im->ddr.sdram_cfg2 = CONFIG_SYS_DDR_SDRAM_CFG2;
	im->ddr.sdram_mode = CONFIG_SYS_DDR_MODE;
	im->ddr.sdram_mode2 = CONFIG_SYS_DDR_MODE2;
	im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL;
	__asm__ __volatile__("sync");
	udelay(1000);

	im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
	udelay(2000);
#endif
	setup_serdes();

	return msize << 20;
}

int checkboard(void)
{
	puts("Board: Matrix Vision MergerBox\n");

	return 0;
}

int misc_init_r(void)
{
	u16 dim;
	int result;
	volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
	volatile gpio83xx_t *gpio = (gpio83xx_t *)&immr->gpio[1];
	unsigned char mac[6], mac_verify[6];
	char *s = getenv("reset_env");

	for (dim = 10; dim < 180; dim += 5) {
		mergerbox_tft_dim(dim);
		udelay(100000);
	}

	if (s)
		mv_reset_environment();

	i2c_read(SPD_EEPROM_ADDRESS, 0x80, 2, mac, sizeof(mac));

	/* check if Matrix Vision prefix present and export to env */
	if (mac[0] == 0x00 && mac[1] == 0x0c && mac[2] == 0x8d) {
		printf("valid MAC found in eeprom: %pM\n", mac);
		eth_setenv_enetaddr("ethaddr", mac);
	} else {
		printf("no valid MAC found in eeprom.\n");

		/* no: check the env */
		if (!eth_getenv_enetaddr("ethaddr", mac)) {
			printf("no valid MAC found in env either.\n");
			/* TODO: ask for valid MAC */
		} else {
			printf("valid MAC found in env: %pM\n", mac);
			printf("updating MAC in eeprom.\n");

			do {
				result = test_and_clear_bit(20, &gpio->dat);
				if (result)
					printf("unprotect EEPROM failed !\n");
				udelay(20000);
			} while(result);

			i2c_write(SPD_EEPROM_ADDRESS, 0x80, 2, mac, 6);
			udelay(20000);

			do {
				result = test_and_set_bit(20, &gpio->dat);
				if (result)
					printf("protect EEPROM failed !\n");
				udelay(20000);
			} while(result);

			printf("verify MAC %pM ... ", mac);
			i2c_read(SPD_EEPROM_ADDRESS, 0x80, 2, mac_verify, 6);

			if (!strncmp((char *)mac, (char *)mac_verify, 6))
				printf("ok.\n");
			else
				/* TODO: retry or do something useful */
				printf("FAILED (got %pM) !\n", mac_verify);
		}
	}

	return 0;
}

int spi_cs_is_valid(unsigned int bus, unsigned int cs)
{
	return bus == 0 && cs == 0;
}

void spi_cs_activate(struct spi_slave *slave)
{
	volatile gpio83xx_t *iopd = &((immap_t *)CONFIG_SYS_IMMR)->gpio[0];

	iopd->dat &= ~TFT_SPI_CPLD_CS;
}

void spi_cs_deactivate(struct spi_slave *slave)
{
	volatile gpio83xx_t *iopd = &((immap_t *)CONFIG_SYS_IMMR)->gpio[0];

	iopd->dat |= TFT_SPI_CPLD_CS;
}

/* control backlight pwm (display brightness).
 * allow values 0-250 with 0 = turn off and 250 = max brightness
 */
void mergerbox_tft_dim(u16 value)
{
	struct spi_slave *slave;
	u16 din;
	u16 dout = 0;

	if (value > 0 && value < 250)
		dout = 0x4000 | value;

	slave = spi_setup_slave(0, 0, 1000000, SPI_MODE_0 | SPI_CS_HIGH);
	spi_claim_bus(slave);
	spi_xfer(slave, 16, &dout, &din, SPI_XFER_BEGIN | SPI_XFER_END);
	spi_release_bus(slave);
	spi_free_slave(slave);
}

void ft_board_setup(void *blob, bd_t *bd)
{
	ft_cpu_setup(blob, bd);
	fdt_fixup_dr_usb(blob, bd);
	ft_pci_setup(blob, bd);
}
OpenPOWER on IntegriCloud