/* * Configuration settings for the SAMA5D2 PTC Engineering board. * * Copyright (C) 2016 Atmel * Wenyou Yang * * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H #define __CONFIG_H /* No NOR flash, this definition should put before common header */ #define CONFIG_SYS_NO_FLASH #include "at91-sama5_common.h" /* serial console */ #define CONFIG_ATMEL_USART #define CONFIG_USART_BASE ATMEL_BASE_UART0 #define CONFIG_USART_ID ATMEL_ID_UART0 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS #define CONFIG_SYS_SDRAM_SIZE 0x20000000 #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_INIT_SP_ADDR 0x210000 #else #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) #endif #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ #undef CONFIG_AT91_GPIO #define CONFIG_ATMEL_PIO4 /* SDRAM */ #define CONFIG_NR_DRAM_BANKS 1 /* SerialFlash */ #ifdef CONFIG_CMD_SF #define CONFIG_ATMEL_SPI #define CONFIG_SPI_FLASH_ATMEL #define CONFIG_SF_DEFAULT_BUS 0 #define CONFIG_SF_DEFAULT_CS 0 #define CONFIG_SF_DEFAULT_SPEED 30000000 #endif /* NAND flash */ #define CONFIG_CMD_NAND #ifdef CONFIG_CMD_NAND #define CONFIG_NAND_ATMEL #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 /* our ALE is AD21 */ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #define CONFIG_SYS_NAND_ONFI_DETECTION /* PMECC & PMERRLOC */ #define CONFIG_ATMEL_NAND_HWECC #define CONFIG_ATMEL_NAND_HW_PMECC #define CONFIG_CMD_NAND_TRIMFFS #endif /* USB */ #define CONFIG_CMD_USB #ifdef CONFIG_CMD_USB #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_ATMEL #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 #define CONFIG_USB_STORAGE #endif /* USB device */ #define CONFIG_USB_GADGET #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_ATMEL_USBA #define CONFIG_USB_ETHER #define CONFIG_USB_ETH_RNDIS #define CONFIG_USBNET_MANUFACTURER "Atmel SAMA5D2_PTC" #if defined(CONFIG_CMD_USB) #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION #endif /* Ethernet Hardware */ #define CONFIG_MACB #define CONFIG_RMII #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_MACB_SEARCH_PHY #ifdef CONFIG_SYS_USE_NANDFLASH #undef CONFIG_ENV_OFFSET #undef CONFIG_ENV_OFFSET_REDUND #undef CONFIG_BOOTCOMMAND /* u-boot env in nand flash */ #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET 0x200000 #define CONFIG_ENV_OFFSET_REDUND 0x400000 #define CONFIG_BOOTCOMMAND "nand read 0x21000000 0xb80000 0x80000;" \ "nand read 0x22000000 0x600000 0x600000;" \ "bootz 0x22000000 - 0x21000000" #endif #undef CONFIG_BOOTARGS #define CONFIG_BOOTARGS \ "console=ttyS0,57600 earlyprintk " \ "mtdparts=atmel_nand:6M(bootstrap)ro, 6M(kernel)ro,-(rootfs) " \ "rootfstype=ubifs ubi.mtd=2 root=ubi0:rootfs" /* SPL */ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x200000 #define CONFIG_SPL_MAX_SIZE 0x10000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_GPIO_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_BOARD_INIT #define CONFIG_SYS_MONITOR_LEN (512 << 10) #ifdef CONFIG_SYS_USE_SERIALFLASH #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_FLASH_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 #elif CONFIG_SYS_USE_NANDFLASH #define CONFIG_SPL_NAND_SUPPORT #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_BASE #define CONFIG_PMECC_CAP 8 #define CONFIG_PMECC_SECTOR_SIZE 512 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000 #define CONFIG_SYS_NAND_PAGE_COUNT 64 #define CONFIG_SYS_NAND_OOBSIZE 224 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif #endif