if ARCH_SOCFPGA

config TARGET_SOCFPGA_ARRIA5
	bool

config TARGET_SOCFPGA_CYCLONE5
	bool

choice
	prompt "Altera SOCFPGA board select"
	optional

config TARGET_SOCFPGA_ARRIA5_SOCDK
	bool "Altera SOCFPGA SoCDK (Arria V)"
	select TARGET_SOCFPGA_ARRIA5

config TARGET_SOCFPGA_CYCLONE5_SOCDK
	bool "Altera SOCFPGA SoCDK (Cyclone V)"
	select TARGET_SOCFPGA_CYCLONE5

config TARGET_SOCFPGA_DENX_MCVEVK
	bool "DENX MCVEVK (Cyclone V)"
	select TARGET_SOCFPGA_CYCLONE5

config TARGET_SOCFPGA_TERASIC_DE0_NANO
	bool "Terasic DE0-Nano-Atlas (Cyclone V)"
	select TARGET_SOCFPGA_CYCLONE5

config TARGET_SOCFPGA_TERASIC_SOCKIT
	bool "Terasic SoCkit (Cyclone V)"
	select TARGET_SOCFPGA_CYCLONE5

endchoice

config SYS_BOARD
	default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
	default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
	default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
	default "mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
	default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT

config SYS_VENDOR
	default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
	default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
	default "denx" if TARGET_SOCFPGA_DENX_MCVEVK
	default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO
	default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT

config SYS_SOC
	default "socfpga"

config SYS_CONFIG_NAME
	default "socfpga_arria5" if TARGET_SOCFPGA_ARRIA5_SOCDK
	default "socfpga_cyclone5" if TARGET_SOCFPGA_CYCLONE5_SOCDK
	default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
	default "socfpga_mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
	default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT

endif