/* * Copyright (C) 2012 Altera Corporation * * SPDX-License-Identifier: GPL-2.0+ */ #ifndef _SOCFPGA_BASE_ADDRS_H_ #define _SOCFPGA_BASE_ADDRS_H_ #define SOCFPGA_L3REGS_ADDRESS 0xff800000 #define SOCFPGA_UART0_ADDRESS 0xffc02000 #define SOCFPGA_UART1_ADDRESS 0xffc03000 #define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd00000 #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000 #endif /* _SOCFPGA_BASE_ADDRS_H_ */