#
# Copyright 2014 Freescale Semiconductor
#
# SPDX-License-Identifier:      GPL-2.0+
#

Freescale LayerScape with Chassis Generation 3

This architecture supports Freescale ARMv8 SoCs with Chassis generation 3,
for example LS2085A.

Flash Layout
============
A typical layout of various images (including Linux and other firmware images)
is shown below considering a 32MB NOR flash device:

	-------------------------
	|	linux		|
	------------------------- ----> 0x0120_0000
	|	Debug Server 	|
	------------------------- ----> 0x00C0_0000
	|	AIOP SW 	|
	------------------------- ----> 0x0070_0000
	|	MC FW 		|
	------------------------- ----> 0x006C_0000
	| MC Data Path Layout 	|
	------------------------- ----> 0x0020_0000
	|	BootLoader 	|
	------------------------- ----> 0x0000_1000
	|	PBI 		|
	------------------------- ----> 0x0000_0080
	|	RCW 		|
	------------------------- ----> 0x0000_0000

	32-MB NOR flash layout

Environment Variables
=====================
mcboottimeout:	MC boot timeout in milliseconds. If this variable is not defined
		the value CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS will be assumed.

mcmemsize:	MC DRAM block size. If this variable is not defined, the value
		CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE will be assumed.