From f4e7cbfcb0fcbc325a2bcfea7e00e3dd37f93846 Mon Sep 17 00:00:00 2001 From: Peter Pearse Date: Fri, 1 Feb 2008 16:49:08 +0000 Subject: Update board NetStar Signed-off-by: Ladislav Michl --- include/configs/netstar.h | 86 +++++++++++++++++++++-------------------------- 1 file changed, 39 insertions(+), 47 deletions(-) (limited to 'include/configs') diff --git a/include/configs/netstar.h b/include/configs/netstar.h index 33159d3156..a48893d1eb 100644 --- a/include/configs/netstar.h +++ b/include/configs/netstar.h @@ -48,14 +48,15 @@ #define CONFIG_SETUP_MEMORY_TAGS 1 #define CONFIG_INITRD_TAG 1 -#define CFG_DEVICE_NULLDEV 1 /* enable null device */ #define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */ +#define CFG_CONSOLE_INFO_QUIET /* * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ #define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024) #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ /* @@ -63,30 +64,21 @@ */ #define CFG_FLASH_BASE PHYS_FLASH_1 #define CFG_MAX_FLASH_BANKS 1 -#if (PHYS_SDRAM_1_SIZE == SZ_32M) -/*#if 1*/ -#define CFG_FLASH_CFI /* Flash is CFI conformant */ -#define CFG_FLASH_CFI_DRIVER /* Use the common driver */ -#define CFG_FLASH_EMPTY_INFO -#define CFG_MAX_FLASH_SECT 128 -#else -#define PHYS_FLASH_1_SIZE SZ_1M +#define PHYS_FLASH_1_SIZE (1 * 1024 * 1024) #define CFG_MAX_FLASH_SECT 19 #define CFG_FLASH_ERASE_TOUT (5*CFG_HZ) /* in ticks */ #define CFG_FLASH_WRITE_TOUT (5*CFG_HZ) -#endif #define CFG_MONITOR_BASE PHYS_FLASH_1 -#define CFG_MONITOR_LEN SZ_256K +#define CFG_MONITOR_LEN (256 * 1024) /* * Environment settings */ #define CFG_ENV_IS_IN_FLASH -#define ENV_IS_SOLITARY #define CFG_ENV_ADDR 0x4000 -#define CFG_ENV_SIZE SZ_8K -#define CFG_ENV_SECT_SIZE SZ_8K +#define CFG_ENV_SIZE (8 * 1024) +#define CFG_ENV_SECT_SIZE (8 * 1024) #define CFG_ENV_ADDR_REDUND 0x6000 #define CFG_ENV_SIZE_REDUND CFG_ENV_SIZE #define CONFIG_ENV_OVERWRITE @@ -95,14 +87,12 @@ * Size of malloc() pool */ #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ -/* XXX #define CFG_MALLOC_LEN (SZ_64K - CFG_GBL_DATA_SIZE)*/ -#define CFG_MALLOC_LEN SZ_4M +#define CFG_MALLOC_LEN (4 * 1024 * 1024) /* * The stack size is set up in start.S using the settings below */ -/* XXX #define CONFIG_STACKSIZE SZ_8K /XXX* regular stack */ -#define CONFIG_STACKSIZE SZ_1M /* regular stack */ +#define CONFIG_STACKSIZE (1 * 1024 * 1024) /* regular stack */ /* * Hardware drivers @@ -132,13 +122,16 @@ #define CFG_MAX_NAND_DEVICE 1 #define NAND_MAX_CHIPS 1 #define CFG_NAND_BASE 0x04000000 + (2 << 23) +#define NAND_ALLOW_ERASE_ALL 1 /* - * JFFS2 partitions (mtdparts command line support) + * partitions (mtdparts command line support) */ #define CONFIG_JFFS2_CMDLINE #define MTDIDS_DEFAULT "nor0=omapflash.0,nand0=omapnand.0" -#define MTDPARTS_DEFAULT "mtdparts=omapflash.0:8k@16k(env),8k(r_env),448k@576k(u-boot);omapnand.0:48M(rootfs0),48M(rootfs1),-(data)" +#define MTDPARTS_DEFAULT "mtdparts=" \ + "omapflash.0:8k@16k(env),8k(r_env),448k@576k(u-boot);" \ + "omapnand.0:4M(kernel0),40M(rootfs0),4M(kernel1),40M(rootfs1),-(data)" /* @@ -176,36 +169,34 @@ #define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */ #undef CONFIG_BOOTARGS /* the boot command will set bootargs*/ #define CFG_AUTOLOAD "n" /* No autoload */ -#define CONFIG_BOOTCOMMAND "run nboot" +#define CONFIG_BOOTCOMMAND "run fboot" #define CONFIG_PREBOOT "run setup" -#define CONFIG_EXTRA_ENV_SETTINGS \ - "setup=setenv bootargs console=ttyS0,$baudrate " \ - "$mtdparts\0" \ - "ospart=0\0" \ - "setpart=" \ - "if test -n $swapos; then " \ - "if test $ospart -eq 0; then chpart nand0,1; else chpart nand0,0; fi; "\ - "setenv swapos; saveenv; " \ - "else " \ - "chpart nand0,$ospart; " \ - "fi\0" \ - "nfsargs=setenv bootargs $bootargs " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \ - "nfsroot=$rootpath root=/dev/nfs\0" \ - "flashargs=run setpart;setenv bootargs $bootargs " \ - "root=/dev/mtdblock$partition ro " \ - "rootfstype=jffs2\0" \ - "initrdargs=setenv bootargs $bootargs " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \ - "iboot=bootp;run initrdargs;tftp;bootm\0" \ - "fboot=run flashargs;fsload /boot/uImage;bootm\0" \ - "nboot=bootp;run nfsargs;tftp;bootm\0" +#define CONFIG_EXTRA_ENV_SETTINGS \ + "autostart=yes\0" \ + "ospart=0\0" \ + "setup=setenv bootargs console=ttyS0,$baudrate " \ + "$mtdparts\0" \ + "setpart=" \ + "if test -n $swapos; then " \ + "setenv swapos; saveenv; " \ + "else " \ + "if test $ospart -eq 0; then setenv ospart 1;" \ + "else setenv ospart 0; fi; " \ + "fi\0" \ + "nfsargs=setenv bootargs $bootargs " \ + "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \ + "nfsroot=$rootpath root=/dev/nfs\0" \ + "flashargs=run setpart;setenv bootargs $bootargs " \ + "root=mtd:rootfs$ospart ro " \ + "rootfstype=jffs2\0" \ + "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \ + "fboot=run flashargs;nboot kernel$ospart\0" \ + "nboot=bootp;run nfsargs;tftp\0" #if 0 /* feel free to disable for development */ #define CONFIG_AUTOBOOT_KEYED /* Enable password protection */ -#define CONFIG_AUTOBOOT_PROMPT "\nNetStar PBX - boot in %d sec...\n" -#define CONFIG_AUTOBOOT_DELAY_STR "R" /* 1st "password" */ -#define CONFIG_BOOT_RETRY_TIME 30 +#define CONFIG_AUTOBOOT_PROMPT "\nNetStar PBX - boot in %d secs...\n" +#define CONFIG_AUTOBOOT_DELAY_STR "." /* 1st "password" */ #endif /* @@ -223,7 +214,8 @@ #define CONFIG_AUTO_COMPLETE #define CFG_MEMTEST_START PHYS_SDRAM_1 -#define CFG_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE +#define CFG_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - \ + (CFG_MONITOR_LEN + CFG_MALLOC_LEN + CONFIG_STACKSIZE) #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ -- cgit v1.2.1 From 6afcabf11d7321850f4feaadfee841488ace54c5 Mon Sep 17 00:00:00 2001 From: Stelian Pop Date: Thu, 7 Feb 2008 16:37:54 +0000 Subject: AT91CAP9 support : board/ files Signed-off-by: Stelian Pop --- include/configs/at91cap9adk.h | 212 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 212 insertions(+) create mode 100644 include/configs/at91cap9adk.h (limited to 'include/configs') diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h new file mode 100644 index 0000000000..f0dfd71aef --- /dev/null +++ b/include/configs/at91cap9adk.h @@ -0,0 +1,212 @@ +/* + * (C) Copyright 2007 + * Stelian Pop leadtechdesign.com> + * Lead Tech Design + * + * Configuation settings for the AT91CAP9ADK board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* ARM asynchronous clock */ +#define AT91C_MAIN_CLOCK 200000000 /* from 12 MHz crystal */ +#define AT91C_MASTER_CLOCK 100000000 /* peripheral = main / 2 */ +#define CFG_HZ 1000000 /* 1us resolution */ + +#define AT91_SLOW_CLOCK 32768 /* slow clock */ + +#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ +#define CONFIG_AT91CAP9 1 /* It's an Atmel AT91CAP9 SoC */ +#define CONFIG_AT91CAP9ADK 1 /* on an AT91CAP9ADK Board */ +#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_RELOCATE_UBOOT + +#define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) +/* + * Size of malloc() pool + */ +#define CFG_MALLOC_LEN ROUND(CFG_ENV_SIZE + 128*1024, 0x1000) +#define CFG_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ + +#define CONFIG_BAUDRATE 115200 + +/* + * Hardware drivers + */ + +#define CONFIG_ATMEL_USART 1 +#undef CONFIG_USART0 +#undef CONFIG_USART1 +#undef CONFIG_USART2 +#define CONFIG_USART3 1 /* USART 3 is DBGU */ + +#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ + "root=/dev/mtdblock1 rw rootfstype=jffs2" + +/* #define CONFIG_ENV_OVERWRITE 1 */ + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE 1 +#define CONFIG_BOOTP_BOOTPATH 1 +#define CONFIG_BOOTP_GATEWAY 1 +#define CONFIG_BOOTP_HOSTNAME 1 + +/* + * Command line configuration. + */ +#include +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_IMI +#undef CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_LOADS + +#define CONFIG_CMD_PING 1 +#define CONFIG_CMD_DHCP 1 +#define CONFIG_CMD_NAND 1 +#define CONFIG_CMD_USB 1 + +/* SDRAM: Careful: this supposes an AT91CAP-MEM33 expansion card */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM 0x70000000 +#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ + +/* DataFlash */ +#define CONFIG_HAS_DATAFLASH 1 +#define CFG_SPI_WRITE_TOUT (5*CFG_HZ) +#define CFG_MAX_DATAFLASH_BANKS 1 +#define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ +#define CONFIG_NEW_PARTITION 1 + +/* NOR flash */ +#define CFG_FLASH_CFI 1 +#define CFG_FLASH_CFI_DRIVER 1 +#define PHYS_FLASH_1 0x10000000 +#define CFG_FLASH_BASE PHYS_FLASH_1 +#define CFG_MAX_FLASH_SECT 256 +#define CFG_MAX_FLASH_BANKS 1 + +#define AT91C_FLASH_NWE_SETUP (4 << 0) +#define AT91C_FLASH_NCS_WR_SETUP (2 << 8) +#define AT91C_FLASH_NRD_SETUP (4 << 16) +#define AT91C_FLASH_NCS_RD_SETUP (2 << 24) + +#define AT91C_FLASH_NWE_PULSE (8 << 0) +#define AT91C_FLASH_NCS_WR_PULSE (10 << 8) +#define AT91C_FLASH_NRD_PULSE (8 << 16) +#define AT91C_FLASH_NCS_RD_PULSE (10 << 24) + +#define AT91C_FLASH_NWE_CYCLE (16 << 0) +#define AT91C_FLASH_NRD_CYCLE (16 << 16) + +/* NAND flash */ +#define NAND_MAX_CHIPS 1 +#define CFG_MAX_NAND_DEVICE 1 +#define CFG_NAND_BASE 0x40000000 + +#define AT91C_SM_NWE_SETUP (2 << 0) +#define AT91C_SM_NCS_WR_SETUP (1 << 8) +#define AT91C_SM_NRD_SETUP (2 << 16) +#define AT91C_SM_NCS_RD_SETUP (1 << 24) + +#define AT91C_SM_NWE_PULSE (4 << 0) +#define AT91C_SM_NCS_WR_PULSE (6 << 8) +#define AT91C_SM_NRD_PULSE (4 << 16) +#define AT91C_SM_NCS_RD_PULSE (6 << 24) + +#define AT91C_SM_NWE_CYCLE (8 << 0) +#define AT91C_SM_NRD_CYCLE (8 << 16) + +#define AT91C_SM_TDF (1 << 16) + +/* Ethernet */ +#define CONFIG_MACB 1 +#define CONFIG_RMII 1 +#define CONFIG_NET_MULTI 1 +#define CONFIG_NET_RETRY_COUNT 20 +#define CONFIG_RESET_PHY_R 1 + +/* USB */ +#define CONFIG_USB_OHCI_NEW 1 +#define LITTLEENDIAN 1 +#define CONFIG_DOS_PARTITION 1 +#define CFG_USB_OHCI_CPU_INIT 1 +#define CFG_USB_OHCI_REGS_BASE 0x00700000 /* AT91C_BASE_UHP */ +#define CFG_USB_OHCI_SLOT_NAME "at91cap9" +#define CFG_USB_OHCI_MAX_ROOT_PORTS 2 + + +#define CFG_LOAD_ADDR 0x72000000 /* load address */ + +#define CFG_MEMTEST_START PHYS_SDRAM +#define CFG_MEMTEST_END 0x73000000 + +#define CFG_USE_DATAFLASH 1 +#undef CFG_USE_NORFLASH + +#ifdef CFG_USE_DATAFLASH + +/* bootstrap + u-boot + env + linux in dataflash */ +#define CFG_ENV_IS_IN_DATAFLASH 1 +#define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) +#define CFG_ENV_OFFSET 0x4200 +#define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET) +#define CFG_ENV_SIZE 0x4200 +#define CONFIG_BOOTCOMMAND "cp.b 0xC003DE00 0x72000000 0x200040; bootm" + +#else + +/* bootstrap + u-boot + env + linux in norflash */ +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_MONITOR_BASE (PHYS_FLASH_1 + 0x8000) +#define CFG_ENV_OFFSET 0x4000 +#define CFG_ENV_ADDR (PHYS_FLASH_1 + CFG_ENV_OFFSET) +#define CFG_ENV_SIZE 0x4000 +#define CONFIG_BOOTCOMMAND "cp.b 0x10040000 0x72000000 0x200000; bootm" + +#endif + +#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } + +#define CFG_PROMPT "U-Boot> " +#define CFG_CBSIZE 256 +#define CFG_MAXARGS 16 +#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) +#define CFG_LONGHELP 1 +#define CONFIG_CMDLINE_EDITING 1 + +#define CONFIG_STACKSIZE (32*1024) /* regular stack */ + +#ifdef CONFIG_USE_IRQ +#error CONFIG_USE_IRQ not supported +#endif + +#endif -- cgit v1.2.1 From ea8d989f4ef8203e1c0291e62435a8c62e3cfb29 Mon Sep 17 00:00:00 2001 From: Timo Tuunainen Date: Fri, 1 Feb 2008 10:09:03 +0000 Subject: Support for Artila M-501 starter kit Kimmo Leppala / Sysart and Timo Tuunainen / Sysart --- include/configs/m501sk.h | 197 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 197 insertions(+) create mode 100644 include/configs/m501sk.h (limited to 'include/configs') diff --git a/include/configs/m501sk.h b/include/configs/m501sk.h new file mode 100644 index 0000000000..095fdaf5c8 --- /dev/null +++ b/include/configs/m501sk.h @@ -0,0 +1,197 @@ +/* + * Based on Modifications by Alan Lu / Artila and + * Rick Bronson + * + * Configuration settings for the Artila M-501 starter kit, + * with V02 processor card. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* ARM asynchronous clock */ +/* from 18.432 MHz crystal (18432000 / 4 * 39) */ +#define AT91C_MAIN_CLOCK 179712000 +/* Perip clock (AT91C_MASTER_CLOCK / 3) */ +#define AT91C_MASTER_CLOCK 59904000 +#define AT91_SLOW_CLOCK 32768 /* slow clock */ + +#define CONFIG_AT91RM9200DK 1 /* on an AT91RM9200DK Board */ +#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +#undef CONFIG_AUTOBOOT_PROMPT +#define CONFIG_MENUPROMPT "." + +/* + * Size of malloc() pool + */ +#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) +#define CFG_GBL_DATA_SIZE 128 /* Bytes reserved for initial data */ + +#define CONFIG_BAUDRATE 115200 + +/* Hardcode so no __divsi3 : AT91C_MASTER_CLOCK / baudrate / 16 */ +#define CFG_AT91C_BRGR_DIVISOR 33 + +/* + * Hardware drivers + */ +#define CFG_FLASH_CFI 1 +#define CFG_FLASH_CFI_DRIVER 1 +#define CFG_ENV_SECT_SIZE 0x20000 +#define CFG_FLASH_USE_BUFFER_WRITE +#define CFG_FLASH_PROTECTION /*for Intel P30 Flash*/ +#define CONFIG_HARD_I2C +#define CFG_I2C_SPEED 100 +#define CFG_I2C_SLAVE 0 +#define CFG_CONSOLE_INFO_QUIET +#undef CFG_ENV_IS_IN_EEPROM +#define CFG_I2C_EEPROM_ADDR 0x50 +#define CFG_I2C_EEPROM_ADDR_LEN 1 +#define CFG_EEPROM_AT24C16 +#define CFG_I2C_RTC_ADDR 0x32 +#undef CONFIG_RTC_DS1338 +#define CONFIG_RTC_RS5C372A +#undef CONFIG_POST +#define CONFIG_M501SK +#define CONFIG_CMC_PU2 + +/* define one of these to choose the DBGU, USART0 or USART1 as console */ +#define CONFIG_DBGU +#undef CONFIG_USART0 +#undef CONFIG_USART1 + +#undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */ +#undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */ + +#define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200 " \ + "initrd=0x20800000,8192000 ramdisk_size=15360 " \ + "root=/dev/ram0 rw mtdparts=phys_mapped_flash:" \ + "128k(loader)ro,128k(reserved)ro,1408k(linux)" \ + "ro,2560k(ramdisk)ro,-(userdisk)" +#define CONFIG_BOOTCOMMAND "bootm 10040000 101a0000" +#define CONFIG_BOOTDELAY 1 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_IPADDR 192.168.1.100 +#define CONFIG_SERVERIP 192.168.1.1 +#define CONFIG_GATEWAYIP 192.168.1.254 +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_BOOTFILE uImage +#define CONFIG_ETHADDR 00:13:48:aa:bb:cc +#define CONFIG_ENV_OVERWRITE 1 +#define BOARD_LATE_INIT + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "unlock=yes\0" + +#define CFG_CMD_JFFS2 +#undef CONFIG_CMD_EEPROM +#define CONFIG_CMD_NET +#define CONFIG_CMD_RUN +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_PING +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_I2C +#define CONFIG_CMD_DATE +#define CONFIG_CMD_POST +#define CONFIG_CMD_MISC +#define CONFIG_CMD_LOADS +#define CONFIG_CMD_IMI +#define CONFIG_CMD_NFS +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_ENV + +#define CFG_HUSH_PARSER +#define CONFIG_AUTO_COMPLETE +#define CFG_PROMPT_HUSH_PS2 ">>" + +#define CFG_MAX_NAND_DEVICE 0 /* Max number of NAND devices */ +#define SECTORSIZE 512 + +#define ADDR_COLUMN 1 +#define ADDR_PAGE 2 +#define ADDR_COLUMN_PAGE 3 + +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM 0x20000000 +#define PHYS_SDRAM_SIZE 0x2000000 /* 32 megs */ + +#define CFG_MEMTEST_START 0x21000000 /* PHYS_SDRAM */ +/* CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 262144 */ +#define CFG_MEMTEST_END 0x00100000 + +#define CONFIG_DRIVER_ETHER +#define CONFIG_NET_RETRY_COUNT 20 +#define CONFIG_AT91C_USE_RMII + +#define PHYS_FLASH_1 0x10000000 +#define PHYS_FLASH_SIZE 0x800000 /* 8 megs main flash */ +#define CFG_FLASH_BASE PHYS_FLASH_1 +#define CFG_MAX_FLASH_BANKS 1 +#define CFG_MAX_FLASH_SECT 256 +#define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */ +#define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */ + +#ifdef CFG_ENV_IS_IN_DATAFLASH +#define CFG_ENV_OFFSET 0x20000 +#define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET) +#define CFG_ENV_SIZE 0x2000 +#else +#define CFG_ENV_IS_IN_FLASH +#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x00020000) +#define CFG_ENV_SIZE 2048 +#endif + +#ifdef CFG_ENV_IS_IN_EEPROM +#define CFG_ENV_OFFSET 1024 +#define CFG_ENV_SIZE 1024 +#endif + +#define CFG_LOAD_ADDR 0x21000000 /* default load address */ + +/* use for protect flash sectors */ +#define CFG_BOOT_SIZE 0x6000 /* 24 KBytes */ +#define CFG_U_BOOT_BASE (PHYS_FLASH_1 + 0x10000) +#define CFG_U_BOOT_SIZE 0x10000 /* 64 KBytes */ + +#define CFG_BAUDRATE_TABLE { 115200 , 19200, 38400, 57600, 9600 } + +#define CFG_PROMPT "U-Boot> " /* Monitor Command Prompt */ +#define CFG_CBSIZE 512 /* Console I/O Buffer Size */ +#define CFG_MAXARGS 16 /* max number of command args */ +/* Print Buffer Size */ +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) + +#define CFG_HZ 1000 +#define CFG_HZ_CLOCK AT91C_MASTER_CLOCK/2 + +#define CONFIG_STACKSIZE (32*1024) /* regular stack */ + +#ifdef CONFIG_USE_IRQ +#error CONFIG_USE_IRQ not supported +#endif + +#endif -- cgit v1.2.1