From 8d61625d6a73307857f80002949583105545dbbc Mon Sep 17 00:00:00 2001 From: Graeme Russ Date: Tue, 27 Nov 2012 15:38:36 +0000 Subject: x86: Put global data on the stack Putting global data on the stack simplifies the init process (and makes it slightly quicker). During the 'flash' stage of the init sequence, global data is in the CAR stack. After SDRAM is initialised, global data is copied from CAR to the SDRAM stack Signed-off-by: Graeme Russ Signed-off-by: Simon Glass --- include/configs/coreboot.h | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'include/configs/coreboot.h') diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index cc95e2be98..8d3c21f05d 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -210,12 +210,11 @@ * (128kB + Environment Sector Size) malloc pool */ #define CONFIG_SYS_STACK_SIZE (32 * 1024) -#define CONFIG_SYS_INIT_SP_ADDR (256 * 1024 + 16 * 1024) +#define CONFIG_SYS_CAR_ADDR 0x19200000 +#define CONFIG_SYS_CAR_SIZE (16 * 1024) #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 * 1024) #define CONFIG_SYS_MALLOC_LEN (0x20000 + 128 * 1024) -/* Address of temporary Global Data */ -#define CONFIG_SYS_INIT_GD_ADDR (256 * 1024) /* allow to overwrite serial and ethaddr */ -- cgit v1.2.1 From cd23e6923f371b16b9ee9f115d15c9dd46c2f558 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 27 Nov 2012 21:08:12 +0000 Subject: x86: Remove coreboot start16 code Now that coreboot doesn't need the start16 code, remove it. We need to remove the CONFIG_SYS_X86_RESET_VECTOR option from coreboot.h also. Signed-off-by: Simon Glass --- include/configs/coreboot.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/configs/coreboot.h') diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 8d3c21f05d..12d1016522 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -37,7 +37,7 @@ #define CONFIG_SYS_COREBOOT #undef CONFIG_SHOW_BOOT_PROGRESS #define CONFIG_LAST_STAGE_INIT - +#define CONFIG_X86_NO_RESET_VECTOR /*----------------------------------------------------------------------- * Watchdog Configuration -- cgit v1.2.1 From d02a568e9aa3c3500d9b680f60782c192fd51691 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 25 Nov 2012 20:12:16 +0000 Subject: x86: coreboot: Enable LPC TPM Coreboot boards have an LPC TPM connected, so enable this. Signed-off-by: Simon Glass --- include/configs/coreboot.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include/configs/coreboot.h') diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 12d1016522..5da006fbde 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -67,6 +67,10 @@ CONFIG_SYS_SCSI_MAX_LUN) #endif +/* Generic TPM interfaced through LPC bus */ +#define CONFIG_GENERIC_LPC_TPM +#define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000 + /*----------------------------------------------------------------------- * Real Time Clock Configuration */ -- cgit v1.2.1 From 420a2ca73f5805be5e69d01cfe60a06fba8c9754 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 29 Nov 2012 09:58:58 +0000 Subject: x86: Select stdio devices for coreboot We want to support VGA, serial, USB keyboard and the Coreboot memory console buffer. Signed-off-by: Simon Glass --- include/configs/coreboot.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'include/configs/coreboot.h') diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 5da006fbde..cfe5db35a0 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -92,6 +92,15 @@ #define CONFIG_SYS_NS16550_COM2 UART1_BASE #define CONFIG_SYS_NS16550_PORT_MAPPED +#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,eserial0\0" \ + "stdout=vga,eserial0,cbmem\0" \ + "stderr=vga,eserial0,cbmem\0" + +#define CONFIG_CONSOLE_MUX +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_STDIO_DEREGISTER +#define CONFIG_CBMEM_CONSOLE + /* max. 1 IDE bus */ #define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 drive per IDE bus */ @@ -243,4 +252,7 @@ */ #define CONFIG_PCI +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_STD_DEVICES_SETTINGS + #endif /* __CONFIG_H */ -- cgit v1.2.1 From a78d49473c81b8c95adfe684e62e5af6aa4f902d Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 20 Oct 2012 12:33:15 +0000 Subject: x86: Define CONFIG_SYS_VSNPRINTF for coreboot This option protects the printf() functions from overflow. Signed-off-by: Simon Glass --- include/configs/coreboot.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/configs/coreboot.h') diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index cfe5db35a0..a010adc2d9 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -38,6 +38,7 @@ #undef CONFIG_SHOW_BOOT_PROGRESS #define CONFIG_LAST_STAGE_INIT #define CONFIG_X86_NO_RESET_VECTOR +#define CONFIG_SYS_VSNPRINTF /*----------------------------------------------------------------------- * Watchdog Configuration -- cgit v1.2.1 From a7e6d5496c7981803482bfa6970eeda2954d3458 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 2 Dec 2012 03:44:44 +0000 Subject: x86: Enable ICH6 GPIO controller for coreboot Coreboot uses this controller to implement GPIO access. Signed-off-by: Simon Glass --- include/configs/coreboot.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include/configs/coreboot.h') diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index a010adc2d9..fcfa7edfb4 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -138,6 +138,9 @@ #undef CONFIG_VIDEO #undef CONFIG_CFB_CONSOLE +/* x86 GPIOs are accessed through a PCI device */ +#define CONFIG_INTEL_ICH6_GPIO + /*----------------------------------------------------------------------- * Command line configuration. */ @@ -150,6 +153,7 @@ #define CONFIG_CMD_ECHO #undef CONFIG_CMD_FLASH #define CONFIG_CMD_FPGA +#define CONFIG_CMD_GPIO #define CONFIG_CMD_IMI #undef CONFIG_CMD_IMLS #define CONFIG_CMD_IRQ -- cgit v1.2.1 From 34d6057be1a162ce6424314026af12f8963f2df2 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 2 Dec 2012 04:49:55 +0000 Subject: x86: Enable CONFIG_CMD_ZBOOT for coreboot Enable this option to support booting a zImage. Signed-off-by: Simon Glass --- include/configs/coreboot.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include/configs/coreboot.h') diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index fcfa7edfb4..e45ecad7b4 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -39,6 +39,7 @@ #define CONFIG_LAST_STAGE_INIT #define CONFIG_X86_NO_RESET_VECTOR #define CONFIG_SYS_VSNPRINTF +#define CONFIG_ZBOOT_32 /*----------------------------------------------------------------------- * Watchdog Configuration @@ -175,6 +176,8 @@ #define CONFIG_CMD_FAT #define CONFIG_CMD_EXT2 +#define CONFIG_CMD_ZBOOT + #define CONFIG_BOOTDELAY 2 #define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyS0,9600" -- cgit v1.2.1 From 300081aa68d705ce954c516751a9c03efa1fba5e Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Mon, 3 Dec 2012 13:58:12 +0000 Subject: x86: Emit port 80 post codes in show_boot_progress() This helps us monitor boot progress and determine where U-Boot dies if there are any problems. Signed-off-by: Stefan Reinauer Signed-off-by: Simon Glass --- include/configs/coreboot.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/configs/coreboot.h') diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index e45ecad7b4..94b6917632 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -35,7 +35,7 @@ * (easy to change) */ #define CONFIG_SYS_COREBOOT -#undef CONFIG_SHOW_BOOT_PROGRESS +#define CONFIG_SHOW_BOOT_PROGRESS #define CONFIG_LAST_STAGE_INIT #define CONFIG_X86_NO_RESET_VECTOR #define CONFIG_SYS_VSNPRINTF -- cgit v1.2.1 From cbca883c46146e9b3128fcb51ab750089c47c241 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 3 Nov 2012 11:41:42 +0000 Subject: x86: coreboot: Enable video display Enable the display on coreboot, using CFB. Signed-off-by: Simon Glass --- include/configs/coreboot.h | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'include/configs/coreboot.h') diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 94b6917632..46b8d78fbc 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -78,6 +78,7 @@ */ #define CONFIG_RTC_MC146818 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 +#define CONFIG_SYS_ISA_IO CONFIG_SYS_ISA_IO_BASE_ADDRESS /*----------------------------------------------------------------------- * Serial Configuration @@ -136,8 +137,13 @@ /*----------------------------------------------------------------------- * Video Configuration */ -#undef CONFIG_VIDEO -#undef CONFIG_CFB_CONSOLE +#define CONFIG_VIDEO +#define CONFIG_VIDEO_COREBOOT +#define CONFIG_VIDEO_SW_CURSOR +#define VIDEO_FB_16BPP_WORD_SWAP +#define CONFIG_I8042_KBD +#define CONFIG_CFB_CONSOLE +#define CONFIG_SYS_CONSOLE_INFO_QUIET /* x86 GPIOs are accessed through a PCI device */ #define CONFIG_INTEL_ICH6_GPIO -- cgit v1.2.1 From d954a431ec4bbebc588ac810a1eb01f3512249a8 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 5 Dec 2012 15:10:58 +0000 Subject: x86: Turn on support for EFI's GPT in the coreboot config This allows u-boot to figure out the partitions of a chrome-os install. Signed-off-by: Gabe Black Signed-off-by: Simon Glass --- include/configs/coreboot.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include/configs/coreboot.h') diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 46b8d78fbc..06d2b2fb2e 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -126,13 +126,16 @@ /************************************************************ * DISK Partition support ************************************************************/ +#define CONFIG_EFI_PARTITION #define CONFIG_DOS_PARTITION #define CONFIG_MAC_PARTITION #define CONFIG_ISO_PARTITION /* Experimental */ +#define CONFIG_CMD_PART #define CONFIG_CMD_CBFS #define CONFIG_CMD_EXT4 #define CONFIG_CMD_EXT4_WRITE +#define CONFIG_PARTITION_UUIDS /*----------------------------------------------------------------------- * Video Configuration -- cgit v1.2.1 From ac426b7290e3a96c97fbc093f15cd0660e0edaf2 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 5 Dec 2012 15:11:27 +0000 Subject: x86: Fix coreboot config to boot on Chromebook The config is current broken. It compiles but does not boot because IDE is enabled. Remove all IDE options, and enable SCSI instead. Also add a working boot command and Linux bootargs, and enable command line editing to make it easier to work with. Signed-off-by: Simon Glass --- include/configs/coreboot.h | 26 ++++++++++++-------------- 1 file changed, 12 insertions(+), 14 deletions(-) (limited to 'include/configs/coreboot.h') diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 06d2b2fb2e..adeace0cf2 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -39,7 +39,9 @@ #define CONFIG_LAST_STAGE_INIT #define CONFIG_X86_NO_RESET_VECTOR #define CONFIG_SYS_VSNPRINTF +#define CONFIG_INTEL_CORE_ARCH /* Sandy bridge and ivy bridge chipsets. */ #define CONFIG_ZBOOT_32 +#define CONFIG_PHYSMEM /*----------------------------------------------------------------------- * Watchdog Configuration @@ -104,18 +106,9 @@ #define CONFIG_SYS_STDIO_DEREGISTER #define CONFIG_CBMEM_CONSOLE -/* max. 1 IDE bus */ -#define CONFIG_SYS_IDE_MAXBUS 1 -/* max. 1 drive per IDE bus */ -#define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS * 1) - -#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS -#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0 -#define CONFIG_SYS_ATA_IDE1_OFFSET 0x0170 -#define CONFIG_SYS_ATA_DATA_OFFSET 0 -#define CONFIG_SYS_ATA_REG_OFFSET 0 -#define CONFIG_SYS_ATA_ALT_OFFSET 0x200 - +#define CONFIG_CMDLINE_EDITING +#define CONFIG_COMMAND_HISTORY +#define CONFIG_AUTOCOMPLETE #define CONFIG_SUPPORT_VFAT /************************************************************ @@ -181,14 +174,19 @@ #define CONFIG_CMD_SETGETDCR #define CONFIG_CMD_SOURCE #define CONFIG_CMD_XIMG -#define CONFIG_CMD_IDE +#define CONFIG_CMD_SCSI + #define CONFIG_CMD_FAT #define CONFIG_CMD_EXT2 #define CONFIG_CMD_ZBOOT #define CONFIG_BOOTDELAY 2 -#define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyS0,9600" +#define CONFIG_BOOTARGS \ + "root=/dev/sdb3 init=/sbin/init rootwait ro" +#define CONFIG_BOOTCOMMAND \ + "ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000" + #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 115200 -- cgit v1.2.1