From fbe4b5cbdea438ccec0d93de443f367f3ba46196 Mon Sep 17 00:00:00 2001
From: wdenk <wdenk>
Date: Mon, 6 Oct 2003 21:55:32 +0000
Subject: * Update TRAB auto update code

* Make fatload set filesize environment variable
  fix potential buffer overlow problem

* enable basic / medium / high-end configurations for PPChameleonEVB
  board; fix NAND code

* enable TFTP client code to specify to the server the desired
  timeout value (see RFC-2349)
---
 include/configs/PPChameleonEVB.h | 37 ++++++++++++++++++++++---------------
 1 file changed, 22 insertions(+), 15 deletions(-)

(limited to 'include/configs/PPChameleonEVB.h')

diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h
index 7c7b98ceb4..1630bc32b1 100644
--- a/include/configs/PPChameleonEVB.h
+++ b/include/configs/PPChameleonEVB.h
@@ -1,9 +1,12 @@
 /*
- * (C) Copyright 2001-2003
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ * (C) Copyright 2003
+ * DAVE Srl
  *
- * See file CREDITS for list of people who contributed to this
- * project.
+ * http://www.dave-tech.it
+ * http://www.wawnet.biz
+ * mailto:info@wawnet.biz
+ *
+ * Credits: Stefan Roese, Wolfgang Denk
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
@@ -28,6 +31,13 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_PPCHAMELEON_MODULE_BA	0	/* Basic    Model */	
+#define CONFIG_PPCHAMELEON_MODULE_ME	1	/* Medium   Model */
+#define CONFIG_PPCHAMELEON_MODULE_HI	2	/* High-End Model */
+#ifndef	CONFIG_PPCHAMELEON_MODULE_MODEL
+#define	CONFIG_PPCHAMELEON_MODULE_MODEL	CONFIG_PPCHAMELEON_MODULE_BA
+#endif
+
 /*
  * Debug stuff
  */
@@ -150,6 +160,7 @@
 
 #define CFG_MAX_NAND_DEVICE	2	/* Max number of NAND devices		*/
 #define SECTORSIZE 512
+#define NAND_NO_RB
 
 #define ADDR_COLUMN 1
 #define ADDR_PAGE 2
@@ -248,19 +259,15 @@
         } \
 } while(0)
 
+#ifdef NAND_NO_RB
+/* constant delay (see also tR in the datasheet) */
 #define NAND_WAIT_READY(nand) do { \
-	ulong mask = 0; \
-	switch ((ulong)(((struct nand_chip *)nand)->IO_ADDR)) { \
-	case CFG_NAND0_BASE: \
-		mask = CFG_NAND0_RDY; \
-		break; \
-	case CFG_NAND1_BASE: \
-		mask = CFG_NAND1_RDY; \
-		break; \
-	} \
-	while (!(in32(GPIO0_IR) & mask)) \
-		; \
+	udelay(12); \
 } while (0)
+#else
+/* use the R/B pin */
+/* TBD */
+#endif
 
 #define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
 #define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
-- 
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