From cfc7a7f5bb3273c9951173c788001d45118f141f Mon Sep 17 00:00:00 2001 From: Jon Loeliger Date: Thu, 2 Aug 2007 14:42:20 -0500 Subject: cpu/86xx fixes. Remove rev 1 fixes. Always set PICGCR_MODE. Enable machine check and provide board config option to set and handle SoC error interrupts. Include MSSSR0 in error message. Isolate a RAMBOOT bit of code with #ifdef CFG_RAMBOOT. Signed-off-by: Ed Swarthout Signed-off-by: Jon Loeliger --- include/asm-ppc/processor.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include/asm-ppc/processor.h') diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h index 71e2e847a4..b806cc09f1 100644 --- a/include/asm-ppc/processor.h +++ b/include/asm-ppc/processor.h @@ -464,7 +464,8 @@ #define ESR_ST 0x00800000 /* Store Operation */ #if defined(CONFIG_MPC86xx) -#define SPRN_MSSCRO 0x3f6 +#define SPRN_MSSCR0 0x3f6 +#define SPRN_MSSSR0 0x3f7 #endif -- cgit v1.2.1