From 13fbde6e4f600d94f0a1fb6ae49c6b4888033cec Mon Sep 17 00:00:00 2001 From: Jeroen Hofstee Date: Wed, 15 Jan 2014 17:58:54 +0100 Subject: nand, gpmc: fix reading after switching ecc The omap_gpmc allows switching ecc at runtime. Since the NAND_SUBPAGE_READ flag is only set, it is kept when switching to hw ecc, which is not correct. This leads to calling chip->ecc.read_subpage which is not a valid pointer. Therefore clear the flag when switching ecc so reading in hw mode works again. Cc: Scott Wood Cc: Pekon Gupta Cc: Nikita Kiryanov Signed-off-by: Jeroen Hofstee --- drivers/mtd/nand/omap_gpmc.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/mtd/nand/omap_gpmc.c') diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c index 790d5385e0..389c4de59a 100644 --- a/drivers/mtd/nand/omap_gpmc.c +++ b/drivers/mtd/nand/omap_gpmc.c @@ -933,6 +933,7 @@ int __maybe_unused omap_nand_switch_ecc(uint32_t hardware, uint32_t eccstrength) mtd = &nand_info[nand_curr_device]; nand = mtd->priv; nand->options |= NAND_OWN_BUFFERS; + nand->options &= ~NAND_SUBPAGE_READ; /* Setup the ecc configurations again */ if (hardware) { if (eccstrength == 1) { -- cgit v1.2.1